| /arch/ia64/kernel/ |
| D | perfmon.c | 163 DPRINT(("spinlock_irq_save ctx %p by [%d]\n", c, task_pid_nr(current))); \
165 DPRINT(("spinlocked ctx %p by [%d]\n", c, task_pid_nr(current))); \
170 DPRINT(("spinlock_irq_restore ctx %p by [%d]\n", c, task_pid_nr(current))); \
230 #define DPRINT(a) \ macro
775 DPRINT(("ctx_fd=%p head=%d tail=%d\n", ctx, ctx->ctx_msgq_head, ctx->ctx_msgq_tail)); in pfm_get_new_msg()
781 DPRINT(("ctx=%p head=%d tail=%d msg=%d\n", ctx, ctx->ctx_msgq_head, ctx->ctx_msgq_tail, idx)); in pfm_get_new_msg()
791 DPRINT(("ctx=%p head=%d tail=%d\n", ctx, ctx->ctx_msgq_head, ctx->ctx_msgq_tail)); in pfm_get_next_msg()
805 …DPRINT(("ctx=%p head=%d tail=%d type=%d\n", ctx, ctx->ctx_msgq_head, ctx->ctx_msgq_tail, msg->pfm_… in pfm_get_next_msg()
814 DPRINT(("ctx=%p msgq reset\n", ctx)); in pfm_reset_msgq()
843 DPRINT(("freeing physical buffer @%p size=%lu\n", mem, size)); in pfm_rvfree()
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| D | unaligned.c | 33 # define DPRINT(a...) do { printk("%s %u: ", __func__, __LINE__); printk (a); } while (0) macro
48 # define DPRINT(a...) macro
319 DPRINT("ignoring write to r%lu; only %lu registers are allocated!\n", r1, sof); in set_rse_reg()
326 DPRINT("r%lu, sw.bspstore=%lx pt.bspstore=%lx sof=%ld sol=%ld ridx=%ld\n", in set_rse_reg()
347 DPRINT("ignoring kernel write to r%lu; register isn't on the kernel RBS!", r1); in set_rse_reg()
356 DPRINT("ubs_end=%p bsp=%p addr=%p\n", (void *) ubs_end, (void *) bsp, (void *) addr); in set_rse_reg()
363 DPRINT("rnat @%p = 0x%lx nat=%d old nat=%ld\n", in set_rse_reg()
373 DPRINT("rnat changed to @%p = 0x%lx\n", (void *) rnat_addr, rnats); in set_rse_reg()
392 DPRINT("ignoring read from r%lu; only %lu registers are allocated!\n", r1, sof); in get_rse_reg()
399 DPRINT("r%lu, sw.bspstore=%lx pt.bspstore=%lx sof=%ld sol=%ld ridx=%ld\n", in get_rse_reg()
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| D | perfmon_default_smpl.c | 25 #define DPRINT(a) \ macro
36 #define DPRINT(a) macro
47 DPRINT(("[%d] no argument passed\n", task_pid_nr(task))); in default_validate()
51 DPRINT(("[%d] validate flags=0x%x CPU%d\n", task_pid_nr(task), flags, cpu)); in default_validate()
58 DPRINT(("buf_size=%lu\n", arg->buf_size)); in default_validate()
90 DPRINT(("[%d] buffer=%p buf_size=%lu hdr_size=%lu hdr_version=%u cur_offs=%lu\n", in default_init()
113 DPRINT(("[%d] invalid arguments buf=%p arg=%p\n", task->pid, buf, arg)); in default_handler()
248 DPRINT(("[%d] exit(%p)\n", task_pid_nr(task), buf)); in default_exit()
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| D | perfmon_montecito.h | 146 DPRINT(("pmc[%d]=0x%lx, mask=0x%lx, reset=0x%lx, val=0x%lx\n", in pfm_mont_reserved()
185 …DPRINT(("cnum=%u val=0x%lx, using_dbreg=%d loaded=%d\n", cnum, tmpval, ctx->ctx_fl_using_dbreg, is… in pfm_mont_pmc_check()
190 DPRINT(("pmc[%d]=0x%lx has active pmc41 settings, clearing dbr\n", cnum, tmpval)); in pfm_mont_pmc_check()
210 DPRINT(("pmc38=0x%lx has active pmc38 settings, clearing ibr\n", tmpval)); in pfm_mont_pmc_check()
248 DPRINT(("invalid config pmc38=0x%lx pmc41=0x%lx pmc32=0x%lx\n", val38, val41, val32)); in pfm_mont_pmc_check()
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| D | perfmon_mckinley.h | 68 DPRINT(("pmc[%d]=0x%lx, mask=0x%lx, reset=0x%lx, val=0x%lx\n", in pfm_mck_reserved()
101 …DPRINT(("cnum=%u val=0x%lx, using_dbreg=%d loaded=%d\n", cnum, *val, ctx->ctx_fl_using_dbreg, is_l… in pfm_mck_pmc_check()
106 DPRINT(("pmc[%d]=0x%lx has active pmc13 settings, clearing dbr\n", cnum, *val)); in pfm_mck_pmc_check()
124 DPRINT(("pmc[%d]=0x%lx has active pmc14 settings, clearing ibr\n", cnum, *val)); in pfm_mck_pmc_check()
166 if (ret) DPRINT((KERN_DEBUG "perfmon: failure check_case1\n")); in pfm_mck_pmc_check()
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| D | perfmon_itanium.h | 67 DPRINT(("pmc[%d]=0x%lx has active pmc13.ta cleared, clearing ibr\n", cnum, *val)); in pfm_ita_pmc_check()
86 DPRINT(("pmc[%d]=0x%lx has active pmc11.pt cleared, clearing dbr\n", cnum, *val)); in pfm_ita_pmc_check()
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