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Searched refs:GCMPGCBhi (Results 1 – 3 of 3) sorted by relevance

/arch/mips/kernel/
Dsmp-cmp.c575 GCMPGCBhi(GCMPB), GCMPGCBlo(GCMPB), in show_gcr3_global()
577 GCMPGCBhi(GCMC2), GCMPGCBlo(GCMC2), in show_gcr3_global()
580 GCMPGCBhi(GCMEM), GCMPGCBlo(GCMEM), in show_gcr3_global()
581 GCMPGCBhi(GCMEC), GCMPGCBlo(GCMEC), in show_gcr3_global()
597 GCMPGCBhi(L2RAMCONF),GCMPGCBlo(L2RAMCONF), in show_gcr3_global()
598 GCMPGCBhi(SCRATCH0),GCMPGCBlo(SCRATCH0), in show_gcr3_global()
599 GCMPGCBhi(SCRATCH1),GCMPGCBlo(SCRATCH1), in show_gcr3_global()
602 GCMPGCBhi(L2PREF), GCMPGCBlo(L2PREF), in show_gcr3_global()
614 GCMPGCBhi(L2TRCST), GCMPGCBlo(L2TRCST), in show_gcr3_global()
615 GCMPGCBhi(L2DRCOP), GCMPGCBlo(L2DRCOP), in show_gcr3_global()
[all …]
/arch/mips/include/asm/
Dgcmpregs.h37 #define GCMPGCBhi(reg) REGP(_gcmp_base, (GCMPGCBOFS(reg) + 4)) macro
41 #define GCMPGCBaddr(reg) ((((phys_addr_t)(GCMPGCBhi(reg))) << 32) | \
43 #define GCMPGCBaddrWrite(reg,val) (GCMPGCBhi(reg) = (u32)((phys_addr_t)(val) >> 32), \
/arch/mips/mti-malta/
Dmalta-int.c683 GCMPGCBhi(GCMEC), GCMPGCBlo(GCMEC), GCMPGCBhi(GCMEA), GCMPGCBlo(GCMEA), in malta_be_handler()
685 GCMPGCBhi(GCMEC) = 0; in malta_be_handler()