Searched refs:INTC_BASE (Results 1 – 4 of 4) sorted by relevance
20 #define INTC_BASE (0xFFD00000) macro21 #define INTC_INT2PRI7 (INTC_BASE+0x4001C)22 #define INTC_INT2MSKCR (INTC_BASE+0x4003C)23 #define INTC_INT2MSKCR1 (INTC_BASE+0x400D4)
23 #define INTC_BASE BARRIER_BASE_ADDR macro26 #define INTC_BASE intc_baseaddr macro53 out_be32(INTC_BASE + IAR, mask); in intc_enable_or_unmask()55 out_be32(INTC_BASE + SIE, mask); in intc_enable_or_unmask()61 out_be32(INTC_BASE + CIE, 1 << d->hwirq); in intc_disable_or_mask()67 out_be32(INTC_BASE + IAR, 1 << d->hwirq); in intc_ack()75 out_be32(INTC_BASE + CIE, mask); in intc_mask_ack()76 out_be32(INTC_BASE + IAR, mask); in intc_mask_ack()93 hwirq = in_be32(INTC_BASE + IVR); in get_irq()
18 #define INTC_BASE 0xffd00000 macro19 #define INTC_ICR1 (INTC_BASE+0x1c)
35 #define INTC_BASE PHYS_PERIPHERAL_BLOCK + \ macro130 intc_virt = (unsigned long)ioremap_nocache(INTC_BASE, 1024); in plat_irq_setup()