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Searched refs:L2X0_CTRL (Results 1 – 8 of 8) sorted by relevance

/arch/arm/plat-samsung/
Ds5p-sleep.S66 ldr r2, [r1, #L2X0_CTRL]
80 str r2, [r1, #L2X0_CTRL]
/arch/arm/mm/
Dcache-l2x0.c221 BUG_ON(readl(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN); in l2x0_inv_all()
335 writel_relaxed(0, l2x0_base + L2X0_CTRL); in l2x0_disable()
433 if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) { in l2x0_init()
443 writel_relaxed(L2X0_CTRL_EN, l2x0_base + L2X0_CTRL); in l2x0_init()
667 l2x0_saved_regs.ctrl = readl_relaxed(l2x0_base + L2X0_CTRL); in aurora_save()
673 if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) { in l2x0_resume()
682 writel_relaxed(L2X0_CTRL_EN, l2x0_base + L2X0_CTRL); in l2x0_resume()
690 if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) { in pl310_resume()
718 if (!(readl(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) { in aurora_resume()
721 writel_relaxed(l2x0_saved_regs.ctrl, l2x0_base + L2X0_CTRL); in aurora_resume()
[all …]
/arch/arm/mach-tegra/
Dsleep.h98 ldr \tmp3, [\tmp2, #L2X0_CTRL]
112 str \tmp3, [\tmp2, #L2X0_CTRL]
Dsleep.S111 str r5, [r4, #L2X0_CTRL]
/arch/arm/mach-imx/
Dheadsmp.S55 str r1, [r0, #L2X0_CTRL] @ re-enable L2
/arch/arm/include/asm/hardware/
Dcache-l2x0.h27 #define L2X0_CTRL 0x100 macro
/arch/arm/mach-omap2/
Dsleep44xx.S292 ldr r0, [r2, #L2X0_CTRL]
/arch/arm/mach-exynos/
Dcommon.c570 if (!(__raw_readl(S5P_VA_L2CC + L2X0_CTRL) & 0x1)) { in exynos4_l2x0_cache_init()