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Searched refs:RSI_RESPONSE1 (Results 1 – 5 of 5) sorted by relevance

/arch/blackfin/mach-bf518/include/mach/
DdefBF514.h21 #define RSI_RESPONSE1 0xFFC03818 /* RSI Response Register */ macro
DcdefBF514.h27 #define bfin_read_RSI_RESPONSE1() bfin_read32(RSI_RESPONSE1)
28 #define bfin_write_RSI_RESPONSE1(val) bfin_write32(RSI_RESPONSE1, val)
/arch/blackfin/mach-bf609/include/mach/
DdefBF60x_base.h42 #define RSI_RESPONSE1 0xFFC00618 /* RSI0 Response 1 Register */ macro
DcdefBF60x_base.h3199 #define bfin_read_RSI_RESPONSE1() bfin_read32(RSI_RESPONSE1)
3200 #define bfin_write_RSI_RESPONSE1(val) bfin_write32(RSI_RESPONSE1, val)
/arch/blackfin/kernel/
Ddebug-mmrs.c1398 D32(RSI_RESPONSE1); in bfin_debug_mmrs_init()