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Searched refs:epll_con (Results 1 – 5 of 5) sorted by relevance

/arch/arm/plat-samsung/
Ds5p-clock.c222 unsigned int epll_con = __raw_readl(S5P_EPLL_CON) & ~ctrlbit; in s5p_epll_enable() local
225 __raw_writel(epll_con | ctrlbit, S5P_EPLL_CON); in s5p_epll_enable()
227 __raw_writel(epll_con, S5P_EPLL_CON); in s5p_epll_enable()
/arch/arm/mach-s5p64x0/
Dclock-s5p6440.c53 unsigned int epll_con, epll_con_k; in s5p6440_epll_set_rate() local
59 epll_con = __raw_readl(S5P64X0_EPLL_CON); in s5p6440_epll_set_rate()
63 epll_con &= ~(PLL90XX_MDIV_MASK | PLL90XX_PDIV_MASK | PLL90XX_SDIV_MASK); in s5p6440_epll_set_rate()
68 epll_con |= (epll_div[i][2] << PLL90XX_MDIV_SHIFT) | in s5p6440_epll_set_rate()
80 __raw_writel(epll_con, S5P64X0_EPLL_CON); in s5p6440_epll_set_rate()
Dclock-s5p6450.c53 unsigned int epll_con, epll_con_k; in s5p6450_epll_set_rate() local
59 epll_con = __raw_readl(S5P64X0_EPLL_CON); in s5p6450_epll_set_rate()
63 epll_con &= ~(PLL90XX_MDIV_MASK | PLL90XX_PDIV_MASK | PLL90XX_SDIV_MASK); in s5p6450_epll_set_rate()
68 epll_con |= (epll_div[i][2] << PLL90XX_MDIV_SHIFT) | in s5p6450_epll_set_rate()
80 __raw_writel(epll_con, S5P64X0_EPLL_CON); in s5p6450_epll_set_rate()
/arch/arm/mach-s5pc100/
Dclock.c284 unsigned int epll_con; in s5pc100_epll_set_rate() local
290 epll_con = __raw_readl(S5P_EPLL_CON); in s5pc100_epll_set_rate()
292 epll_con &= ~(PLL65XX_MDIV_MASK | PLL65XX_PDIV_MASK | PLL65XX_SDIV_MASK); in s5pc100_epll_set_rate()
296 epll_con |= (epll_div[i][1] << PLL65XX_MDIV_SHIFT) | in s5pc100_epll_set_rate()
308 __raw_writel(epll_con, S5P_EPLL_CON); in s5pc100_epll_set_rate()
/arch/arm/mach-s5pv210/
Dclock.c1129 unsigned int epll_con, epll_con_k; in s5pv210_epll_set_rate() local
1136 epll_con = __raw_readl(S5P_EPLL_CON); in s5pv210_epll_set_rate()
1140 epll_con &= ~(1 << 27 | in s5pv210_epll_set_rate()
1148 epll_con |= (epll_div[i][1] << 27 | in s5pv210_epll_set_rate()
1162 __raw_writel(epll_con, S5P_EPLL_CON); in s5pv210_epll_set_rate()