| /drivers/clk/mxs/ |
| D | clk-div.c | 45 struct clk_div *div = to_clk_div(hw); in clk_div_recalc_rate() local
47 return div->ops->recalc_rate(&div->divider.hw, parent_rate); in clk_div_recalc_rate()
53 struct clk_div *div = to_clk_div(hw); in clk_div_round_rate() local
55 return div->ops->round_rate(&div->divider.hw, rate, prate); in clk_div_round_rate()
61 struct clk_div *div = to_clk_div(hw); in clk_div_set_rate() local
64 ret = div->ops->set_rate(&div->divider.hw, rate, parent_rate); in clk_div_set_rate()
66 ret = mxs_clk_wait(div->reg, div->busy); in clk_div_set_rate()
80 struct clk_div *div; in mxs_clk_div() local
84 div = kzalloc(sizeof(*div), GFP_KERNEL); in mxs_clk_div()
85 if (!div) in mxs_clk_div()
[all …]
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| D | clk-frac.c | 44 u32 div; in clk_frac_recalc_rate() local
46 div = readl_relaxed(frac->reg) >> frac->shift; in clk_frac_recalc_rate()
47 div &= (1 << frac->width) - 1; in clk_frac_recalc_rate()
49 return (parent_rate >> frac->width) * div; in clk_frac_recalc_rate()
57 u32 div; in clk_frac_round_rate() local
66 div = tmp; in clk_frac_round_rate()
68 if (!div) in clk_frac_round_rate()
71 return (parent_rate >> frac->width) * div; in clk_frac_round_rate()
79 u32 div, val; in clk_frac_set_rate() local
88 div = tmp; in clk_frac_set_rate()
[all …]
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| /drivers/clk/ |
| D | clk-divider.c | 40 for (clkt = table; clkt->div; clkt++) in _get_table_maxdiv()
41 if (clkt->div > maxdiv) in _get_table_maxdiv()
42 maxdiv = clkt->div; in _get_table_maxdiv()
62 for (clkt = table; clkt->div; clkt++) in _get_table_div()
64 return clkt->div; in _get_table_div()
80 unsigned int div) in _get_table_val() argument
84 for (clkt = table; clkt->div; clkt++) in _get_table_val()
85 if (clkt->div == div) in _get_table_val()
90 static unsigned int _get_val(struct clk_divider *divider, u8 div) in _get_val() argument
93 return div; in _get_val()
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| D | clk-highbank.c | 209 u32 div = (readl(hbclk->reg) & HB_A9_PCLK_DIV) ? 8 : 4; in clk_cpu_periphclk_recalc_rate() local
210 return parent_rate / div; in clk_cpu_periphclk_recalc_rate()
221 u32 div = (readl(hbclk->reg) & HB_A9_BCLK_DIV_MASK) >> HB_A9_BCLK_DIV_SHIFT; in clk_cpu_a9bclk_recalc_rate() local
223 return parent_rate / (div + 2); in clk_cpu_a9bclk_recalc_rate()
234 u32 div; in clk_periclk_recalc_rate() local
236 div = readl(hbclk->reg) & 0x1f; in clk_periclk_recalc_rate()
237 div++; in clk_periclk_recalc_rate()
238 div *= 2; in clk_periclk_recalc_rate()
240 return parent_rate / div; in clk_periclk_recalc_rate()
246 u32 div; in clk_periclk_round_rate() local
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| D | clk-fixed-factor.c | 35 do_div(rate, fix->div); in clk_factor_recalc_rate()
47 best_parent = (rate / fix->mult) * fix->div; in clk_factor_round_rate()
52 return (*prate / fix->div) * fix->mult; in clk_factor_round_rate()
70 unsigned int mult, unsigned int div) in clk_register_fixed_factor() argument
84 fix->div = div; in clk_register_fixed_factor()
109 u32 div, mult; in of_fixed_factor_clk_setup() local
111 if (of_property_read_u32(node, "clock-div", &div)) { in of_fixed_factor_clk_setup()
127 mult, div); in of_fixed_factor_clk_setup()
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| /drivers/clk/spear/ |
| D | spear1340_clock.c | 192 {.div = 0x073A8}, /* for vco1div2 = 600 MHz */
193 {.div = 0x06062}, /* for vco1div2 = 500 MHz */
194 {.div = 0x04D1B}, /* for vco1div2 = 400 MHz */
195 {.div = 0x04000}, /* for vco1div2 = 332 MHz */
196 {.div = 0x03031}, /* for vco1div2 = 250 MHz */
197 {.div = 0x0268D}, /* for vco1div2 = 200 MHz */
244 {.div = 0x08000},
245 {.div = 0x06a38},
246 {.div = 0x06666},
247 {.div = 0x06000},
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| /drivers/clk/tegra/ |
| D | clk-divider.c | 72 int div, mul; in clk_frac_div_recalc_rate() local
76 div = reg & div_mask(divider); in clk_frac_div_recalc_rate()
79 div += mul; in clk_frac_div_recalc_rate()
82 rate += div - 1; in clk_frac_div_recalc_rate()
83 do_div(rate, div); in clk_frac_div_recalc_rate()
92 int div, mul; in clk_frac_div_round_rate() local
98 div = get_div(divider, rate, output_rate); in clk_frac_div_round_rate()
99 if (div < 0) in clk_frac_div_round_rate()
104 return DIV_ROUND_UP(output_rate * mul, div + mul); in clk_frac_div_round_rate()
111 int div; in clk_frac_div_set_rate() local
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| /drivers/media/i2c/ |
| D | aptina-pll.c | 38 unsigned int div; in aptina_pll_calculate() local
55 div = gcd(pll->pix_clock, pll->ext_clock); in aptina_pll_calculate()
56 pll->m = pll->pix_clock / div; in aptina_pll_calculate()
57 div = pll->ext_clock / div; in aptina_pll_calculate()
72 mf_min = max(mf_min, limits->n_min * limits->p1_min / div); in aptina_pll_calculate()
76 mf_max = min(mf_max, DIV_ROUND_UP(limits->n_max * limits->p1_max, div)); in aptina_pll_calculate()
141 p1_min = max(limits->p1_min, DIV_ROUND_UP(limits->out_clock_min * div, in aptina_pll_calculate()
143 p1_max = min(limits->p1_max, limits->out_clock_max * div / in aptina_pll_calculate()
147 unsigned int mf_inc = p1 / gcd(div, p1); in aptina_pll_calculate()
152 limits->int_clock_max * div)), mf_inc); in aptina_pll_calculate()
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| /drivers/media/tuners/ |
| D | tea5767.c | 136 unsigned int div, frq; in tea5767_status_dump() local
148 div = ((buffer[0] & 0x3f) << 8) | buffer[1]; in tea5767_status_dump()
152 frq = (div * 50000 - 700000 - 225000) / 4; /* Freq in KHz */ in tea5767_status_dump()
155 frq = (div * 50000 + 700000 + 225000) / 4; /* Freq in KHz */ in tea5767_status_dump()
158 frq = (div * 32768 + 700000 + 225000) / 4; /* Freq in KHz */ in tea5767_status_dump()
162 frq = (div * 32768 - 700000 - 225000) / 4; /* Freq in KHz */ in tea5767_status_dump()
165 buffer[0] = (div >> 8) & 0x3f; in tea5767_status_dump()
166 buffer[1] = div & 0xff; in tea5767_status_dump()
169 frq / 1000, frq % 1000, div); in tea5767_status_dump()
194 unsigned div; in set_radio_freq() local
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| D | tuner-simple.c | 441 u16 div, u8 config, u8 cb) in simple_post_tune() argument
477 buffer[0] = (div>>8) & 0x7f; in simple_post_tune()
478 buffer[1] = div & 0xff; in simple_post_tune()
549 u16 div; in simple_set_tv_freq() local
587 div = params->frequency + IFPCoff + offset; in simple_set_tv_freq()
593 offset / 16, offset % 16 * 100 / 16, div); in simple_set_tv_freq()
598 if (t_params->cb_first_if_lower_freq && div < priv->last_div) { in simple_set_tv_freq()
601 buffer[2] = (div>>8) & 0x7f; in simple_set_tv_freq()
602 buffer[3] = div & 0xff; in simple_set_tv_freq()
604 buffer[0] = (div>>8) & 0x7f; in simple_set_tv_freq()
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| /drivers/mmc/host/ |
| D | sdhci-cns3xxx.c | 29 int div = 1; in sdhci_cns3xxx_set_clock() local
41 while (host->max_clk / div > clock) { in sdhci_cns3xxx_set_clock()
46 if (div < 4) in sdhci_cns3xxx_set_clock()
47 div += 1; in sdhci_cns3xxx_set_clock()
48 else if (div < 256) in sdhci_cns3xxx_set_clock()
49 div *= 2; in sdhci_cns3xxx_set_clock()
55 clock, host->max_clk / div); in sdhci_cns3xxx_set_clock()
58 if (div != 3) in sdhci_cns3xxx_set_clock()
59 div >>= 1; in sdhci_cns3xxx_set_clock()
61 clk = div << SDHCI_DIVIDER_SHIFT; in sdhci_cns3xxx_set_clock()
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| D | sdhci-esdhc.h | 48 int div = 1; in esdhc_set_clock() local
62 while (host->max_clk / pre_div / div > clock && div < 16) in esdhc_set_clock()
63 div++; in esdhc_set_clock()
66 clock, host->max_clk / pre_div / div); in esdhc_set_clock()
69 div--; in esdhc_set_clock()
73 | (div << ESDHC_DIVIDER_SHIFT) in esdhc_set_clock()
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| /drivers/staging/imx-drm/ipu-v3/ |
| D | ipu-di.c | 147 int div; in ipu_di_clk_calc_div() local
153 div = tmp; in ipu_di_clk_calc_div()
155 if (div < 0x10) in ipu_di_clk_calc_div()
156 div = 0x10; in ipu_di_clk_calc_div()
163 if (div & 0x10) in ipu_di_clk_calc_div()
164 div &= ~0x7; in ipu_di_clk_calc_div()
167 if ((div & 0xC) == 0xC) { in ipu_di_clk_calc_div()
168 div += 0x10; in ipu_di_clk_calc_div()
169 div &= ~0xF; in ipu_di_clk_calc_div()
173 return div; in ipu_di_clk_calc_div()
[all …]
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| /drivers/clk/mvebu/ |
| D | clk-core.c | 30 void (*get_clk_ratio)(void __iomem *sar, int id, int *mult, int *div);
84 int mult, div; in mvebu_clk_core_setup() local
89 &mult, &div); in mvebu_clk_core_setup()
91 cpuclk_name, 0, mult, div); in mvebu_clk_core_setup()
210 void __iomem *sar, int id, int *mult, int *div) in armada_370_xp_get_clk_ratio() argument
215 *div = armada_370_xp_nbclk_ratios[opt][1]; in armada_370_xp_get_clk_ratio()
219 *div = armada_370_xp_hclk_ratios[opt][1]; in armada_370_xp_get_clk_ratio()
223 *div = armada_370_xp_dramclk_ratios[opt][1]; in armada_370_xp_get_clk_ratio()
229 void __iomem *sar, int id, int *mult, int *div) in armada_370_get_clk_ratio() argument
234 armada_370_xp_get_clk_ratio(opt, sar, id, mult, div); in armada_370_get_clk_ratio()
[all …]
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| D | clk-cpu.c | 43 u32 reg, div; in clk_cpu_recalc_rate() local
46 div = (reg >> (cpuclk->cpu * 8)) & SYS_CTRL_CLK_DIVIDER_MASK; in clk_cpu_recalc_rate()
47 return parent_rate / div; in clk_cpu_recalc_rate()
54 u32 div; in clk_cpu_round_rate() local
56 div = *parent_rate / rate; in clk_cpu_round_rate()
57 if (div == 0) in clk_cpu_round_rate()
58 div = 1; in clk_cpu_round_rate()
59 else if (div > 3) in clk_cpu_round_rate()
60 div = 3; in clk_cpu_round_rate()
62 return *parent_rate / div; in clk_cpu_round_rate()
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| /drivers/gpu/drm/nouveau/ |
| D | nouveau_backlight.c | 103 u32 div = 1025; in nv50_get_intensity() local
108 return ((val * 100) + (div / 2)) / div; in nv50_get_intensity()
118 u32 div = 1025; in nv50_set_intensity() local
119 u32 val = (bd->props.brightness * div) / 100; in nv50_set_intensity()
139 u32 div, val; in nva3_get_intensity() local
141 div = nv_rd32(device, NV50_PDISP_SOR_PWM_DIV(or)); in nva3_get_intensity()
144 if (div && div >= val) in nva3_get_intensity()
145 return ((val * 100) + (div / 2)) / div; in nva3_get_intensity()
157 u32 div, val; in nva3_set_intensity() local
159 div = nv_rd32(device, NV50_PDISP_SOR_PWM_DIV(or)); in nva3_set_intensity()
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| /drivers/video/omap2/dss/ |
| D | rfbi.c | 393 static inline unsigned long round_to_extif_ticks(unsigned long ps, int div) in round_to_extif_ticks() argument
395 int bus_tick = extif_clk_period * div; in round_to_extif_ticks()
399 static int calc_reg_timing(struct rfbi_timings *t, int div) in calc_reg_timing() argument
401 t->clk_div = div; in calc_reg_timing()
403 t->cs_on_time = round_to_extif_ticks(t->cs_on_time, div); in calc_reg_timing()
405 t->we_on_time = round_to_extif_ticks(t->we_on_time, div); in calc_reg_timing()
406 t->we_off_time = round_to_extif_ticks(t->we_off_time, div); in calc_reg_timing()
407 t->we_cycle_time = round_to_extif_ticks(t->we_cycle_time, div); in calc_reg_timing()
409 t->re_on_time = round_to_extif_ticks(t->re_on_time, div); in calc_reg_timing()
410 t->re_off_time = round_to_extif_ticks(t->re_off_time, div); in calc_reg_timing()
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| /drivers/video/omap/ |
| D | sossi.c | 125 static u32 ps_to_sossi_ticks(u32 ps, int div) in ps_to_sossi_ticks() argument
127 u32 clk_period = HZ_TO_PS(sossi.fck_hz) * div; in ps_to_sossi_ticks()
135 int div = t->clk_div; in calc_rd_timings() local
141 reon = ps_to_sossi_ticks(t->re_on_time, div); in calc_rd_timings()
146 reoff = ps_to_sossi_ticks(t->re_off_time, div); in calc_rd_timings()
155 recyc = ps_to_sossi_ticks(t->re_cycle_time, div); in calc_rd_timings()
166 actim = ps_to_sossi_ticks(t->access_time, div); in calc_rd_timings()
186 int div = t->clk_div; in calc_wr_timings() local
192 weon = ps_to_sossi_ticks(t->we_on_time, div); in calc_wr_timings()
197 weoff = ps_to_sossi_ticks(t->we_off_time, div); in calc_wr_timings()
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| D | hwa742.c | 629 static unsigned long round_to_extif_ticks(unsigned long ps, int div) in round_to_extif_ticks() argument
631 int bus_tick = hwa742.extif_clk_period * div; in round_to_extif_ticks()
635 static int calc_reg_timing(unsigned long sysclk, int div) in calc_reg_timing() argument
650 "extif_clk_div %d\n", systim, hwa742.extif_clk_period, div); in calc_reg_timing()
654 t->clk_div = div; in calc_reg_timing()
656 t->we_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div); in calc_reg_timing()
657 t->re_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div); in calc_reg_timing()
658 t->access_time = round_to_extif_ticks(t->re_on_time + 12200, div); in calc_reg_timing()
659 t->we_off_time = round_to_extif_ticks(t->we_on_time + 1000, div); in calc_reg_timing()
660 t->re_off_time = round_to_extif_ticks(t->re_on_time + 16000, div); in calc_reg_timing()
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| /drivers/usb/host/ |
| D | octeon2-common.c | 22 u64 div; in octeon2_usb_clocks_start() local
75 div = octeon_get_io_clock_rate() / 130000000ull; in octeon2_usb_clocks_start()
77 switch (div) { in octeon2_usb_clocks_start()
79 div = 1; in octeon2_usb_clocks_start()
87 div = 4; in octeon2_usb_clocks_start()
91 div = 6; in octeon2_usb_clocks_start()
97 div = 8; in octeon2_usb_clocks_start()
100 div = 12; in octeon2_usb_clocks_start()
103 clk_rst_ctl.s.h_div = div; in octeon2_usb_clocks_start()
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| /drivers/cpufreq/ |
| D | cpufreq-nforce2.c | 23 #define NFORCE2_PLL(mul, div) (0x100000 | (mul << 8) | div) argument
69 unsigned char mul, div; in nforce2_calc_fsb() local
72 div = pll & 0xff; in nforce2_calc_fsb()
74 if (div > 0) in nforce2_calc_fsb()
75 return NFORCE2_XTAL * mul / div; in nforce2_calc_fsb()
89 unsigned char mul = 0, div = 0; in nforce2_calc_pll() local
93 while (((mul == 0) || (div == 0)) && (tried <= 3)) { in nforce2_calc_pll()
99 div = xdiv; in nforce2_calc_pll()
104 if ((mul == 0) || (div == 0)) in nforce2_calc_pll()
107 return NFORCE2_PLL(mul, div); in nforce2_calc_pll()
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| /drivers/clk/sunxi/ |
| D | clk-sunxi.c | 85 u8 div; in sunxi_get_pll1_factors() local
88 div = *freq / 6000000; in sunxi_get_pll1_factors()
89 *freq = 6000000 * div; in sunxi_get_pll1_factors()
105 if (div < 10) in sunxi_get_pll1_factors()
109 else if (div < 20 || (div < 32 && (div & 1))) in sunxi_get_pll1_factors()
114 else if (div < 40 || (div < 64 && (div & 2))) in sunxi_get_pll1_factors()
122 div <<= *p; in sunxi_get_pll1_factors()
123 div /= (*k + 1); in sunxi_get_pll1_factors()
124 *n = div / 4; in sunxi_get_pll1_factors()
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| /drivers/mfd/ |
| D | db8500-prcmu.c | 733 int prcmu_config_clkout(u8 clkout, u8 source, u8 div) in prcmu_config_clkout() argument
744 BUG_ON(div > 63); in prcmu_config_clkout()
747 if (!div && !requests[clkout]) in prcmu_config_clkout()
755 (div << PRCM_CLKOCR_CLKODIV0_SHIFT)); in prcmu_config_clkout()
762 (div << PRCM_CLKOCR_CLKODIV1_SHIFT)); in prcmu_config_clkout()
771 if (div) { in prcmu_config_clkout()
784 requests[clkout] += (div ? 1 : -1); in prcmu_config_clkout()
989 u32 div; in request_even_slower_clocks() local
992 div = (val & PRCM_CLK_MGT_CLKPLLDIV_MASK); in request_even_slower_clocks()
994 if ((div <= 1) || (div > 15)) { in request_even_slower_clocks()
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| /drivers/media/pci/ttpci/ |
| D | budget.c | 212 u32 div = (c->frequency + 479500) / 125; in alps_bsrv2_tuner_set_params() local
226 buf[0] = (div >> 8) & 0x7f; in alps_bsrv2_tuner_set_params()
227 buf[1] = div & 0xff; in alps_bsrv2_tuner_set_params()
228 buf[2] = ((div & 0x18000) >> 10) | 0x95; in alps_bsrv2_tuner_set_params()
251 u32 div; in alps_tdbe2_tuner_set_params() local
255 div = (c->frequency + 35937500 + 31250) / 62500; in alps_tdbe2_tuner_set_params()
257 data[0] = (div >> 8) & 0x7f; in alps_tdbe2_tuner_set_params()
258 data[1] = div & 0xff; in alps_tdbe2_tuner_set_params()
259 data[2] = 0x85 | ((div >> 10) & 0x60); in alps_tdbe2_tuner_set_params()
280 u32 div; in grundig_29504_401_tuner_set_params() local
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| /drivers/media/dvb-frontends/ |
| D | bsbe1.h | 77 u32 div; in alps_bsbe1_tuner_set_params() local
84 div = p->frequency / 1000; in alps_bsbe1_tuner_set_params()
85 data[0] = (div >> 8) & 0x7f; in alps_bsbe1_tuner_set_params()
86 data[1] = div & 0xff; in alps_bsbe1_tuner_set_params()
87 data[2] = 0x80 | ((div & 0x18000) >> 10) | 0x1; in alps_bsbe1_tuner_set_params()
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