1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000, 2003 Ralf Baechle
7 * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc.
8 */
9 #ifndef _ASM_PGTABLE_64_H
10 #define _ASM_PGTABLE_64_H
11
12 #include <linux/compiler.h>
13 #include <linux/linkage.h>
14
15 #include <asm/addrspace.h>
16 #include <asm/page.h>
17 #include <asm/cachectl.h>
18 #include <asm/fixmap.h>
19
20 #if defined(CONFIG_PAGE_SIZE_64KB) && !defined(CONFIG_48VMBITS)
21 #include <asm-generic/pgtable-nopmd.h>
22 #else
23 #include <asm-generic/pgtable-nopud.h>
24 #endif
25
26 /*
27 * Each address space has 2 4K pages as its page directory, giving 1024
28 * (== PTRS_PER_PGD) 8 byte pointers to pmd tables. Each pmd table is a
29 * single 4K page, giving 512 (== PTRS_PER_PMD) 8 byte pointers to page
30 * tables. Each page table is also a single 4K page, giving 512 (==
31 * PTRS_PER_PTE) 8 byte ptes. Each pud entry is initialized to point to
32 * invalid_pmd_table, each pmd entry is initialized to point to
33 * invalid_pte_table, each pte is initialized to 0. When memory is low,
34 * and a pmd table or a page table allocation fails, empty_bad_pmd_table
35 * and empty_bad_page_table is returned back to higher layer code, so
36 * that the failure is recognized later on. Linux does not seem to
37 * handle these failures very well though. The empty_bad_page_table has
38 * invalid pte entries in it, to force page faults.
39 *
40 * Kernel mappings: kernel mappings are held in the swapper_pg_table.
41 * The layout is identical to userspace except it's indexed with the
42 * fault address - VMALLOC_START.
43 */
44
45
46 /* PGDIR_SHIFT determines what a third-level page table entry can map */
47 #ifdef __PAGETABLE_PMD_FOLDED
48 #define PGDIR_SHIFT (PAGE_SHIFT + PAGE_SHIFT + PTE_ORDER - 3)
49 #else
50
51 /* PMD_SHIFT determines the size of the area a second-level page table can map */
52 #define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT + PTE_ORDER - 3))
53 #define PMD_SIZE (1UL << PMD_SHIFT)
54 #define PMD_MASK (~(PMD_SIZE-1))
55
56
57 #define PGDIR_SHIFT (PMD_SHIFT + (PAGE_SHIFT + PMD_ORDER - 3))
58 #endif
59 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
60 #define PGDIR_MASK (~(PGDIR_SIZE-1))
61
62 /* Hardware Page Walker definitions - one bit detects user or system PGD */
63 #define MIPS_BASE_SHIFT 63UL
64 #define MIPS_BASE_SIZE 1UL
65
66 /*
67 * For 4kB page size we use a 3 level page tree and an 8kB pud, which
68 * permits us mapping 40 bits of virtual address space.
69 *
70 * We used to implement 41 bits by having an order 1 pmd level but that seemed
71 * rather pointless.
72 *
73 * For 8kB page size we use a 3 level page tree which permits a total of
74 * 8TB of address space. Alternatively a 33-bit / 8GB organization using
75 * two levels would be easy to implement.
76 *
77 * For 16kB page size we use a 2 level page tree which permits a total of
78 * 36 bits of virtual address space. We could add a third level but it seems
79 * like at the moment there's no need for this.
80 *
81 * For 64kB page size we use a 2 level page table tree for a total of 42 bits
82 * of virtual address space.
83 */
84 #ifdef CONFIG_PAGE_SIZE_4KB
85 #define PGD_ORDER 1
86 #define PUD_ORDER aieeee_attempt_to_allocate_pud
87 #define PMD_ORDER 0
88 #define PTE_ORDER 0
89 #endif
90 #ifdef CONFIG_PAGE_SIZE_8KB
91 #define PGD_ORDER 0
92 #define PUD_ORDER aieeee_attempt_to_allocate_pud
93 #define PMD_ORDER 0
94 #define PTE_ORDER 0
95 #endif
96 #ifdef CONFIG_PAGE_SIZE_16KB
97 #ifdef CONFIG_48VMBITS
98 #define PGD_ORDER 1
99 #else
100 #define PGD_ORDER 0
101 #endif
102 #define PUD_ORDER aieeee_attempt_to_allocate_pud
103 #define PMD_ORDER 0
104 #define PTE_ORDER 0
105 #endif
106 #ifdef CONFIG_PAGE_SIZE_32KB
107 #define PGD_ORDER 0
108 #define PUD_ORDER aieeee_attempt_to_allocate_pud
109 #define PMD_ORDER 0
110 #define PTE_ORDER 0
111 #endif
112 #ifdef CONFIG_PAGE_SIZE_64KB
113 #define PGD_ORDER 0
114 #define PUD_ORDER aieeee_attempt_to_allocate_pud
115 #ifdef CONFIG_48VMBITS
116 #define PMD_ORDER 0
117 #else
118 #define PMD_ORDER aieeee_attempt_to_allocate_pmd
119 #endif
120 #define PTE_ORDER 0
121 #endif
122
123 #define PTRS_PER_PGD ((PAGE_SIZE << PGD_ORDER) / sizeof(pgd_t))
124 #ifndef __PAGETABLE_PMD_FOLDED
125 #define PTRS_PER_PMD ((PAGE_SIZE << PMD_ORDER) / sizeof(pmd_t))
126 #endif
127 #define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t))
128
129 #define USER_PTRS_PER_PGD ((TASK_SIZE64 / PGDIR_SIZE)?(TASK_SIZE64 / PGDIR_SIZE):1)
130 #define FIRST_USER_ADDRESS 0UL
131
132 /*
133 * TLB refill handlers also map the vmalloc area into xuseg. Avoid
134 * the first couple of pages so NULL pointer dereferences will still
135 * reliably trap.
136 */
137 #define VMALLOC_START (MAP_BASE + (2 * PAGE_SIZE))
138 #define VMALLOC_END \
139 (MAP_BASE + \
140 min(PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE, \
141 (1UL << cpu_vmbits)) - (1UL << 32))
142
143 #if defined(CONFIG_MODULES) && defined(KBUILD_64BIT_SYM32) && \
144 VMALLOC_START != CKSSEG
145 /* Load modules into 32bit-compatible segment. */
146 #define MODULE_START CKSSEG
147 #define MODULE_END (FIXADDR_START-2*PAGE_SIZE)
148 #endif
149
150 #define pte_ERROR(e) \
151 printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e))
152 #ifndef __PAGETABLE_PMD_FOLDED
153 #define pmd_ERROR(e) \
154 printk("%s:%d: bad pmd %016lx.\n", __FILE__, __LINE__, pmd_val(e))
155 #endif
156 #define pgd_ERROR(e) \
157 printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e))
158
159 extern pte_t invalid_pte_table[PTRS_PER_PTE];
160 extern pte_t empty_bad_page_table[PTRS_PER_PTE];
161
162
163 #ifndef __PAGETABLE_PMD_FOLDED
164 /*
165 * For 3-level pagetables we defines these ourselves, for 2-level the
166 * definitions are supplied by <asm-generic/pgtable-nopmd.h>.
167 */
168 typedef struct { unsigned long pmd; } pmd_t;
169 #define pmd_val(x) ((x).pmd)
170 #define __pmd(x) ((pmd_t) { (x) } )
171
172
173 extern pmd_t invalid_pmd_table[PTRS_PER_PMD];
174 #endif
175
176 /*
177 * Empty pgd/pmd entries point to the invalid_pte_table.
178 */
pmd_none(pmd_t pmd)179 static inline int pmd_none(pmd_t pmd)
180 {
181 return pmd_val(pmd) == (unsigned long) invalid_pte_table;
182 }
183
pmd_bad(pmd_t pmd)184 static inline int pmd_bad(pmd_t pmd)
185 {
186 #ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
187 /* pmd_huge(pmd) but inline */
188 if (unlikely(pmd_val(pmd) & _PAGE_HUGE))
189 return 0;
190 #endif
191
192 if (unlikely(pmd_val(pmd) & ~PAGE_MASK))
193 return 1;
194
195 return 0;
196 }
197
pmd_present(pmd_t pmd)198 static inline int pmd_present(pmd_t pmd)
199 {
200 return pmd_val(pmd) != (unsigned long) invalid_pte_table;
201 }
202
pmd_clear(pmd_t * pmdp)203 static inline void pmd_clear(pmd_t *pmdp)
204 {
205 pmd_val(*pmdp) = ((unsigned long) invalid_pte_table);
206 }
207 #ifndef __PAGETABLE_PMD_FOLDED
208
209 /*
210 * Empty pud entries point to the invalid_pmd_table.
211 */
pud_none(pud_t pud)212 static inline int pud_none(pud_t pud)
213 {
214 return pud_val(pud) == (unsigned long) invalid_pmd_table;
215 }
216
pud_bad(pud_t pud)217 static inline int pud_bad(pud_t pud)
218 {
219 return pud_val(pud) & ~PAGE_MASK;
220 }
221
pud_present(pud_t pud)222 static inline int pud_present(pud_t pud)
223 {
224 return pud_val(pud) != (unsigned long) invalid_pmd_table;
225 }
226
pud_clear(pud_t * pudp)227 static inline void pud_clear(pud_t *pudp)
228 {
229 pud_val(*pudp) = ((unsigned long) invalid_pmd_table);
230 }
231 #endif
232
233 #define pte_page(x) pfn_to_page(pte_pfn(x))
234
235 #ifdef CONFIG_CPU_VR41XX
236 #define pte_pfn(x) ((unsigned long)((x).pte >> (PAGE_SHIFT + 2)))
237 #define pfn_pte(pfn, prot) __pte(((pfn) << (PAGE_SHIFT + 2)) | pgprot_val(prot))
238 #else
239 #define pte_pfn(x) ((unsigned long)((x).pte >> _PFN_SHIFT))
240 #define pfn_pte(pfn, prot) __pte(((pfn) << _PFN_SHIFT) | pgprot_val(prot))
241 #define pfn_pmd(pfn, prot) __pmd(((pfn) << _PFN_SHIFT) | pgprot_val(prot))
242 #endif
243
244 #define __pgd_offset(address) pgd_index(address)
245 #define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
246 #define __pmd_offset(address) pmd_index(address)
247
248 /* to find an entry in a kernel page-table-directory */
249 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
250
251 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
252 #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
253
254 /* to find an entry in a page-table-directory */
255 #define pgd_offset(mm, addr) ((mm)->pgd + pgd_index(addr))
256
257 #ifndef __PAGETABLE_PMD_FOLDED
pud_page_vaddr(pud_t pud)258 static inline unsigned long pud_page_vaddr(pud_t pud)
259 {
260 return pud_val(pud);
261 }
262 #define pud_phys(pud) virt_to_phys((void *)pud_val(pud))
263 #define pud_page(pud) (pfn_to_page(pud_phys(pud) >> PAGE_SHIFT))
264
265 /* Find an entry in the second-level page table.. */
pmd_offset(pud_t * pud,unsigned long address)266 static inline pmd_t *pmd_offset(pud_t * pud, unsigned long address)
267 {
268 return (pmd_t *) pud_page_vaddr(*pud) + pmd_index(address);
269 }
270 #endif
271
272 /* Find an entry in the third-level page table.. */
273 #define __pte_offset(address) \
274 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
275 #define pte_offset(dir, address) \
276 ((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address))
277 #define pte_offset_kernel(dir, address) \
278 ((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address))
279 #define pte_offset_map(dir, address) \
280 ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
281 #define pte_unmap(pte) ((void)(pte))
282
283 /*
284 * Initialize a new pgd / pmd table with invalid pointers.
285 */
286 extern void pgd_init(unsigned long page);
287 extern void pmd_init(unsigned long page, unsigned long pagetable);
288
289 /*
290 * Non-present pages: high 24 bits are offset, next 8 bits type,
291 * low 32 bits zero.
292 */
mk_swap_pte(unsigned long type,unsigned long offset)293 static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
294 {
295 pte_t pte;
296
297 pte_val(pte) = (type << __SWP_PTE_SKIP_BITS_NUM) |
298 (offset << (__SWP_PTE_SKIP_BITS_NUM + __SWP_TYPE_BITS_NUM));
299 return pte;
300 }
301
302 #define __swp_type(x) \
303 (((x).val >> __SWP_PTE_SKIP_BITS_NUM) & __SWP_TYPE_MASK)
304 #define __swp_offset(x) \
305 ((x).val >> (__SWP_PTE_SKIP_BITS_NUM + __SWP_TYPE_BITS_NUM))
306 #define __swp_entry(type, offset) ((swp_entry_t) { pte_val(mk_swap_pte((type), (offset))) })
307 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
308 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
309
310 /*
311 * Take out all bits from V to bit 0. We should actually take out only VGFP but
312 * today PTE is too complicated by HUGE page support etc
313 */
314 #define PTE_FILE_MAX_BITS (64 - _PAGE_DIRTY_SHIFT)
315
316 #define pte_to_pgoff(_pte) ((_pte).pte >> _PAGE_DIRTY_SHIFT)
317 #define pgoff_to_pte(off) \
318 ((pte_t) { ((off) << _PAGE_DIRTY_SHIFT) | _PAGE_FILE })
319
320 #endif /* _ASM_PGTABLE_64_H */
321