• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 #ifndef _IOCTL_H_
2 #define _IOCTL_H_
3 
4 struct bcm_rdm_buffer {
5 	unsigned long Register;
6 	unsigned long Length;
7 } __packed;
8 
9 struct bcm_wrm_buffer {
10 	unsigned long Register;
11 	unsigned long Length;
12 	unsigned char Data[4];
13 } __packed;
14 
15 struct bcm_ioctl_buffer {
16 	void __user *InputBuffer;
17 	unsigned long InputLength;
18 	void __user *OutputBuffer;
19 	unsigned long OutputLength;
20 } __packed;
21 
22 struct bcm_gpio_info {
23 	unsigned int uiGpioNumber; /* valid numbers 0-15 */
24 	unsigned int uiGpioValue; /* 1 set ; 0 not  set */
25 } __packed;
26 
27 struct bcm_user_thread_req {
28 	/* 0->Inactivate LED thread. */
29 	/* 1->Activate the LED thread */
30 	unsigned int ThreadState;
31 } __packed;
32 
33 #define LED_THREAD_ACTIVATION_REQ  1
34 #define BCM_IOCTL				'k'
35 #define IOCTL_SEND_CONTROL_MESSAGE		_IOW(BCM_IOCTL,	0x801, int)
36 #define IOCTL_BCM_REGISTER_WRITE		_IOW(BCM_IOCTL, 0x802, int)
37 #define IOCTL_BCM_REGISTER_READ			_IOR(BCM_IOCTL, 0x803, int)
38 #define IOCTL_BCM_COMMON_MEMORY_WRITE		_IOW(BCM_IOCTL, 0x804, int)
39 #define IOCTL_BCM_COMMON_MEMORY_READ		_IOR(BCM_IOCTL, 0x805, int)
40 #define IOCTL_GET_CONTROL_MESSAGE		_IOR(BCM_IOCTL,	0x806, int)
41 #define IOCTL_BCM_FIRMWARE_DOWNLOAD		_IOW(BCM_IOCTL, 0x807, int)
42 #define IOCTL_BCM_SET_SEND_VCID			_IOW(BCM_IOCTL,	0x808, int)
43 #define IOCTL_BCM_SWITCH_TRANSFER_MODE		_IOW(BCM_IOCTL, 0x809, int)
44 #define IOCTL_LINK_REQ				_IOW(BCM_IOCTL, 0x80A, int)
45 #define IOCTL_RSSI_LEVEL_REQ			_IOW(BCM_IOCTL, 0x80B, int)
46 #define IOCTL_IDLE_REQ				_IOW(BCM_IOCTL, 0x80C, int)
47 #define IOCTL_SS_INFO_REQ			_IOW(BCM_IOCTL, 0x80D, int)
48 #define IOCTL_GET_STATISTICS_POINTER		_IOW(BCM_IOCTL, 0x80E, int)
49 #define IOCTL_CM_REQUEST			_IOW(BCM_IOCTL, 0x80F, int)
50 #define IOCTL_INIT_PARAM_REQ			_IOW(BCM_IOCTL, 0x810, int)
51 #define IOCTL_MAC_ADDR_REQ			_IOW(BCM_IOCTL, 0x811, int)
52 #define IOCTL_MAC_ADDR_RESP			_IOWR(BCM_IOCTL, 0x812, int)
53 #define IOCTL_CLASSIFICATION_RULE		_IOW(BCM_IOCTL, 0x813, char)
54 #define IOCTL_CLOSE_NOTIFICATION		_IO(BCM_IOCTL, 0x814)
55 #define IOCTL_LINK_UP				_IO(BCM_IOCTL, 0x815)
56 #define IOCTL_LINK_DOWN				_IO(BCM_IOCTL, 0x816, struct bcm_ioctl_buffer)
57 #define IOCTL_CHIP_RESET			_IO(BCM_IOCTL, 0x816)
58 #define IOCTL_CINR_LEVEL_REQ			_IOW(BCM_IOCTL, 0x817, char)
59 #define IOCTL_WTM_CONTROL_REQ			_IOW(BCM_IOCTL, 0x817, char)
60 #define IOCTL_BE_BUCKET_SIZE			_IOW(BCM_IOCTL, 0x818, unsigned long)
61 #define IOCTL_RTPS_BUCKET_SIZE			_IOW(BCM_IOCTL, 0x819, unsigned long)
62 #define IOCTL_QOS_THRESHOLD			_IOW(BCM_IOCTL, 0x820, unsigned long)
63 #define IOCTL_DUMP_PACKET_INFO			_IO(BCM_IOCTL, 0x821)
64 #define IOCTL_GET_PACK_INFO			_IOR(BCM_IOCTL, 0x823, int)
65 #define IOCTL_BCM_GET_DRIVER_VERSION		_IOR(BCM_IOCTL, 0x829, int)
66 #define IOCTL_BCM_GET_CURRENT_STATUS		_IOW(BCM_IOCTL, 0x828, int)
67 #define IOCTL_BCM_GPIO_SET_REQUEST		_IOW(BCM_IOCTL, 0x82A, int)
68 #define IOCTL_BCM_GPIO_STATUS_REQUEST		_IOW(BCM_IOCTL, 0x82b, int)
69 #define IOCTL_BCM_GET_DSX_INDICATION		_IOR(BCM_IOCTL, 0x854, int)
70 #define IOCTL_BCM_BUFFER_DOWNLOAD_START		_IOW(BCM_IOCTL, 0x855, int)
71 #define IOCTL_BCM_BUFFER_DOWNLOAD		_IOW(BCM_IOCTL, 0x856, int)
72 #define IOCTL_BCM_BUFFER_DOWNLOAD_STOP		_IOW(BCM_IOCTL, 0x857, int)
73 #define IOCTL_BCM_REGISTER_WRITE_PRIVATE	_IOW(BCM_IOCTL, 0x826, char)
74 #define IOCTL_BCM_REGISTER_READ_PRIVATE		_IOW(BCM_IOCTL, 0x827, char)
75 #define IOCTL_BCM_SET_DEBUG			_IOW(BCM_IOCTL, 0x824, struct bcm_ioctl_buffer)
76 #define IOCTL_BCM_EEPROM_REGISTER_WRITE		_IOW(BCM_IOCTL, 0x858, int)
77 #define IOCTL_BCM_EEPROM_REGISTER_READ		_IOR(BCM_IOCTL, 0x859, int)
78 #define IOCTL_BCM_WAKE_UP_DEVICE_FROM_IDLE	_IOR(BCM_IOCTL, 0x860, int)
79 #define IOCTL_BCM_SET_MAC_TRACING		_IOW(BCM_IOCTL, 0x82c, int)
80 #define IOCTL_BCM_GET_HOST_MIBS			_IOW(BCM_IOCTL, 0x853, int)
81 #define IOCTL_BCM_NVM_READ			_IOR(BCM_IOCTL, 0x861, int)
82 #define IOCTL_BCM_NVM_WRITE			_IOW(BCM_IOCTL, 0x862, int)
83 #define IOCTL_BCM_GET_NVM_SIZE			_IOR(BCM_IOCTL, 0x863, int)
84 #define IOCTL_BCM_CAL_INIT			_IOR(BCM_IOCTL, 0x864, int)
85 #define IOCTL_BCM_BULK_WRM			_IOW(BCM_IOCTL, 0x90B, int)
86 #define IOCTL_BCM_FLASH2X_SECTION_READ		_IOR(BCM_IOCTL, 0x865, int)
87 #define IOCTL_BCM_FLASH2X_SECTION_WRITE		_IOW(BCM_IOCTL, 0x866, int)
88 #define IOCTL_BCM_GET_FLASH2X_SECTION_BITMAP	_IOR(BCM_IOCTL, 0x867, int)
89 #define IOCTL_BCM_SET_ACTIVE_SECTION		_IOW(BCM_IOCTL, 0x868, int)
90 #define	IOCTL_BCM_IDENTIFY_ACTIVE_SECTION	_IO(BCM_IOCTL, 0x869)
91 #define IOCTL_BCM_COPY_SECTION			_IOW(BCM_IOCTL, 0x870, int)
92 #define	IOCTL_BCM_GET_FLASH_CS_INFO		_IOR(BCM_IOCTL, 0x871, int)
93 #define IOCTL_BCM_SELECT_DSD			_IOW(BCM_IOCTL, 0x872, int)
94 #define IOCTL_BCM_NVM_RAW_READ			_IOR(BCM_IOCTL, 0x875, int)
95 #define IOCTL_BCM_CNTRLMSG_MASK			_IOW(BCM_IOCTL, 0x874, int)
96 #define IOCTL_BCM_GET_DEVICE_DRIVER_INFO	_IOR(BCM_IOCTL, 0x877, int)
97 #define IOCTL_BCM_TIME_SINCE_NET_ENTRY		_IOR(BCM_IOCTL, 0x876, int)
98 #define BCM_LED_THREAD_STATE_CHANGE_REQ		_IOW(BCM_IOCTL, 0x878, int)
99 #define IOCTL_BCM_GPIO_MULTI_REQUEST		_IOW(BCM_IOCTL, 0x82D, struct bcm_ioctl_buffer)
100 #define IOCTL_BCM_GPIO_MODE_REQUEST		_IOW(BCM_IOCTL, 0x82E, struct bcm_ioctl_buffer)
101 
102 enum bcm_interface_type {
103 	BCM_MII,
104 	BCM_CARDBUS,
105 	BCM_USB,
106 	BCM_SDIO,
107 	BCM_PCMCIA
108 };
109 
110 struct bcm_driver_info {
111 	enum bcm_nvm_type	u32NVMType;
112 	unsigned int		MaxRDMBufferSize;
113 	enum bcm_interface_type	u32InterfaceType;
114 	unsigned int		u32DSDStartOffset;
115 	unsigned int		u32RxAlignmentCorrection;
116 	unsigned int		u32Reserved[10];
117 };
118 
119 struct bcm_nvm_readwrite {
120 	void __user *pBuffer;
121 	uint32_t  uiOffset;
122 	uint32_t uiNumBytes;
123 	bool bVerify;
124 };
125 
126 struct bcm_bulk_wrm_buffer {
127 	unsigned long Register;
128 	unsigned long SwapEndian;
129 	unsigned long Values[1];
130 };
131 
132 enum bcm_flash2x_section_val {
133 	NO_SECTION_VAL = 0, /* no section is chosen when absolute offset is given for RD/WR */
134 	ISO_IMAGE1,
135 	ISO_IMAGE2,
136 	DSD0,
137 	DSD1,
138 	DSD2,
139 	VSA0,
140 	VSA1,
141 	VSA2,
142 	SCSI,
143 	CONTROL_SECTION,
144 	ISO_IMAGE1_PART2,
145 	ISO_IMAGE1_PART3,
146 	ISO_IMAGE2_PART2,
147 	ISO_IMAGE2_PART3,
148 	TOTAL_SECTIONS
149 };
150 
151 /*
152  * Structure used for READ/WRITE Flash Map2.x
153  */
154 struct bcm_flash2x_readwrite {
155 	enum bcm_flash2x_section_val Section; /* which section has to be read/written */
156 	u32 offset;	     /* Offset within Section. */
157 	u32 numOfBytes;	     /* NOB from the offset */
158 	u32 bVerify;
159 	void __user *pDataBuff;	     /* Buffer for reading/writing */
160 };
161 
162 /*
163  * This structure is used for coping one section to other.
164  * there are two ways to copy one section to other.
165  * it NOB =0, complete section will be copied on to other.
166  * if NOB !=0, only NOB will be copied from the given offset.
167  */
168 
169 struct bcm_flash2x_copy_section {
170 	enum bcm_flash2x_section_val SrcSection;
171 	enum bcm_flash2x_section_val DstSection;
172 	u32 offset;
173 	u32 numOfBytes;
174 };
175 
176 /*
177  * This section provide the complete bitmap of the Flash.
178  * using this map lib/APP will isssue read/write command.
179  * Fields are defined as :
180  * Bit [0] = section is present  //1:present, 0: Not present
181  * Bit [1] = section is valid  //1: valid, 0: not valid
182  * Bit [2] = Section is R/W  //0: RW, 1: RO
183  * Bit [3] = Section is Active or not 1 means Active, 0->inactive
184  * Bit [7...3] = Reserved
185  */
186 
187 struct bcm_flash2x_bitmap {
188 	unsigned char ISO_IMAGE1;
189 	unsigned char ISO_IMAGE2;
190 	unsigned char DSD0;
191 	unsigned char DSD1;
192 	unsigned char DSD2;
193 	unsigned char VSA0;
194 	unsigned char VSA1;
195 	unsigned char VSA2;
196 	unsigned char SCSI;
197 	unsigned char CONTROL_SECTION;
198 	/* Reserved for future use */
199 	unsigned char Reserved0;
200 	unsigned char Reserved1;
201 	unsigned char Reserved2;
202 };
203 
204 struct bcm_time_elapsed {
205 	u64 ul64TimeElapsedSinceNetEntry;
206 	u32 uiReserved[4];
207 };
208 
209 enum {
210 	WIMAX_IDX = 0,  /* To access WiMAX chip GPIO's for GPIO_MULTI_INFO or GPIO_MULTI_MODE */
211 	HOST_IDX,	/* To access Host chip GPIO's for GPIO_MULTI_INFO or GPIO_MULTI_MODE */
212 	MAX_IDX
213 };
214 
215 struct bcm_gpio_multi_info {
216 	unsigned int uiGPIOCommand; /* 1 for set and 0 for get */
217 	unsigned int uiGPIOMask;    /* set the correspondig bit to 1 to access GPIO */
218 	unsigned int uiGPIOValue;   /* 0 or 1; value to be set when command is 1. */
219 } __packed;
220 
221 struct bcm_gpio_multi_mode {
222 	unsigned int uiGPIOMode;    /* 1 for OUT mode, 0 for IN mode */
223 	unsigned int uiGPIOMask;    /* GPIO mask to set mode */
224 } __packed;
225 
226 #endif
227