1 /*
2 * CS4270 ALSA SoC (ASoC) codec driver
3 *
4 * Author: Timur Tabi <timur@freescale.com>
5 *
6 * Copyright 2007-2009 Freescale Semiconductor, Inc. This file is licensed
7 * under the terms of the GNU General Public License version 2. This
8 * program is licensed "as is" without any warranty of any kind, whether
9 * express or implied.
10 *
11 * This is an ASoC device driver for the Cirrus Logic CS4270 codec.
12 *
13 * Current features/limitations:
14 *
15 * - Software mode is supported. Stand-alone mode is not supported.
16 * - Only I2C is supported, not SPI
17 * - Support for master and slave mode
18 * - The machine driver's 'startup' function must call
19 * cs4270_set_dai_sysclk() with the value of MCLK.
20 * - Only I2S and left-justified modes are supported
21 * - Power management is supported
22 */
23
24 #include <linux/module.h>
25 #include <linux/slab.h>
26 #include <sound/core.h>
27 #include <sound/soc.h>
28 #include <sound/initval.h>
29 #include <linux/i2c.h>
30 #include <linux/delay.h>
31 #include <linux/regulator/consumer.h>
32 #include <linux/of_device.h>
33 #include <linux/of_gpio.h>
34
35 /*
36 * The codec isn't really big-endian or little-endian, since the I2S
37 * interface requires data to be sent serially with the MSbit first.
38 * However, to support BE and LE I2S devices, we specify both here. That
39 * way, ALSA will always match the bit patterns.
40 */
41 #define CS4270_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
42 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \
43 SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \
44 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \
45 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | \
46 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE)
47
48 /* CS4270 registers addresses */
49 #define CS4270_CHIPID 0x01 /* Chip ID */
50 #define CS4270_PWRCTL 0x02 /* Power Control */
51 #define CS4270_MODE 0x03 /* Mode Control */
52 #define CS4270_FORMAT 0x04 /* Serial Format, ADC/DAC Control */
53 #define CS4270_TRANS 0x05 /* Transition Control */
54 #define CS4270_MUTE 0x06 /* Mute Control */
55 #define CS4270_VOLA 0x07 /* DAC Channel A Volume Control */
56 #define CS4270_VOLB 0x08 /* DAC Channel B Volume Control */
57
58 #define CS4270_FIRSTREG 0x01
59 #define CS4270_LASTREG 0x08
60 #define CS4270_NUMREGS (CS4270_LASTREG - CS4270_FIRSTREG + 1)
61 #define CS4270_I2C_INCR 0x80
62
63 /* Bit masks for the CS4270 registers */
64 #define CS4270_CHIPID_ID 0xF0
65 #define CS4270_CHIPID_REV 0x0F
66 #define CS4270_PWRCTL_FREEZE 0x80
67 #define CS4270_PWRCTL_PDN_ADC 0x20
68 #define CS4270_PWRCTL_PDN_DAC 0x02
69 #define CS4270_PWRCTL_PDN 0x01
70 #define CS4270_PWRCTL_PDN_ALL \
71 (CS4270_PWRCTL_PDN_ADC | CS4270_PWRCTL_PDN_DAC | CS4270_PWRCTL_PDN)
72 #define CS4270_MODE_SPEED_MASK 0x30
73 #define CS4270_MODE_1X 0x00
74 #define CS4270_MODE_2X 0x10
75 #define CS4270_MODE_4X 0x20
76 #define CS4270_MODE_SLAVE 0x30
77 #define CS4270_MODE_DIV_MASK 0x0E
78 #define CS4270_MODE_DIV1 0x00
79 #define CS4270_MODE_DIV15 0x02
80 #define CS4270_MODE_DIV2 0x04
81 #define CS4270_MODE_DIV3 0x06
82 #define CS4270_MODE_DIV4 0x08
83 #define CS4270_MODE_POPGUARD 0x01
84 #define CS4270_FORMAT_FREEZE_A 0x80
85 #define CS4270_FORMAT_FREEZE_B 0x40
86 #define CS4270_FORMAT_LOOPBACK 0x20
87 #define CS4270_FORMAT_DAC_MASK 0x18
88 #define CS4270_FORMAT_DAC_LJ 0x00
89 #define CS4270_FORMAT_DAC_I2S 0x08
90 #define CS4270_FORMAT_DAC_RJ16 0x18
91 #define CS4270_FORMAT_DAC_RJ24 0x10
92 #define CS4270_FORMAT_ADC_MASK 0x01
93 #define CS4270_FORMAT_ADC_LJ 0x00
94 #define CS4270_FORMAT_ADC_I2S 0x01
95 #define CS4270_TRANS_ONE_VOL 0x80
96 #define CS4270_TRANS_SOFT 0x40
97 #define CS4270_TRANS_ZERO 0x20
98 #define CS4270_TRANS_INV_ADC_A 0x08
99 #define CS4270_TRANS_INV_ADC_B 0x10
100 #define CS4270_TRANS_INV_DAC_A 0x02
101 #define CS4270_TRANS_INV_DAC_B 0x04
102 #define CS4270_TRANS_DEEMPH 0x01
103 #define CS4270_MUTE_AUTO 0x20
104 #define CS4270_MUTE_ADC_A 0x08
105 #define CS4270_MUTE_ADC_B 0x10
106 #define CS4270_MUTE_POLARITY 0x04
107 #define CS4270_MUTE_DAC_A 0x01
108 #define CS4270_MUTE_DAC_B 0x02
109
110 /* Power-on default values for the registers
111 *
112 * This array contains the power-on default values of the registers, with the
113 * exception of the "CHIPID" register (01h). The lower four bits of that
114 * register contain the hardware revision, so it is treated as volatile.
115 */
116 static const struct reg_default cs4270_reg_defaults[] = {
117 { 2, 0x00 },
118 { 3, 0x30 },
119 { 4, 0x00 },
120 { 5, 0x60 },
121 { 6, 0x20 },
122 { 7, 0x00 },
123 { 8, 0x00 },
124 };
125
126 static const char *supply_names[] = {
127 "va", "vd", "vlc"
128 };
129
130 /* Private data for the CS4270 */
131 struct cs4270_private {
132 struct regmap *regmap;
133 unsigned int mclk; /* Input frequency of the MCLK pin */
134 unsigned int mode; /* The mode (I2S or left-justified) */
135 unsigned int slave_mode;
136 unsigned int manual_mute;
137
138 /* power domain regulators */
139 struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)];
140 };
141
142 /**
143 * struct cs4270_mode_ratios - clock ratio tables
144 * @ratio: the ratio of MCLK to the sample rate
145 * @speed_mode: the Speed Mode bits to set in the Mode Control register for
146 * this ratio
147 * @mclk: the Ratio Select bits to set in the Mode Control register for this
148 * ratio
149 *
150 * The data for this chart is taken from Table 5 of the CS4270 reference
151 * manual.
152 *
153 * This table is used to determine how to program the Mode Control register.
154 * It is also used by cs4270_set_dai_sysclk() to tell ALSA which sampling
155 * rates the CS4270 currently supports.
156 *
157 * @speed_mode is the corresponding bit pattern to be written to the
158 * MODE bits of the Mode Control Register
159 *
160 * @mclk is the corresponding bit pattern to be wirten to the MCLK bits of
161 * the Mode Control Register.
162 *
163 * In situations where a single ratio is represented by multiple speed
164 * modes, we favor the slowest speed. E.g, for a ratio of 128, we pick
165 * double-speed instead of quad-speed. However, the CS4270 errata states
166 * that divide-By-1.5 can cause failures, so we avoid that mode where
167 * possible.
168 *
169 * Errata: There is an errata for the CS4270 where divide-by-1.5 does not
170 * work if Vd is 3.3V. If this effects you, select the
171 * CONFIG_SND_SOC_CS4270_VD33_ERRATA Kconfig option, and the driver will
172 * never select any sample rates that require divide-by-1.5.
173 */
174 struct cs4270_mode_ratios {
175 unsigned int ratio;
176 u8 speed_mode;
177 u8 mclk;
178 };
179
180 static struct cs4270_mode_ratios cs4270_mode_ratios[] = {
181 {64, CS4270_MODE_4X, CS4270_MODE_DIV1},
182 #ifndef CONFIG_SND_SOC_CS4270_VD33_ERRATA
183 {96, CS4270_MODE_4X, CS4270_MODE_DIV15},
184 #endif
185 {128, CS4270_MODE_2X, CS4270_MODE_DIV1},
186 {192, CS4270_MODE_4X, CS4270_MODE_DIV3},
187 {256, CS4270_MODE_1X, CS4270_MODE_DIV1},
188 {384, CS4270_MODE_2X, CS4270_MODE_DIV3},
189 {512, CS4270_MODE_1X, CS4270_MODE_DIV2},
190 {768, CS4270_MODE_1X, CS4270_MODE_DIV3},
191 {1024, CS4270_MODE_1X, CS4270_MODE_DIV4}
192 };
193
194 /* The number of MCLK/LRCK ratios supported by the CS4270 */
195 #define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios)
196
cs4270_reg_is_readable(struct device * dev,unsigned int reg)197 static bool cs4270_reg_is_readable(struct device *dev, unsigned int reg)
198 {
199 return (reg >= CS4270_FIRSTREG) && (reg <= CS4270_LASTREG);
200 }
201
cs4270_reg_is_volatile(struct device * dev,unsigned int reg)202 static bool cs4270_reg_is_volatile(struct device *dev, unsigned int reg)
203 {
204 /* Unreadable registers are considered volatile */
205 if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG))
206 return 1;
207
208 return reg == CS4270_CHIPID;
209 }
210
211 /**
212 * cs4270_set_dai_sysclk - determine the CS4270 samples rates.
213 * @codec_dai: the codec DAI
214 * @clk_id: the clock ID (ignored)
215 * @freq: the MCLK input frequency
216 * @dir: the clock direction (ignored)
217 *
218 * This function is used to tell the codec driver what the input MCLK
219 * frequency is.
220 *
221 * The value of MCLK is used to determine which sample rates are supported
222 * by the CS4270. The ratio of MCLK / Fs must be equal to one of nine
223 * supported values - 64, 96, 128, 192, 256, 384, 512, 768, and 1024.
224 *
225 * This function calculates the nine ratios and determines which ones match
226 * a standard sample rate. If there's a match, then it is added to the list
227 * of supported sample rates.
228 *
229 * This function must be called by the machine driver's 'startup' function,
230 * otherwise the list of supported sample rates will not be available in
231 * time for ALSA.
232 *
233 * For setups with variable MCLKs, pass 0 as 'freq' argument. This will cause
234 * theoretically possible sample rates to be enabled. Call it again with a
235 * proper value set one the external clock is set (most probably you would do
236 * that from a machine's driver 'hw_param' hook.
237 */
cs4270_set_dai_sysclk(struct snd_soc_dai * codec_dai,int clk_id,unsigned int freq,int dir)238 static int cs4270_set_dai_sysclk(struct snd_soc_dai *codec_dai,
239 int clk_id, unsigned int freq, int dir)
240 {
241 struct snd_soc_codec *codec = codec_dai->codec;
242 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
243
244 cs4270->mclk = freq;
245 return 0;
246 }
247
248 /**
249 * cs4270_set_dai_fmt - configure the codec for the selected audio format
250 * @codec_dai: the codec DAI
251 * @format: a SND_SOC_DAIFMT_x value indicating the data format
252 *
253 * This function takes a bitmask of SND_SOC_DAIFMT_x bits and programs the
254 * codec accordingly.
255 *
256 * Currently, this function only supports SND_SOC_DAIFMT_I2S and
257 * SND_SOC_DAIFMT_LEFT_J. The CS4270 codec also supports right-justified
258 * data for playback only, but ASoC currently does not support different
259 * formats for playback vs. record.
260 */
cs4270_set_dai_fmt(struct snd_soc_dai * codec_dai,unsigned int format)261 static int cs4270_set_dai_fmt(struct snd_soc_dai *codec_dai,
262 unsigned int format)
263 {
264 struct snd_soc_codec *codec = codec_dai->codec;
265 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
266
267 /* set DAI format */
268 switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
269 case SND_SOC_DAIFMT_I2S:
270 case SND_SOC_DAIFMT_LEFT_J:
271 cs4270->mode = format & SND_SOC_DAIFMT_FORMAT_MASK;
272 break;
273 default:
274 dev_err(codec->dev, "invalid dai format\n");
275 return -EINVAL;
276 }
277
278 /* set master/slave audio interface */
279 switch (format & SND_SOC_DAIFMT_MASTER_MASK) {
280 case SND_SOC_DAIFMT_CBS_CFS:
281 cs4270->slave_mode = 1;
282 break;
283 case SND_SOC_DAIFMT_CBM_CFM:
284 cs4270->slave_mode = 0;
285 break;
286 default:
287 /* all other modes are unsupported by the hardware */
288 dev_err(codec->dev, "Unknown master/slave configuration\n");
289 return -EINVAL;
290 }
291
292 return 0;
293 }
294
295 /**
296 * cs4270_hw_params - program the CS4270 with the given hardware parameters.
297 * @substream: the audio stream
298 * @params: the hardware parameters to set
299 * @dai: the SOC DAI (ignored)
300 *
301 * This function programs the hardware with the values provided.
302 * Specifically, the sample rate and the data format.
303 *
304 * The .ops functions are used to provide board-specific data, like input
305 * frequencies, to this driver. This function takes that information,
306 * combines it with the hardware parameters provided, and programs the
307 * hardware accordingly.
308 */
cs4270_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)309 static int cs4270_hw_params(struct snd_pcm_substream *substream,
310 struct snd_pcm_hw_params *params,
311 struct snd_soc_dai *dai)
312 {
313 struct snd_soc_codec *codec = dai->codec;
314 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
315 int ret;
316 unsigned int i;
317 unsigned int rate;
318 unsigned int ratio;
319 int reg;
320
321 /* Figure out which MCLK/LRCK ratio to use */
322
323 rate = params_rate(params); /* Sampling rate, in Hz */
324 ratio = cs4270->mclk / rate; /* MCLK/LRCK ratio */
325
326 for (i = 0; i < NUM_MCLK_RATIOS; i++) {
327 if (cs4270_mode_ratios[i].ratio == ratio)
328 break;
329 }
330
331 if (i == NUM_MCLK_RATIOS) {
332 /* We did not find a matching ratio */
333 dev_err(codec->dev, "could not find matching ratio\n");
334 return -EINVAL;
335 }
336
337 /* Set the sample rate */
338
339 reg = snd_soc_read(codec, CS4270_MODE);
340 reg &= ~(CS4270_MODE_SPEED_MASK | CS4270_MODE_DIV_MASK);
341 reg |= cs4270_mode_ratios[i].mclk;
342
343 if (cs4270->slave_mode)
344 reg |= CS4270_MODE_SLAVE;
345 else
346 reg |= cs4270_mode_ratios[i].speed_mode;
347
348 ret = snd_soc_write(codec, CS4270_MODE, reg);
349 if (ret < 0) {
350 dev_err(codec->dev, "i2c write failed\n");
351 return ret;
352 }
353
354 /* Set the DAI format */
355
356 reg = snd_soc_read(codec, CS4270_FORMAT);
357 reg &= ~(CS4270_FORMAT_DAC_MASK | CS4270_FORMAT_ADC_MASK);
358
359 switch (cs4270->mode) {
360 case SND_SOC_DAIFMT_I2S:
361 reg |= CS4270_FORMAT_DAC_I2S | CS4270_FORMAT_ADC_I2S;
362 break;
363 case SND_SOC_DAIFMT_LEFT_J:
364 reg |= CS4270_FORMAT_DAC_LJ | CS4270_FORMAT_ADC_LJ;
365 break;
366 default:
367 dev_err(codec->dev, "unknown dai format\n");
368 return -EINVAL;
369 }
370
371 ret = snd_soc_write(codec, CS4270_FORMAT, reg);
372 if (ret < 0) {
373 dev_err(codec->dev, "i2c write failed\n");
374 return ret;
375 }
376
377 return ret;
378 }
379
380 /**
381 * cs4270_dai_mute - enable/disable the CS4270 external mute
382 * @dai: the SOC DAI
383 * @mute: 0 = disable mute, 1 = enable mute
384 *
385 * This function toggles the mute bits in the MUTE register. The CS4270's
386 * mute capability is intended for external muting circuitry, so if the
387 * board does not have the MUTEA or MUTEB pins connected to such circuitry,
388 * then this function will do nothing.
389 */
cs4270_dai_mute(struct snd_soc_dai * dai,int mute)390 static int cs4270_dai_mute(struct snd_soc_dai *dai, int mute)
391 {
392 struct snd_soc_codec *codec = dai->codec;
393 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
394 int reg6;
395
396 reg6 = snd_soc_read(codec, CS4270_MUTE);
397
398 if (mute)
399 reg6 |= CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B;
400 else {
401 reg6 &= ~(CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B);
402 reg6 |= cs4270->manual_mute;
403 }
404
405 return snd_soc_write(codec, CS4270_MUTE, reg6);
406 }
407
408 /**
409 * cs4270_soc_put_mute - put callback for the 'Master Playback switch'
410 * alsa control.
411 * @kcontrol: mixer control
412 * @ucontrol: control element information
413 *
414 * This function basically passes the arguments on to the generic
415 * snd_soc_put_volsw() function and saves the mute information in
416 * our private data structure. This is because we want to prevent
417 * cs4270_dai_mute() neglecting the user's decision to manually
418 * mute the codec's output.
419 *
420 * Returns 0 for success.
421 */
cs4270_soc_put_mute(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)422 static int cs4270_soc_put_mute(struct snd_kcontrol *kcontrol,
423 struct snd_ctl_elem_value *ucontrol)
424 {
425 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
426 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
427 int left = !ucontrol->value.integer.value[0];
428 int right = !ucontrol->value.integer.value[1];
429
430 cs4270->manual_mute = (left ? CS4270_MUTE_DAC_A : 0) |
431 (right ? CS4270_MUTE_DAC_B : 0);
432
433 return snd_soc_put_volsw(kcontrol, ucontrol);
434 }
435
436 /* A list of non-DAPM controls that the CS4270 supports */
437 static const struct snd_kcontrol_new cs4270_snd_controls[] = {
438 SOC_DOUBLE_R("Master Playback Volume",
439 CS4270_VOLA, CS4270_VOLB, 0, 0xFF, 1),
440 SOC_SINGLE("Digital Sidetone Switch", CS4270_FORMAT, 5, 1, 0),
441 SOC_SINGLE("Soft Ramp Switch", CS4270_TRANS, 6, 1, 0),
442 SOC_SINGLE("Zero Cross Switch", CS4270_TRANS, 5, 1, 0),
443 SOC_SINGLE("De-emphasis filter", CS4270_TRANS, 0, 1, 0),
444 SOC_SINGLE("Popguard Switch", CS4270_MODE, 0, 1, 1),
445 SOC_SINGLE("Auto-Mute Switch", CS4270_MUTE, 5, 1, 0),
446 SOC_DOUBLE("Master Capture Switch", CS4270_MUTE, 3, 4, 1, 1),
447 SOC_DOUBLE_EXT("Master Playback Switch", CS4270_MUTE, 0, 1, 1, 1,
448 snd_soc_get_volsw, cs4270_soc_put_mute),
449 };
450
451 static const struct snd_soc_dai_ops cs4270_dai_ops = {
452 .hw_params = cs4270_hw_params,
453 .set_sysclk = cs4270_set_dai_sysclk,
454 .set_fmt = cs4270_set_dai_fmt,
455 .digital_mute = cs4270_dai_mute,
456 };
457
458 static struct snd_soc_dai_driver cs4270_dai = {
459 .name = "cs4270-hifi",
460 .playback = {
461 .stream_name = "Playback",
462 .channels_min = 2,
463 .channels_max = 2,
464 .rates = SNDRV_PCM_RATE_CONTINUOUS,
465 .rate_min = 4000,
466 .rate_max = 216000,
467 .formats = CS4270_FORMATS,
468 },
469 .capture = {
470 .stream_name = "Capture",
471 .channels_min = 2,
472 .channels_max = 2,
473 .rates = SNDRV_PCM_RATE_CONTINUOUS,
474 .rate_min = 4000,
475 .rate_max = 216000,
476 .formats = CS4270_FORMATS,
477 },
478 .ops = &cs4270_dai_ops,
479 };
480
481 /**
482 * cs4270_probe - ASoC probe function
483 * @pdev: platform device
484 *
485 * This function is called when ASoC has all the pieces it needs to
486 * instantiate a sound driver.
487 */
cs4270_probe(struct snd_soc_codec * codec)488 static int cs4270_probe(struct snd_soc_codec *codec)
489 {
490 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
491 int ret;
492
493 /* Tell ASoC what kind of I/O to use to read the registers. ASoC will
494 * then do the I2C transactions itself.
495 */
496 ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
497 if (ret < 0) {
498 dev_err(codec->dev, "failed to set cache I/O (ret=%i)\n", ret);
499 return ret;
500 }
501
502 /* Disable auto-mute. This feature appears to be buggy. In some
503 * situations, auto-mute will not deactivate when it should, so we want
504 * this feature disabled by default. An application (e.g. alsactl) can
505 * re-enabled it by using the controls.
506 */
507 ret = snd_soc_update_bits(codec, CS4270_MUTE, CS4270_MUTE_AUTO, 0);
508 if (ret < 0) {
509 dev_err(codec->dev, "i2c write failed\n");
510 return ret;
511 }
512
513 /* Disable automatic volume control. The hardware enables, and it
514 * causes volume change commands to be delayed, sometimes until after
515 * playback has started. An application (e.g. alsactl) can
516 * re-enabled it by using the controls.
517 */
518 ret = snd_soc_update_bits(codec, CS4270_TRANS,
519 CS4270_TRANS_SOFT | CS4270_TRANS_ZERO, 0);
520 if (ret < 0) {
521 dev_err(codec->dev, "i2c write failed\n");
522 return ret;
523 }
524
525 ret = regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies),
526 cs4270->supplies);
527
528 return ret;
529 }
530
531 /**
532 * cs4270_remove - ASoC remove function
533 * @pdev: platform device
534 *
535 * This function is the counterpart to cs4270_probe().
536 */
cs4270_remove(struct snd_soc_codec * codec)537 static int cs4270_remove(struct snd_soc_codec *codec)
538 {
539 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
540
541 regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies), cs4270->supplies);
542
543 return 0;
544 };
545
546 #ifdef CONFIG_PM
547
548 /* This suspend/resume implementation can handle both - a simple standby
549 * where the codec remains powered, and a full suspend, where the voltage
550 * domain the codec is connected to is teared down and/or any other hardware
551 * reset condition is asserted.
552 *
553 * The codec's own power saving features are enabled in the suspend callback,
554 * and all registers are written back to the hardware when resuming.
555 */
556
cs4270_soc_suspend(struct snd_soc_codec * codec)557 static int cs4270_soc_suspend(struct snd_soc_codec *codec)
558 {
559 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
560 int reg, ret;
561
562 reg = snd_soc_read(codec, CS4270_PWRCTL) | CS4270_PWRCTL_PDN_ALL;
563 if (reg < 0)
564 return reg;
565
566 ret = snd_soc_write(codec, CS4270_PWRCTL, reg);
567 if (ret < 0)
568 return ret;
569
570 regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies),
571 cs4270->supplies);
572
573 return 0;
574 }
575
cs4270_soc_resume(struct snd_soc_codec * codec)576 static int cs4270_soc_resume(struct snd_soc_codec *codec)
577 {
578 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
579 int reg, ret;
580
581 ret = regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies),
582 cs4270->supplies);
583 if (ret != 0)
584 return ret;
585
586 /* In case the device was put to hard reset during sleep, we need to
587 * wait 500ns here before any I2C communication. */
588 ndelay(500);
589
590 /* first restore the entire register cache ... */
591 regcache_sync(cs4270->regmap);
592
593 /* ... then disable the power-down bits */
594 reg = snd_soc_read(codec, CS4270_PWRCTL);
595 reg &= ~CS4270_PWRCTL_PDN_ALL;
596
597 return snd_soc_write(codec, CS4270_PWRCTL, reg);
598 }
599 #else
600 #define cs4270_soc_suspend NULL
601 #define cs4270_soc_resume NULL
602 #endif /* CONFIG_PM */
603
604 /*
605 * ASoC codec driver structure
606 */
607 static const struct snd_soc_codec_driver soc_codec_device_cs4270 = {
608 .probe = cs4270_probe,
609 .remove = cs4270_remove,
610 .suspend = cs4270_soc_suspend,
611 .resume = cs4270_soc_resume,
612
613 .controls = cs4270_snd_controls,
614 .num_controls = ARRAY_SIZE(cs4270_snd_controls),
615 };
616
617 /*
618 * cs4270_of_match - the device tree bindings
619 */
620 static const struct of_device_id cs4270_of_match[] = {
621 { .compatible = "cirrus,cs4270", },
622 { }
623 };
624 MODULE_DEVICE_TABLE(of, cs4270_of_match);
625
626 static const struct regmap_config cs4270_regmap = {
627 .reg_bits = 8,
628 .val_bits = 8,
629 .max_register = CS4270_LASTREG,
630 .reg_defaults = cs4270_reg_defaults,
631 .num_reg_defaults = ARRAY_SIZE(cs4270_reg_defaults),
632 .cache_type = REGCACHE_RBTREE,
633
634 .readable_reg = cs4270_reg_is_readable,
635 .volatile_reg = cs4270_reg_is_volatile,
636 };
637
638 /**
639 * cs4270_i2c_probe - initialize the I2C interface of the CS4270
640 * @i2c_client: the I2C client object
641 * @id: the I2C device ID (ignored)
642 *
643 * This function is called whenever the I2C subsystem finds a device that
644 * matches the device ID given via a prior call to i2c_add_driver().
645 */
cs4270_i2c_probe(struct i2c_client * i2c_client,const struct i2c_device_id * id)646 static int cs4270_i2c_probe(struct i2c_client *i2c_client,
647 const struct i2c_device_id *id)
648 {
649 struct device_node *np = i2c_client->dev.of_node;
650 struct cs4270_private *cs4270;
651 unsigned int val;
652 int ret, i;
653
654 cs4270 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs4270_private),
655 GFP_KERNEL);
656 if (!cs4270) {
657 dev_err(&i2c_client->dev, "could not allocate codec\n");
658 return -ENOMEM;
659 }
660
661 /* get the power supply regulators */
662 for (i = 0; i < ARRAY_SIZE(supply_names); i++)
663 cs4270->supplies[i].supply = supply_names[i];
664
665 ret = devm_regulator_bulk_get(&i2c_client->dev,
666 ARRAY_SIZE(cs4270->supplies),
667 cs4270->supplies);
668 if (ret < 0)
669 return ret;
670
671 /* See if we have a way to bring the codec out of reset */
672 if (np) {
673 enum of_gpio_flags flags;
674 int gpio = of_get_named_gpio_flags(np, "reset-gpio", 0, &flags);
675
676 if (gpio_is_valid(gpio)) {
677 ret = devm_gpio_request_one(&i2c_client->dev, gpio,
678 flags & OF_GPIO_ACTIVE_LOW ?
679 GPIOF_OUT_INIT_LOW : GPIOF_OUT_INIT_HIGH,
680 "cs4270 reset");
681 if (ret < 0)
682 return ret;
683 }
684 }
685
686 cs4270->regmap = devm_regmap_init_i2c(i2c_client, &cs4270_regmap);
687 if (IS_ERR(cs4270->regmap))
688 return PTR_ERR(cs4270->regmap);
689
690 /* Verify that we have a CS4270 */
691 ret = regmap_read(cs4270->regmap, CS4270_CHIPID, &val);
692 if (ret < 0) {
693 dev_err(&i2c_client->dev, "failed to read i2c at addr %X\n",
694 i2c_client->addr);
695 return ret;
696 }
697 /* The top four bits of the chip ID should be 1100. */
698 if ((val & 0xF0) != 0xC0) {
699 dev_err(&i2c_client->dev, "device at addr %X is not a CS4270\n",
700 i2c_client->addr);
701 return -ENODEV;
702 }
703
704 dev_info(&i2c_client->dev, "found device at i2c address %X\n",
705 i2c_client->addr);
706 dev_info(&i2c_client->dev, "hardware revision %X\n", val & 0xF);
707
708 i2c_set_clientdata(i2c_client, cs4270);
709
710 ret = snd_soc_register_codec(&i2c_client->dev,
711 &soc_codec_device_cs4270, &cs4270_dai, 1);
712 return ret;
713 }
714
715 /**
716 * cs4270_i2c_remove - remove an I2C device
717 * @i2c_client: the I2C client object
718 *
719 * This function is the counterpart to cs4270_i2c_probe().
720 */
cs4270_i2c_remove(struct i2c_client * i2c_client)721 static int cs4270_i2c_remove(struct i2c_client *i2c_client)
722 {
723 snd_soc_unregister_codec(&i2c_client->dev);
724 return 0;
725 }
726
727 /*
728 * cs4270_id - I2C device IDs supported by this driver
729 */
730 static const struct i2c_device_id cs4270_id[] = {
731 {"cs4270", 0},
732 {}
733 };
734 MODULE_DEVICE_TABLE(i2c, cs4270_id);
735
736 /*
737 * cs4270_i2c_driver - I2C device identification
738 *
739 * This structure tells the I2C subsystem how to identify and support a
740 * given I2C device type.
741 */
742 static struct i2c_driver cs4270_i2c_driver = {
743 .driver = {
744 .name = "cs4270",
745 .owner = THIS_MODULE,
746 .of_match_table = cs4270_of_match,
747 },
748 .id_table = cs4270_id,
749 .probe = cs4270_i2c_probe,
750 .remove = cs4270_i2c_remove,
751 };
752
753 module_i2c_driver(cs4270_i2c_driver);
754
755 MODULE_AUTHOR("Timur Tabi <timur@freescale.com>");
756 MODULE_DESCRIPTION("Cirrus Logic CS4270 ALSA SoC Codec Driver");
757 MODULE_LICENSE("GPL");
758