120 	while (clk->rate == 0)  in local_return_parent_rate()
123 	return clk->rate;  in local_return_parent_rate()
128 	.rate		= LPC32XX_CLOCK_OSC_FREQ,
193 	.rate		= LPC32XX_CLOCK_OSC_FREQ * 397,
199 	.rate		= LPC32XX_MAIN_OSC_FREQ,
262 	clkin = clk_armpll.parent->rate;  in local_update_armpll_rate()
265 	clk_armpll.rate = clk_get_pllrate_from_reg(clkin, pllreg);  in local_update_armpll_rate()
383 	return clk_check_pll_setup(clk_usbpll.parent->rate,  in local_clk_usbpll_setup()
452 	unsigned long rate)  in local_usbpll_round_rate()  argument
461 	rate = rate * 1000;  in local_usbpll_round_rate()
469 	if (local_clk_find_pll_cfg(clkin, rate, &pllsetup) == 0)  in local_usbpll_round_rate()
475 static int local_usbpll_set_rate(struct clk *clk, unsigned long rate)  in local_usbpll_set_rate()  argument
485 	rate = rate * 1000;  in local_usbpll_set_rate()
493 	if (local_clk_find_pll_cfg(clkin, rate, &pllsetup) == 0)  in local_usbpll_set_rate()
512 		clk->rate = clk_check_pll_setup(clkin, &pllsetup);  in local_usbpll_set_rate()
521 	.rate		= 48000, /* In KHz */
758 	.rate		= 1, /* 1 Hz */
875 	clk->rate = clk->get_rate(clk->parent) / divider;  in adc_onoff_enable()
917 	u32 div, rate, oldclk;  in mmc_get_rate()  local
927 	rate = clk->parent->get_rate(clk->parent);  in mmc_get_rate()
935 	return rate / div;  in mmc_get_rate()
938 static unsigned long mmc_round_rate(struct clk *clk, unsigned long rate)  in mmc_round_rate()  argument
945 	if (rate >= prate)  in mmc_round_rate()
948 	div = prate / rate;  in mmc_round_rate()
955 static int mmc_set_rate(struct clk *clk, unsigned long rate)  in mmc_set_rate()  argument
958 	unsigned long prate, div, crate = mmc_round_rate(clk, rate);  in mmc_set_rate()
986 	u32 tmp, div, rate, oldclk;  in clcd_get_rate()  local
995 	rate = clk->parent->get_rate(clk->parent);  in clcd_get_rate()
999 		return rate;  in clcd_get_rate()
1002 	tmp = rate / (2 + div);  in clcd_get_rate()
1007 static int clcd_set_rate(struct clk *clk, unsigned long rate)  in clcd_set_rate()  argument
1019 	if (rate < prate) {  in clcd_set_rate()
1021 		div = prate / rate;  in clcd_set_rate()
1038 static unsigned long clcd_round_rate(struct clk *clk, unsigned long rate)  in clcd_round_rate()  argument
1044 	if (rate >= prate)  in clcd_round_rate()
1045 		rate = prate;  in clcd_round_rate()
1047 		div = prate / rate;  in clcd_round_rate()
1051 		rate = prate / div;  in clcd_round_rate()
1054 	return rate;  in clcd_round_rate()
1146 int clk_set_rate(struct clk *clk, unsigned long rate)  in clk_set_rate()  argument
1156 		ret = clk->set_rate(clk, rate);  in clk_set_rate()
1165 long clk_round_rate(struct clk *clk, unsigned long rate)  in clk_round_rate()  argument
1168 		rate = clk->round_rate(clk, rate);  in clk_round_rate()
1170 		rate = clk->get_rate(clk);  in clk_round_rate()
1172 	return rate;  in clk_round_rate()
1256 	clk_sys.rate = clk_sys.parent->rate;  in clk_init()
1262 	clk_hclk.rate = clk_hclk.parent->rate / clk_get_hclk_div();  in clk_init()
1263 	clk_pclk.rate = clk_pclk.parent->rate / clk_get_pclk_div();  in clk_init()