114 void mvebu_pmsu_set_cpu_boot_addr(int hw_cpu, void *boot_addr)  in mvebu_pmsu_set_cpu_boot_addr()  argument
117 		PMSU_BOOT_ADDR_REDIRECT_OFFSET(hw_cpu));  in mvebu_pmsu_set_cpu_boot_addr()
230 	unsigned int hw_cpu = cpu_logical_map(smp_processor_id());  in mvebu_v7_pmsu_idle_prepare()  local
241 	reg = readl(pmsu_mp_base + PMSU_STATUS_AND_MASK(hw_cpu));  in mvebu_v7_pmsu_idle_prepare()
248 	writel(reg, pmsu_mp_base + PMSU_STATUS_AND_MASK(hw_cpu));  in mvebu_v7_pmsu_idle_prepare()
250 	reg = readl(pmsu_mp_base + PMSU_CONTROL_AND_CONFIG(hw_cpu));  in mvebu_v7_pmsu_idle_prepare()
257 	writel(reg, pmsu_mp_base + PMSU_CONTROL_AND_CONFIG(hw_cpu));  in mvebu_v7_pmsu_idle_prepare()
261 		reg = readl(pmsu_mp_base + PMSU_CPU_POWER_DOWN_CONTROL(hw_cpu));  in mvebu_v7_pmsu_idle_prepare()
263 		writel(reg, pmsu_mp_base + PMSU_CPU_POWER_DOWN_CONTROL(hw_cpu));  in mvebu_v7_pmsu_idle_prepare()
344 	unsigned int hw_cpu = cpu_logical_map(smp_processor_id());  in mvebu_v7_pmsu_idle_exit()  local
350 	reg = readl(pmsu_mp_base + PMSU_CONTROL_AND_CONFIG(hw_cpu));  in mvebu_v7_pmsu_idle_exit()
352 	writel(reg, pmsu_mp_base + PMSU_CONTROL_AND_CONFIG(hw_cpu));  in mvebu_v7_pmsu_idle_exit()
355 	reg = readl(pmsu_mp_base + PMSU_STATUS_AND_MASK(hw_cpu));  in mvebu_v7_pmsu_idle_exit()
360 	writel(reg, pmsu_mp_base + PMSU_STATUS_AND_MASK(hw_cpu));  in mvebu_v7_pmsu_idle_exit()
367 		unsigned int hw_cpu = cpu_logical_map(smp_processor_id());  in mvebu_v7_cpu_pm_notify()  local
368 		mvebu_pmsu_set_cpu_boot_addr(hw_cpu, mvebu_cpu_resume);  in mvebu_v7_cpu_pm_notify()