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Lines Matching refs:SH_CLK_SET_RATIO

265 		SH_CLK_SET_RATIO(&plla_clk_ratio,	21, 1);  in r8a7778_clock_init()
266 SH_CLK_SET_RATIO(&pllb_clk_ratio, 21, 1); in r8a7778_clock_init()
270 SH_CLK_SET_RATIO(&plla_clk_ratio, 24, 1); in r8a7778_clock_init()
271 SH_CLK_SET_RATIO(&pllb_clk_ratio, 24, 1); in r8a7778_clock_init()
275 SH_CLK_SET_RATIO(&plla_clk_ratio, 28, 1); in r8a7778_clock_init()
276 SH_CLK_SET_RATIO(&pllb_clk_ratio, 28, 1); in r8a7778_clock_init()
280 SH_CLK_SET_RATIO(&plla_clk_ratio, 32, 1); in r8a7778_clock_init()
281 SH_CLK_SET_RATIO(&pllb_clk_ratio, 32, 1); in r8a7778_clock_init()
285 SH_CLK_SET_RATIO(&plla_clk_ratio, 24, 1); in r8a7778_clock_init()
286 SH_CLK_SET_RATIO(&pllb_clk_ratio, 21, 1); in r8a7778_clock_init()
290 SH_CLK_SET_RATIO(&plla_clk_ratio, 28, 1); in r8a7778_clock_init()
291 SH_CLK_SET_RATIO(&pllb_clk_ratio, 21, 1); in r8a7778_clock_init()
295 SH_CLK_SET_RATIO(&plla_clk_ratio, 32, 1); in r8a7778_clock_init()
296 SH_CLK_SET_RATIO(&pllb_clk_ratio, 24, 1); in r8a7778_clock_init()
303 SH_CLK_SET_RATIO(&i_clk_ratio, 1, 1); in r8a7778_clock_init()
304 SH_CLK_SET_RATIO(&s_clk_ratio, 1, 3); in r8a7778_clock_init()
305 SH_CLK_SET_RATIO(&s1_clk_ratio, 1, 6); in r8a7778_clock_init()
306 SH_CLK_SET_RATIO(&s3_clk_ratio, 1, 4); in r8a7778_clock_init()
307 SH_CLK_SET_RATIO(&s4_clk_ratio, 1, 8); in r8a7778_clock_init()
308 SH_CLK_SET_RATIO(&p_clk_ratio, 1, 12); in r8a7778_clock_init()
309 SH_CLK_SET_RATIO(&g_clk_ratio, 1, 12); in r8a7778_clock_init()
311 SH_CLK_SET_RATIO(&b_clk_ratio, 1, 18); in r8a7778_clock_init()
312 SH_CLK_SET_RATIO(&out_clk_ratio, 1, 18); in r8a7778_clock_init()
314 SH_CLK_SET_RATIO(&b_clk_ratio, 1, 12); in r8a7778_clock_init()
315 SH_CLK_SET_RATIO(&out_clk_ratio, 1, 12); in r8a7778_clock_init()
318 SH_CLK_SET_RATIO(&i_clk_ratio, 1, 1); in r8a7778_clock_init()
319 SH_CLK_SET_RATIO(&s_clk_ratio, 1, 4); in r8a7778_clock_init()
320 SH_CLK_SET_RATIO(&s1_clk_ratio, 1, 8); in r8a7778_clock_init()
321 SH_CLK_SET_RATIO(&s3_clk_ratio, 1, 4); in r8a7778_clock_init()
322 SH_CLK_SET_RATIO(&s4_clk_ratio, 1, 8); in r8a7778_clock_init()
323 SH_CLK_SET_RATIO(&p_clk_ratio, 1, 16); in r8a7778_clock_init()
324 SH_CLK_SET_RATIO(&g_clk_ratio, 1, 12); in r8a7778_clock_init()
326 SH_CLK_SET_RATIO(&b_clk_ratio, 1, 16); in r8a7778_clock_init()
327 SH_CLK_SET_RATIO(&out_clk_ratio, 1, 16); in r8a7778_clock_init()
329 SH_CLK_SET_RATIO(&b_clk_ratio, 1, 12); in r8a7778_clock_init()
330 SH_CLK_SET_RATIO(&out_clk_ratio, 1, 12); in r8a7778_clock_init()