Lines Matching refs:lsr
33 add pc, pc, r7, lsr #22 @ Now branch to the relevant processing routine
64 add r6, r6, r9, lsr #1
66 add r6, r6, r9, lsr #2
68 add r6, r6, r9, lsr #3
69 add r6, r6, r6, lsr #8
70 add r6, r6, r6, lsr #4
73 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
77 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
87 orrne r6, r9, r6, lsr #4 @ combine nibbles } else
91 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
95 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
105 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
107 subne r7, r7, r6, lsr #20 @ Undo increment
108 addeq r7, r7, r6, lsr #20 @ Undo decrement
109 str r7, [r2, r9, lsr #14] @ Put register 'Rn'
118 mov r9, r8, lsr #7 @ get shift count
133 mov r6, r6, lsr r9 @ 4: LSR #!0
135 mov r6, r6, lsr #32 @ 5: LSR #32
163 add pc, pc, r7, lsr #10 @ lookup in table
195 add r6, r6, r9, lsr #1
198 add r6, r6, r9, lsr #2
199 movs r7, r8, lsr #9 @ C = r8 bit 8 (R bit)
200 adc r6, r6, r6, lsr #4 @ high + low nibble + R bit
212 add r6, r6, r9, lsr #1
215 add r6, r6, r9, lsr #2
216 add r6, r6, r6, lsr #4
218 ldr r7, [r2, r9, lsr #6]
221 str r7, [r2, r9, lsr #6]