Lines Matching refs:x24
113 stp x24, x25, [sp, #16 * 12]
266 ldp x24, x25, [sp, #16 * 12]
405 lsr x24, x1, #ESR_ELx_EC_SHIFT // exception class
406 cmp x24, #ESR_ELx_EC_DABT_CUR // data abort in EL1
408 cmp x24, #ESR_ELx_EC_IABT_CUR // instruction abort in EL1
410 cmp x24, #ESR_ELx_EC_SYS64 // configurable trap
412 cmp x24, #ESR_ELx_EC_SP_ALIGN // stack alignment exception
414 cmp x24, #ESR_ELx_EC_PC_ALIGN // pc alignment exception
416 cmp x24, #ESR_ELx_EC_UNKNOWN // unknown exception in EL1
418 cmp x24, #ESR_ELx_EC_BREAKPT_CUR // debug exception in EL1
462 cmp x24, #ESR_ELx_EC_BRK64 // if BRK64
463 cinc x24, x24, eq // set bit '0'
464 tbz x24, #0, el1_inv // EL1 only
505 mov x24, lr
509 ret x24
519 lsr x24, x25, #ESR_ELx_EC_SHIFT // exception class
520 cmp x24, #ESR_ELx_EC_SVC64 // SVC in 64-bit state
522 cmp x24, #ESR_ELx_EC_DABT_LOW // data abort in EL0
524 cmp x24, #ESR_ELx_EC_IABT_LOW // instruction abort in EL0
526 cmp x24, #ESR_ELx_EC_FP_ASIMD // FP/ASIMD access
528 cmp x24, #ESR_ELx_EC_FP_EXC64 // FP/ASIMD exception
530 cmp x24, #ESR_ELx_EC_SYS64 // configurable trap
532 cmp x24, #ESR_ELx_EC_SP_ALIGN // stack alignment exception
534 cmp x24, #ESR_ELx_EC_PC_ALIGN // pc alignment exception
536 cmp x24, #ESR_ELx_EC_UNKNOWN // unknown exception in EL0
538 cmp x24, #ESR_ELx_EC_BREAKPT_LOW // debug exception in EL0
547 lsr x24, x25, #ESR_ELx_EC_SHIFT // exception class
548 cmp x24, #ESR_ELx_EC_SVC32 // SVC in 32-bit state
550 cmp x24, #ESR_ELx_EC_DABT_LOW // data abort in EL0
552 cmp x24, #ESR_ELx_EC_IABT_LOW // instruction abort in EL0
554 cmp x24, #ESR_ELx_EC_FP_ASIMD // FP/ASIMD access
556 cmp x24, #ESR_ELx_EC_FP_EXC32 // FP/ASIMD exception
558 cmp x24, #ESR_ELx_EC_UNKNOWN // unknown exception in EL0
560 cmp x24, #ESR_ELx_EC_CP15_32 // CP15 MRC/MCR trap
562 cmp x24, #ESR_ELx_EC_CP15_64 // CP15 MRRC/MCRR trap
564 cmp x24, #ESR_ELx_EC_CP14_MR // CP14 MRC/MCR trap
566 cmp x24, #ESR_ELx_EC_CP14_LS // CP14 LDC/STC trap
568 cmp x24, #ESR_ELx_EC_CP14_64 // CP14 MRRC/MCRR trap
570 cmp x24, #ESR_ELx_EC_BREAKPT_LOW // debug exception in EL0
671 tbnz x24, #0, el0_inv // EL0 only
720 stp x23, x24, [x8], #16
728 ldp x23, x24, [x8], #16