50 	P4 = R7;	/* Store EXCAUSE */
59 	R7 = P4;  define
61 	cc = R6 == R7;
65 	cc = R6 == R7;
88 	(R7:6,P5:4) = [sp++];
112 	CC = R7 == R6;
194 	syscfg = R7;
222 	cc = R7 == R6;
227 	syscfg = R7;
234 	R7=LC0;
235 	LC0=R7;
236 	R7=LC1;
237 	LC1=R7;
249 	CC = R7 == R6;
253 	(R7:6,P5:4) = [sp++];
270 	[--sp] = (R7:6,P5:4);
385 	(R7:6,P5:4) = [sp++];
476 	[--sp] = (R7:6,P5:4);
1130 	R7 = [P5];  define
1131 	R7 <<= 1;               /* double, since we need to read twice */
1132 	LC0 = R7;
1133 	R7 <<= 2;               /* need to shift over again,
1139 	P2 = R7;
1141 	R7 = P3;  define
1142 	R7 = R7 & R6;  define
1143 	P3 = R7;
1153 	R7 = [P5];      /* read TBUF */  define
1155 	[P4] = R7;
1157 	R7 = P3;  define
1158 	R7 = R7 & R6;  define
1160 	P3 = R7;