Lines Matching refs:temp2
412 #define temp2 r3 /* careful, it overlaps with input registers */ macro
461 GET_IA64_MCA_DATA(temp2)
463 add temp1=temp2, regs // struct ia64_sal_os_state on MCA or INIT stack
464 add temp2=temp2, ms // struct ia64_sal_os_state+8 on MCA or INIT stack
468 st8 [temp2]=r8,16 // pal_proc
471 st8 [temp2]=r11,16 // rv_rc
475 st8 [temp2]=r19 // monarch
478 add temp2=SOS(SAL_GP), regs
481 st8 [temp2]=r10,16 // sal_gp
485 st8 [temp2]=r6,16 // prev_IA64_KR_CURRENT
489 st8 [temp2]=r0,16 // prev_task, starts off as NULL
493 st8 [temp2]=r6,16 // cr.ifa
497 st8 [temp2]=r11,16 // cr.iipa
506 st8 [temp2]=r6 // cr.iha
507 add temp2=SOS(CONTEXT), regs
511 st8 [temp2]=r6 // context, default is same context
520 add temp2=PT(B7), regs
523 st8 [temp2]=temp4,PT(AR_SSD)-PT(B7) // save b7
529 st8 [temp2]=temp4,PT(AR_PFS)-PT(AR_SSD) // save ar.ssd
534 st8 [temp2]=temp4,PT(AR_BSPSTORE)-PT(AR_PFS) // save ar.pfs
539 st8 [temp2]=temp4,PT(AR_FPSR)-PT(AR_BSPSTORE) // save ar.bspstore
548 st8 [temp2]=temp4,PT(F6)-PT(AR_FPSR) // save ar.fpsr
552 stf.spill [temp2]=f6,PT(F8)-PT(F6)
555 stf.spill [temp2]=f8,PT(F10)-PT(F8)
558 stf.spill [temp2]=f10
567 add temp2=SW(F3), regs
570 stf.spill [temp2]=f3,32
573 stf.spill [temp2]=f5,32
576 stf.spill [temp2]=f13,32
579 stf.spill [temp2]=f15,32
582 stf.spill [temp2]=f17,32
585 stf.spill [temp2]=f19,32
588 stf.spill [temp2]=f21,32
591 stf.spill [temp2]=f23,32
594 stf.spill [temp2]=f25,32
597 stf.spill [temp2]=f27,32
600 stf.spill [temp2]=f29,32
603 stf.spill [temp2]=f31,SW(B3)-SW(F31)
608 st8 [temp2]=temp4,16 // save b3
613 st8 [temp2]=temp4 // save b5
721 GET_IA64_MCA_DATA(temp2)
723 add regs=temp2, regs
726 add temp2=SW(F3), regs
729 ldf.fill f3=[temp2],32
732 ldf.fill f5=[temp2],32
735 ldf.fill f13=[temp2],32
738 ldf.fill f15=[temp2],32
741 ldf.fill f17=[temp2],32
744 ldf.fill f19=[temp2],32
747 ldf.fill f21=[temp2],32
750 ldf.fill f23=[temp2],32
753 ldf.fill f25=[temp2],32
756 ldf.fill f27=[temp2],32
759 ldf.fill f29=[temp2],32
762 ldf.fill f31=[temp2],SW(B3)-SW(F31)
765 ld8 temp4=[temp2],16 // restore b3
770 ld8 temp4=[temp2] // restore b5
783 add temp2=PT(B7), regs
786 ld8 temp4=[temp2],PT(AR_SSD)-PT(B7) // restore b7
791 ld8 temp4=[temp2],PT(AR_PFS)-PT(AR_SSD) // restore ar.ssd
797 ld8 temp4=[temp2],PT(AR_FPSR)-PT(AR_PFS) // restore ar.pfs
803 ld8 temp4=[temp2],PT(F7)-PT(AR_FPSR) // restore ar.fpsr
808 ldf.fill f7=[temp2],PT(F9)-PT(F7)
811 ldf.fill f9=[temp2],PT(F11)-PT(F9)
814 ldf.fill f11=[temp2]
820 add temp2=SOS(SAL_GP), regs
823 ld8 r9=[temp2],16 // sal_gp
826 ld8 r13=[temp2],16 // prev_IA64_KR_CURRENT
829 ld8 r20=[temp2],16 // prev_task
832 ld8 temp4=[temp2],16 // cr.ifa
837 ld8 temp4=[temp2],16 // cr.iipa
842 ld8 temp4=[temp2] // cr.iha
844 add temp2=SOS(CONTEXT), regs
851 ld8 r10=[temp2] // context
917 add temp2=MCA_SOS_OFFSET+SOS(PAL_MIN_STATE), r3
922 add temp2=temp2, temp1 // struct ia64_sal_os_state.pal_min_state on MCA or INIT stack
927 ld8 ms=[temp2] // pal_min_state, physical
932 st8 [temp2]=temp1 // pal_min_state, virtual
972 GET_IA64_MCA_DATA(temp2)
983 add regs=regs, temp2 // struct pt_regs on MCA or INIT stack
987 ld8 temp2=[temp1],PT(AR_BSPSTORE)-PT(LOADRS) // restore loadrs
990 mov ar.rsc=temp2
1028 DATA_PA_TO_VA(r12,temp2)
1074 #undef temp2