39 volatile __u8 *via1, *via2;  variable
129 			via1 = (void *) VIA1_BASE;  in via_init()
157 			via1 = (void *) VIA1_BASE;  in via_init()
171 	printk(KERN_INFO "VIA1 at %p is a 6522 or clone\n", via1);  in via_init()
191 	via1[vIER] = 0x7F;  in via_init()
192 	via1[vIFR] = 0x7F;  in via_init()
193 	via1[vT1LL] = 0;  in via_init()
194 	via1[vT1LH] = 0;  in via_init()
195 	via1[vT1CL] = 0;  in via_init()
196 	via1[vT1CH] = 0;  in via_init()
197 	via1[vT2CL] = 0;  in via_init()
198 	via1[vT2CH] = 0;  in via_init()
199 	via1[vACR] &= ~0xC0; /* setup T1 timer with no PB7 output */  in via_init()
200 	via1[vACR] &= ~0x03; /* disable port A & B latches */  in via_init()
208 		via1[vDirB] |= 0x40;  in via_init()
209 		via1[vBufB] |= 0x40;  in via_init()
217 	via1[vDirB] |= (VIA1B_vRTCEnb | VIA1B_vRTCClk | VIA1B_vRTCData);  in via_init()
218 	via1[vBufB] |= (VIA1B_vRTCEnb | VIA1B_vRTCClk);  in via_init()
231 		via1[vDirB] |= 0x40;  in via_init()
232 		via1[vBufB] &= ~0x40;  in via_init()
286 	via1[vACR] |= 0x40;  in via_init_clock()
287 	via1[vT1LL] = MAC_CLOCK_LOW;  in via_init_clock()
288 	via1[vT1LH] = MAC_CLOCK_HIGH;  in via_init_clock()
289 	via1[vT1CL] = MAC_CLOCK_LOW;  in via_init_clock()
290 	via1[vT1CH] = MAC_CLOCK_HIGH;  in via_init_clock()
303 		(uint) via1[vDirA], (uint) via1[vDirB], (uint) via1[vACR]);  in via_debug_dump()
305 		(uint) via1[vPCR], (uint) via1[vIFR], (uint) via1[vIER]);  in via_debug_dump()
334 	ticks = via1[vT1CL] | (via1[vT1CH] << 8);  in mac_gettimeoffset()
338 		if (via1[vIFR] & 0x40) offset = TICK_SIZE;  in mac_gettimeoffset()
454 	events = via1[vIFR] & via1[vIER] & 0x7F;  in via1_irq()
462 			via1[vIFR] = irq_bit;  in via1_irq()
558 		via1[vIER] = IER_SET_BIT(irq_idx);  in via_irq_enable()
590 		via1[vIER] = IER_CLR_BIT(irq_idx);  in via_irq_disable()
611 		via1[vBufA] &= ~VIA1A_vHeadSel;  in via1_set_head()
613 		via1[vBufA] |= VIA1A_vHeadSel;  in via1_set_head()