Lines Matching refs:P
71 P = 2, enumerator
76 #define P macro
811 [PERF_COUNT_HW_CPU_CYCLES] = { 0x00, CNTR_EVEN | CNTR_ODD, P },
820 [PERF_COUNT_HW_CPU_CYCLES] = { 0x00, CNTR_EVEN | CNTR_ODD, P },
892 [C(RESULT_ACCESS)] = { 0x15, CNTR_ODD, P },
893 [C(RESULT_MISS)] = { 0x16, CNTR_EVEN, P },
896 [C(RESULT_ACCESS)] = { 0x15, CNTR_ODD, P },
897 [C(RESULT_MISS)] = { 0x16, CNTR_EVEN, P },
973 [C(RESULT_ACCESS)] = { 0x1c, CNTR_ODD, P },
974 [C(RESULT_MISS)] = { 0x1d, CNTR_EVEN, P },
977 [C(RESULT_ACCESS)] = { 0x1c, CNTR_ODD, P },
978 [C(RESULT_MISS)] = { 0x1d, CNTR_EVEN, P },
1049 [C(RESULT_ACCESS)] = { 28, CNTR_EVEN, P },
1050 [C(RESULT_MISS)] = { 28, CNTR_ODD, P },
1053 [C(RESULT_ACCESS)] = { 28, CNTR_EVEN, P },
1054 [C(RESULT_MISS)] = { 28, CNTR_ODD, P },
1455 raw_event.range = P; in mipsxx_pmu_map_raw_event()
1466 raw_event.range = P; in mipsxx_pmu_map_raw_event()
1481 raw_event.range = P; in mipsxx_pmu_map_raw_event()
1491 raw_event.range = P; in mipsxx_pmu_map_raw_event()
1504 raw_event.range = P; in mipsxx_pmu_map_raw_event()
1515 raw_event.range = P; in mipsxx_pmu_map_raw_event()
1530 raw_event.range = P; in mipsxx_pmu_map_raw_event()