39 #define mmcr0_event1(event) \  argument
40 	((event << MMCR0_PMC1_SHIFT) & MMCR0_PMC1SEL)
41 #define mmcr0_event2(event) \  argument
42 	((event << MMCR0_PMC2_SHIFT) & MMCR0_PMC2SEL)
44 #define mmcr1_event3(event) \  argument
45 	((event << MMCR1_PMC3_SHIFT) & MMCR1_PMC3SEL)
46 #define mmcr1_event4(event) \  argument
47 	((event << MMCR1_PMC4_SHIFT) & MMCR1_PMC4SEL)
48 #define mmcr1_event5(event) \  argument
49 	((event << MMCR1_PMC5_SHIFT) & MMCR1_PMC5SEL)
50 #define mmcr1_event6(event) \  argument
51 	((event << MMCR1_PMC6_SHIFT) & MMCR1_PMC6SEL)
112 	mmcr0_val = MMCR0_INIT | mmcr0_event1(ctr[0].event)  in fsl7450_reg_setup()
113 		| mmcr0_event2(ctr[1].event);  in fsl7450_reg_setup()
123 	mmcr1_val = mmcr1_event3(ctr[2].event)  in fsl7450_reg_setup()
124 		| mmcr1_event4(ctr[3].event);  in fsl7450_reg_setup()
126 		mmcr1_val |= mmcr1_event5(ctr[4].event)  in fsl7450_reg_setup()
127 			| mmcr1_event6(ctr[5].event);  in fsl7450_reg_setup()