192 	ctllo = desc->lli.ctllo | DWC_CTLL_INT_EN;  in dwc_do_single_block()
194 	channel_writel(dwc, SAR, desc->lli.sar);  in dwc_do_single_block()
195 	channel_writel(dwc, DAR, desc->lli.dar);  in dwc_do_single_block()
197 	channel_writel(dwc, CTL_HI, desc->lli.ctlhi);  in dwc_do_single_block()
415 		if (desc->lli.llp == llp) {  in dwc_scan_descriptors()
424 			if (child->lli.llp == llp) {  in dwc_scan_descriptors()
452 static inline void dwc_dump_lli(struct dw_dma_chan *dwc, struct dw_lli *lli)  in dwc_dump_lli()  argument
455 		 lli->sar, lli->dar, lli->llp, lli->ctlhi, lli->ctllo);  in dwc_dump_lli()
491 	dwc_dump_lli(dwc, &bad_desc->lli);  in dwc_handle_error()
493 		dwc_dump_lli(dwc, &child->lli);  in dwc_handle_error()
566 			dwc_dump_lli(dwc, &dwc->cdesc->desc[i]->lli);  in dwc_handle_cyclic()
721 		desc->lli.sar = src + offset;  in dwc_prep_dma_memcpy()
722 		desc->lli.dar = dest + offset;  in dwc_prep_dma_memcpy()
723 		desc->lli.ctllo = ctllo;  in dwc_prep_dma_memcpy()
724 		desc->lli.ctlhi = xfer_count;  in dwc_prep_dma_memcpy()
730 			prev->lli.llp = desc->txd.phys;  in dwc_prep_dma_memcpy()
739 		prev->lli.ctllo |= DWC_CTLL_INT_EN;  in dwc_prep_dma_memcpy()
741 	prev->lli.llp = 0;  in dwc_prep_dma_memcpy()
812 			desc->lli.sar = mem;  in dwc_prep_slave_sg()
813 			desc->lli.dar = reg;  in dwc_prep_slave_sg()
814 			desc->lli.ctllo = ctllo | DWC_CTLL_SRC_WIDTH(mem_width);  in dwc_prep_slave_sg()
824 			desc->lli.ctlhi = dlen >> mem_width;  in dwc_prep_slave_sg()
830 				prev->lli.llp = desc->txd.phys;  in dwc_prep_slave_sg()
872 			desc->lli.sar = reg;  in dwc_prep_slave_sg()
873 			desc->lli.dar = mem;  in dwc_prep_slave_sg()
874 			desc->lli.ctllo = ctllo | DWC_CTLL_DST_WIDTH(mem_width);  in dwc_prep_slave_sg()
883 			desc->lli.ctlhi = dlen >> reg_width;  in dwc_prep_slave_sg()
889 				prev->lli.llp = desc->txd.phys;  in dwc_prep_slave_sg()
906 		prev->lli.ctllo |= DWC_CTLL_INT_EN;  in dwc_prep_slave_sg()
908 	prev->lli.llp = 0;  in dwc_prep_slave_sg()
1388 			desc->lli.dar = sconfig->dst_addr;  in dw_dma_cyclic_prep()
1389 			desc->lli.sar = buf_addr + (period_len * i);  in dw_dma_cyclic_prep()
1390 			desc->lli.ctllo = (DWC_DEFAULT_CTLLO(chan)  in dw_dma_cyclic_prep()
1397 			desc->lli.ctllo |= sconfig->device_fc ?  in dw_dma_cyclic_prep()
1403 			desc->lli.dar = buf_addr + (period_len * i);  in dw_dma_cyclic_prep()
1404 			desc->lli.sar = sconfig->src_addr;  in dw_dma_cyclic_prep()
1405 			desc->lli.ctllo = (DWC_DEFAULT_CTLLO(chan)  in dw_dma_cyclic_prep()
1412 			desc->lli.ctllo |= sconfig->device_fc ?  in dw_dma_cyclic_prep()
1421 		desc->lli.ctlhi = (period_len >> reg_width);  in dw_dma_cyclic_prep()
1425 			last->lli.llp = desc->txd.phys;  in dw_dma_cyclic_prep()
1431 	last->lli.llp = cdesc->desc[0]->txd.phys;  in dw_dma_cyclic_prep()