Lines Matching refs:dc
27 static struct txx9dmac_cregs __iomem *__dma_regs(const struct txx9dmac_chan *dc) in __dma_regs() argument
29 return dc->ch_regs; in __dma_regs()
33 const struct txx9dmac_chan *dc) in __dma_regs32() argument
35 return dc->ch_regs; in __dma_regs32()
38 #define channel64_readq(dc, name) \ argument
39 __raw_readq(&(__dma_regs(dc)->name))
40 #define channel64_writeq(dc, name, val) \ argument
41 __raw_writeq((val), &(__dma_regs(dc)->name))
42 #define channel64_readl(dc, name) \ argument
43 __raw_readl(&(__dma_regs(dc)->name))
44 #define channel64_writel(dc, name, val) \ argument
45 __raw_writel((val), &(__dma_regs(dc)->name))
47 #define channel32_readl(dc, name) \ argument
48 __raw_readl(&(__dma_regs32(dc)->name))
49 #define channel32_writel(dc, name, val) \ argument
50 __raw_writel((val), &(__dma_regs32(dc)->name))
52 #define channel_readq(dc, name) channel64_readq(dc, name) argument
53 #define channel_writeq(dc, name, val) channel64_writeq(dc, name, val) argument
54 #define channel_readl(dc, name) \ argument
55 (is_dmac64(dc) ? \
56 channel64_readl(dc, name) : channel32_readl(dc, name))
57 #define channel_writel(dc, name, val) \ argument
58 (is_dmac64(dc) ? \
59 channel64_writel(dc, name, val) : channel32_writel(dc, name, val))
61 static dma_addr_t channel64_read_CHAR(const struct txx9dmac_chan *dc) in channel64_read_CHAR() argument
63 if (sizeof(__dma_regs(dc)->CHAR) == sizeof(u64)) in channel64_read_CHAR()
64 return channel64_readq(dc, CHAR); in channel64_read_CHAR()
66 return channel64_readl(dc, CHAR); in channel64_read_CHAR()
69 static void channel64_write_CHAR(const struct txx9dmac_chan *dc, dma_addr_t val) in channel64_write_CHAR() argument
71 if (sizeof(__dma_regs(dc)->CHAR) == sizeof(u64)) in channel64_write_CHAR()
72 channel64_writeq(dc, CHAR, val); in channel64_write_CHAR()
74 channel64_writel(dc, CHAR, val); in channel64_write_CHAR()
77 static void channel64_clear_CHAR(const struct txx9dmac_chan *dc) in channel64_clear_CHAR() argument
80 channel64_writel(dc, CHAR, 0); in channel64_clear_CHAR()
81 channel64_writel(dc, __pad_CHAR, 0); in channel64_clear_CHAR()
83 channel64_writeq(dc, CHAR, 0); in channel64_clear_CHAR()
87 static dma_addr_t channel_read_CHAR(const struct txx9dmac_chan *dc) in channel_read_CHAR() argument
89 if (is_dmac64(dc)) in channel_read_CHAR()
90 return channel64_read_CHAR(dc); in channel_read_CHAR()
92 return channel32_readl(dc, CHAR); in channel_read_CHAR()
95 static void channel_write_CHAR(const struct txx9dmac_chan *dc, dma_addr_t val) in channel_write_CHAR() argument
97 if (is_dmac64(dc)) in channel_write_CHAR()
98 channel64_write_CHAR(dc, val); in channel_write_CHAR()
100 channel32_writel(dc, CHAR, val); in channel_write_CHAR()
147 static dma_addr_t desc_read_CHAR(const struct txx9dmac_chan *dc, in desc_read_CHAR() argument
150 return is_dmac64(dc) ? desc->hwdesc.CHAR : desc->hwdesc32.CHAR; in desc_read_CHAR()
153 static void desc_write_CHAR(const struct txx9dmac_chan *dc, in desc_write_CHAR() argument
156 if (is_dmac64(dc)) in desc_write_CHAR()
166 static struct txx9dmac_desc *txx9dmac_first_active(struct txx9dmac_chan *dc) in txx9dmac_first_active() argument
168 return list_entry(dc->active_list.next, in txx9dmac_first_active()
172 static struct txx9dmac_desc *txx9dmac_last_active(struct txx9dmac_chan *dc) in txx9dmac_last_active() argument
174 return list_entry(dc->active_list.prev, in txx9dmac_last_active()
178 static struct txx9dmac_desc *txx9dmac_first_queued(struct txx9dmac_chan *dc) in txx9dmac_first_queued() argument
180 return list_entry(dc->queue.next, struct txx9dmac_desc, desc_node); in txx9dmac_first_queued()
192 static struct txx9dmac_desc *txx9dmac_desc_alloc(struct txx9dmac_chan *dc, in txx9dmac_desc_alloc() argument
195 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_desc_alloc()
202 dma_async_tx_descriptor_init(&desc->txd, &dc->chan); in txx9dmac_desc_alloc()
206 desc->txd.phys = dma_map_single(chan2parent(&dc->chan), &desc->hwdesc, in txx9dmac_desc_alloc()
211 static struct txx9dmac_desc *txx9dmac_desc_get(struct txx9dmac_chan *dc) in txx9dmac_desc_get() argument
217 spin_lock_bh(&dc->lock); in txx9dmac_desc_get()
218 list_for_each_entry_safe(desc, _desc, &dc->free_list, desc_node) { in txx9dmac_desc_get()
224 dev_dbg(chan2dev(&dc->chan), "desc %p not ACKed\n", desc); in txx9dmac_desc_get()
227 spin_unlock_bh(&dc->lock); in txx9dmac_desc_get()
229 dev_vdbg(chan2dev(&dc->chan), "scanned %u descriptors on freelist\n", in txx9dmac_desc_get()
232 ret = txx9dmac_desc_alloc(dc, GFP_ATOMIC); in txx9dmac_desc_get()
234 spin_lock_bh(&dc->lock); in txx9dmac_desc_get()
235 dc->descs_allocated++; in txx9dmac_desc_get()
236 spin_unlock_bh(&dc->lock); in txx9dmac_desc_get()
238 dev_err(chan2dev(&dc->chan), in txx9dmac_desc_get()
244 static void txx9dmac_sync_desc_for_cpu(struct txx9dmac_chan *dc, in txx9dmac_sync_desc_for_cpu() argument
247 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_sync_desc_for_cpu()
251 dma_sync_single_for_cpu(chan2parent(&dc->chan), in txx9dmac_sync_desc_for_cpu()
254 dma_sync_single_for_cpu(chan2parent(&dc->chan), in txx9dmac_sync_desc_for_cpu()
263 static void txx9dmac_desc_put(struct txx9dmac_chan *dc, in txx9dmac_desc_put() argument
269 txx9dmac_sync_desc_for_cpu(dc, desc); in txx9dmac_desc_put()
271 spin_lock_bh(&dc->lock); in txx9dmac_desc_put()
273 dev_vdbg(chan2dev(&dc->chan), in txx9dmac_desc_put()
276 list_splice_init(&desc->tx_list, &dc->free_list); in txx9dmac_desc_put()
277 dev_vdbg(chan2dev(&dc->chan), "moving desc %p to freelist\n", in txx9dmac_desc_put()
279 list_add(&desc->desc_node, &dc->free_list); in txx9dmac_desc_put()
280 spin_unlock_bh(&dc->lock); in txx9dmac_desc_put()
286 static void txx9dmac_dump_regs(struct txx9dmac_chan *dc) in txx9dmac_dump_regs() argument
288 if (is_dmac64(dc)) in txx9dmac_dump_regs()
289 dev_err(chan2dev(&dc->chan), in txx9dmac_dump_regs()
292 (u64)channel64_read_CHAR(dc), in txx9dmac_dump_regs()
293 channel64_readq(dc, SAR), in txx9dmac_dump_regs()
294 channel64_readq(dc, DAR), in txx9dmac_dump_regs()
295 channel64_readl(dc, CNTR), in txx9dmac_dump_regs()
296 channel64_readl(dc, SAIR), in txx9dmac_dump_regs()
297 channel64_readl(dc, DAIR), in txx9dmac_dump_regs()
298 channel64_readl(dc, CCR), in txx9dmac_dump_regs()
299 channel64_readl(dc, CSR)); in txx9dmac_dump_regs()
301 dev_err(chan2dev(&dc->chan), in txx9dmac_dump_regs()
304 channel32_readl(dc, CHAR), in txx9dmac_dump_regs()
305 channel32_readl(dc, SAR), in txx9dmac_dump_regs()
306 channel32_readl(dc, DAR), in txx9dmac_dump_regs()
307 channel32_readl(dc, CNTR), in txx9dmac_dump_regs()
308 channel32_readl(dc, SAIR), in txx9dmac_dump_regs()
309 channel32_readl(dc, DAIR), in txx9dmac_dump_regs()
310 channel32_readl(dc, CCR), in txx9dmac_dump_regs()
311 channel32_readl(dc, CSR)); in txx9dmac_dump_regs()
314 static void txx9dmac_reset_chan(struct txx9dmac_chan *dc) in txx9dmac_reset_chan() argument
316 channel_writel(dc, CCR, TXX9_DMA_CCR_CHRST); in txx9dmac_reset_chan()
317 if (is_dmac64(dc)) { in txx9dmac_reset_chan()
318 channel64_clear_CHAR(dc); in txx9dmac_reset_chan()
319 channel_writeq(dc, SAR, 0); in txx9dmac_reset_chan()
320 channel_writeq(dc, DAR, 0); in txx9dmac_reset_chan()
322 channel_writel(dc, CHAR, 0); in txx9dmac_reset_chan()
323 channel_writel(dc, SAR, 0); in txx9dmac_reset_chan()
324 channel_writel(dc, DAR, 0); in txx9dmac_reset_chan()
326 channel_writel(dc, CNTR, 0); in txx9dmac_reset_chan()
327 channel_writel(dc, SAIR, 0); in txx9dmac_reset_chan()
328 channel_writel(dc, DAIR, 0); in txx9dmac_reset_chan()
329 channel_writel(dc, CCR, 0); in txx9dmac_reset_chan()
334 static void txx9dmac_dostart(struct txx9dmac_chan *dc, in txx9dmac_dostart() argument
337 struct txx9dmac_slave *ds = dc->chan.private; in txx9dmac_dostart()
340 dev_vdbg(chan2dev(&dc->chan), "dostart %u %p\n", in txx9dmac_dostart()
343 if (channel_readl(dc, CSR) & TXX9_DMA_CSR_XFACT) { in txx9dmac_dostart()
344 dev_err(chan2dev(&dc->chan), in txx9dmac_dostart()
346 txx9dmac_dump_regs(dc); in txx9dmac_dostart()
351 if (is_dmac64(dc)) { in txx9dmac_dostart()
352 channel64_writel(dc, CNTR, 0); in txx9dmac_dostart()
353 channel64_writel(dc, CSR, 0xffffffff); in txx9dmac_dostart()
366 channel64_writel(dc, SAIR, sai); in txx9dmac_dostart()
367 channel64_writel(dc, DAIR, dai); in txx9dmac_dostart()
369 channel64_writel(dc, CCR, dc->ccr); in txx9dmac_dostart()
371 channel64_write_CHAR(dc, first->txd.phys); in txx9dmac_dostart()
373 channel32_writel(dc, CNTR, 0); in txx9dmac_dostart()
374 channel32_writel(dc, CSR, 0xffffffff); in txx9dmac_dostart()
387 channel32_writel(dc, SAIR, sai); in txx9dmac_dostart()
388 channel32_writel(dc, DAIR, dai); in txx9dmac_dostart()
390 channel32_writel(dc, CCR, dc->ccr); in txx9dmac_dostart()
392 channel32_writel(dc, CHAR, first->txd.phys); in txx9dmac_dostart()
394 channel32_writel(dc, CHAR, first->txd.phys); in txx9dmac_dostart()
395 channel32_writel(dc, CCR, dc->ccr); in txx9dmac_dostart()
403 txx9dmac_descriptor_complete(struct txx9dmac_chan *dc, in txx9dmac_descriptor_complete() argument
410 dev_vdbg(chan2dev(&dc->chan), "descriptor %u %p complete\n", in txx9dmac_descriptor_complete()
417 txx9dmac_sync_desc_for_cpu(dc, desc); in txx9dmac_descriptor_complete()
418 list_splice_init(&desc->tx_list, &dc->free_list); in txx9dmac_descriptor_complete()
419 list_move(&desc->desc_node, &dc->free_list); in txx9dmac_descriptor_complete()
431 static void txx9dmac_dequeue(struct txx9dmac_chan *dc, struct list_head *list) in txx9dmac_dequeue() argument
433 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_dequeue()
439 desc = txx9dmac_first_queued(dc); in txx9dmac_dequeue()
441 desc_write_CHAR(dc, prev, desc->txd.phys); in txx9dmac_dequeue()
442 dma_sync_single_for_device(chan2parent(&dc->chan), in txx9dmac_dequeue()
450 !txx9dmac_chan_INTENT(dc)) in txx9dmac_dequeue()
452 } while (!list_empty(&dc->queue)); in txx9dmac_dequeue()
455 static void txx9dmac_complete_all(struct txx9dmac_chan *dc) in txx9dmac_complete_all() argument
464 list_splice_init(&dc->active_list, &list); in txx9dmac_complete_all()
465 if (!list_empty(&dc->queue)) { in txx9dmac_complete_all()
466 txx9dmac_dequeue(dc, &dc->active_list); in txx9dmac_complete_all()
467 txx9dmac_dostart(dc, txx9dmac_first_active(dc)); in txx9dmac_complete_all()
471 txx9dmac_descriptor_complete(dc, desc); in txx9dmac_complete_all()
474 static void txx9dmac_dump_desc(struct txx9dmac_chan *dc, in txx9dmac_dump_desc() argument
477 if (is_dmac64(dc)) { in txx9dmac_dump_desc()
479 dev_crit(chan2dev(&dc->chan), in txx9dmac_dump_desc()
483 dev_crit(chan2dev(&dc->chan), in txx9dmac_dump_desc()
492 dev_crit(chan2dev(&dc->chan), in txx9dmac_dump_desc()
496 dev_crit(chan2dev(&dc->chan), in txx9dmac_dump_desc()
505 static void txx9dmac_handle_error(struct txx9dmac_chan *dc, u32 csr) in txx9dmac_handle_error() argument
516 dev_crit(chan2dev(&dc->chan), "Abnormal Chain Completion\n"); in txx9dmac_handle_error()
517 txx9dmac_dump_regs(dc); in txx9dmac_handle_error()
519 bad_desc = txx9dmac_first_active(dc); in txx9dmac_handle_error()
526 channel_writel(dc, CSR, errors); in txx9dmac_handle_error()
528 if (list_empty(&dc->active_list) && !list_empty(&dc->queue)) in txx9dmac_handle_error()
529 txx9dmac_dequeue(dc, &dc->active_list); in txx9dmac_handle_error()
530 if (!list_empty(&dc->active_list)) in txx9dmac_handle_error()
531 txx9dmac_dostart(dc, txx9dmac_first_active(dc)); in txx9dmac_handle_error()
533 dev_crit(chan2dev(&dc->chan), in txx9dmac_handle_error()
536 txx9dmac_dump_desc(dc, &bad_desc->hwdesc); in txx9dmac_handle_error()
538 txx9dmac_dump_desc(dc, &child->hwdesc); in txx9dmac_handle_error()
540 txx9dmac_descriptor_complete(dc, bad_desc); in txx9dmac_handle_error()
543 static void txx9dmac_scan_descriptors(struct txx9dmac_chan *dc) in txx9dmac_scan_descriptors() argument
550 if (is_dmac64(dc)) { in txx9dmac_scan_descriptors()
551 chain = channel64_read_CHAR(dc); in txx9dmac_scan_descriptors()
552 csr = channel64_readl(dc, CSR); in txx9dmac_scan_descriptors()
553 channel64_writel(dc, CSR, csr); in txx9dmac_scan_descriptors()
555 chain = channel32_readl(dc, CHAR); in txx9dmac_scan_descriptors()
556 csr = channel32_readl(dc, CSR); in txx9dmac_scan_descriptors()
557 channel32_writel(dc, CSR, csr); in txx9dmac_scan_descriptors()
562 txx9dmac_complete_all(dc); in txx9dmac_scan_descriptors()
568 dev_vdbg(chan2dev(&dc->chan), "scan_descriptors: char=%#llx\n", in txx9dmac_scan_descriptors()
571 list_for_each_entry_safe(desc, _desc, &dc->active_list, desc_node) { in txx9dmac_scan_descriptors()
572 if (desc_read_CHAR(dc, desc) == chain) { in txx9dmac_scan_descriptors()
580 if (desc_read_CHAR(dc, child) == chain) { in txx9dmac_scan_descriptors()
591 txx9dmac_descriptor_complete(dc, desc); in txx9dmac_scan_descriptors()
595 txx9dmac_handle_error(dc, csr); in txx9dmac_scan_descriptors()
599 dev_err(chan2dev(&dc->chan), in txx9dmac_scan_descriptors()
603 txx9dmac_reset_chan(dc); in txx9dmac_scan_descriptors()
605 if (!list_empty(&dc->queue)) { in txx9dmac_scan_descriptors()
606 txx9dmac_dequeue(dc, &dc->active_list); in txx9dmac_scan_descriptors()
607 txx9dmac_dostart(dc, txx9dmac_first_active(dc)); in txx9dmac_scan_descriptors()
615 struct txx9dmac_chan *dc; in txx9dmac_chan_tasklet() local
617 dc = (struct txx9dmac_chan *)data; in txx9dmac_chan_tasklet()
618 csr = channel_readl(dc, CSR); in txx9dmac_chan_tasklet()
619 dev_vdbg(chan2dev(&dc->chan), "tasklet: status=%x\n", csr); in txx9dmac_chan_tasklet()
621 spin_lock(&dc->lock); in txx9dmac_chan_tasklet()
624 txx9dmac_scan_descriptors(dc); in txx9dmac_chan_tasklet()
625 spin_unlock(&dc->lock); in txx9dmac_chan_tasklet()
626 irq = dc->irq; in txx9dmac_chan_tasklet()
633 struct txx9dmac_chan *dc = dev_id; in txx9dmac_chan_interrupt() local
635 dev_vdbg(chan2dev(&dc->chan), "interrupt: status=%#x\n", in txx9dmac_chan_interrupt()
636 channel_readl(dc, CSR)); in txx9dmac_chan_interrupt()
638 tasklet_schedule(&dc->tasklet); in txx9dmac_chan_interrupt()
652 struct txx9dmac_chan *dc; in txx9dmac_tasklet() local
662 dc = ddev->chan[i]; in txx9dmac_tasklet()
663 csr = channel_readl(dc, CSR); in txx9dmac_tasklet()
664 dev_vdbg(chan2dev(&dc->chan), "tasklet: status=%x\n", in txx9dmac_tasklet()
666 spin_lock(&dc->lock); in txx9dmac_tasklet()
669 txx9dmac_scan_descriptors(dc); in txx9dmac_tasklet()
670 spin_unlock(&dc->lock); in txx9dmac_tasklet()
700 struct txx9dmac_chan *dc = to_txx9dmac_chan(tx->chan); in txx9dmac_tx_submit() local
703 spin_lock_bh(&dc->lock); in txx9dmac_tx_submit()
709 list_add_tail(&desc->desc_node, &dc->queue); in txx9dmac_tx_submit()
710 spin_unlock_bh(&dc->lock); in txx9dmac_tx_submit()
719 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_prep_dma_memcpy() local
720 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_prep_dma_memcpy()
755 desc = txx9dmac_desc_get(dc); in txx9dmac_prep_dma_memcpy()
757 txx9dmac_desc_put(dc, first); in txx9dmac_prep_dma_memcpy()
766 dc->ccr | TXX9_DMA_CCR_XFACT); in txx9dmac_prep_dma_memcpy()
772 dc->ccr | TXX9_DMA_CCR_XFACT); in txx9dmac_prep_dma_memcpy()
785 desc_write_CHAR(dc, prev, desc->txd.phys); in txx9dmac_prep_dma_memcpy()
786 dma_sync_single_for_device(chan2parent(&dc->chan), in txx9dmac_prep_dma_memcpy()
798 desc_write_CHAR(dc, prev, 0); in txx9dmac_prep_dma_memcpy()
799 dma_sync_single_for_device(chan2parent(&dc->chan), in txx9dmac_prep_dma_memcpy()
814 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_prep_slave_sg() local
815 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_prep_slave_sg()
839 desc = txx9dmac_desc_get(dc); in txx9dmac_prep_slave_sg()
841 txx9dmac_desc_put(dc, first); in txx9dmac_prep_slave_sg()
874 dc->ccr | TXX9_DMA_CCR_XFACT); in txx9dmac_prep_slave_sg()
879 desc_write_CHAR(dc, prev, desc->txd.phys); in txx9dmac_prep_slave_sg()
880 dma_sync_single_for_device(chan2parent(&dc->chan), in txx9dmac_prep_slave_sg()
893 desc_write_CHAR(dc, prev, 0); in txx9dmac_prep_slave_sg()
894 dma_sync_single_for_device(chan2parent(&dc->chan), in txx9dmac_prep_slave_sg()
907 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_control() local
916 spin_lock_bh(&dc->lock); in txx9dmac_control()
918 txx9dmac_reset_chan(dc); in txx9dmac_control()
921 list_splice_init(&dc->queue, &list); in txx9dmac_control()
922 list_splice_init(&dc->active_list, &list); in txx9dmac_control()
924 spin_unlock_bh(&dc->lock); in txx9dmac_control()
928 txx9dmac_descriptor_complete(dc, desc); in txx9dmac_control()
937 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_tx_status() local
944 spin_lock_bh(&dc->lock); in txx9dmac_tx_status()
945 txx9dmac_scan_descriptors(dc); in txx9dmac_tx_status()
946 spin_unlock_bh(&dc->lock); in txx9dmac_tx_status()
951 static void txx9dmac_chain_dynamic(struct txx9dmac_chan *dc, in txx9dmac_chain_dynamic() argument
954 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_chain_dynamic()
959 txx9dmac_dequeue(dc, &list); in txx9dmac_chain_dynamic()
961 desc_write_CHAR(dc, prev, desc->txd.phys); in txx9dmac_chain_dynamic()
962 dma_sync_single_for_device(chan2parent(&dc->chan), in txx9dmac_chain_dynamic()
966 if (!(channel_readl(dc, CSR) & TXX9_DMA_CSR_CHNEN) && in txx9dmac_chain_dynamic()
967 channel_read_CHAR(dc) == prev->txd.phys) in txx9dmac_chain_dynamic()
969 channel_write_CHAR(dc, desc->txd.phys); in txx9dmac_chain_dynamic()
970 list_splice_tail(&list, &dc->active_list); in txx9dmac_chain_dynamic()
975 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_issue_pending() local
977 spin_lock_bh(&dc->lock); in txx9dmac_issue_pending()
979 if (!list_empty(&dc->active_list)) in txx9dmac_issue_pending()
980 txx9dmac_scan_descriptors(dc); in txx9dmac_issue_pending()
981 if (!list_empty(&dc->queue)) { in txx9dmac_issue_pending()
982 if (list_empty(&dc->active_list)) { in txx9dmac_issue_pending()
983 txx9dmac_dequeue(dc, &dc->active_list); in txx9dmac_issue_pending()
984 txx9dmac_dostart(dc, txx9dmac_first_active(dc)); in txx9dmac_issue_pending()
986 struct txx9dmac_desc *prev = txx9dmac_last_active(dc); in txx9dmac_issue_pending()
989 txx9dmac_chan_INTENT(dc)) in txx9dmac_issue_pending()
990 txx9dmac_chain_dynamic(dc, prev); in txx9dmac_issue_pending()
994 spin_unlock_bh(&dc->lock); in txx9dmac_issue_pending()
999 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_alloc_chan_resources() local
1007 if (channel_readl(dc, CSR) & TXX9_DMA_CSR_XFACT) { in txx9dmac_alloc_chan_resources()
1014 dc->ccr = TXX9_DMA_CCR_IMMCHN | TXX9_DMA_CCR_INTENE | CCR_LE; in txx9dmac_alloc_chan_resources()
1015 txx9dmac_chan_set_SMPCHN(dc); in txx9dmac_alloc_chan_resources()
1016 if (!txx9_dma_have_SMPCHN() || (dc->ccr & TXX9_DMA_CCR_SMPCHN)) in txx9dmac_alloc_chan_resources()
1017 dc->ccr |= TXX9_DMA_CCR_INTENC; in txx9dmac_alloc_chan_resources()
1021 dc->ccr |= TXX9_DMA_CCR_XFSZ_X8; in txx9dmac_alloc_chan_resources()
1026 dc->ccr |= TXX9_DMA_CCR_EXTRQ | in txx9dmac_alloc_chan_resources()
1028 txx9dmac_chan_set_INTENT(dc); in txx9dmac_alloc_chan_resources()
1031 spin_lock_bh(&dc->lock); in txx9dmac_alloc_chan_resources()
1032 i = dc->descs_allocated; in txx9dmac_alloc_chan_resources()
1033 while (dc->descs_allocated < TXX9_DMA_INITIAL_DESC_COUNT) { in txx9dmac_alloc_chan_resources()
1034 spin_unlock_bh(&dc->lock); in txx9dmac_alloc_chan_resources()
1036 desc = txx9dmac_desc_alloc(dc, GFP_KERNEL); in txx9dmac_alloc_chan_resources()
1040 spin_lock_bh(&dc->lock); in txx9dmac_alloc_chan_resources()
1043 txx9dmac_desc_put(dc, desc); in txx9dmac_alloc_chan_resources()
1045 spin_lock_bh(&dc->lock); in txx9dmac_alloc_chan_resources()
1046 i = ++dc->descs_allocated; in txx9dmac_alloc_chan_resources()
1048 spin_unlock_bh(&dc->lock); in txx9dmac_alloc_chan_resources()
1058 struct txx9dmac_chan *dc = to_txx9dmac_chan(chan); in txx9dmac_free_chan_resources() local
1059 struct txx9dmac_dev *ddev = dc->ddev; in txx9dmac_free_chan_resources()
1064 dc->descs_allocated); in txx9dmac_free_chan_resources()
1067 BUG_ON(!list_empty(&dc->active_list)); in txx9dmac_free_chan_resources()
1068 BUG_ON(!list_empty(&dc->queue)); in txx9dmac_free_chan_resources()
1069 BUG_ON(channel_readl(dc, CSR) & TXX9_DMA_CSR_XFACT); in txx9dmac_free_chan_resources()
1071 spin_lock_bh(&dc->lock); in txx9dmac_free_chan_resources()
1072 list_splice_init(&dc->free_list, &list); in txx9dmac_free_chan_resources()
1073 dc->descs_allocated = 0; in txx9dmac_free_chan_resources()
1074 spin_unlock_bh(&dc->lock); in txx9dmac_free_chan_resources()
1100 struct txx9dmac_chan *dc; in txx9dmac_chan_probe() local
1105 dc = devm_kzalloc(&pdev->dev, sizeof(*dc), GFP_KERNEL); in txx9dmac_chan_probe()
1106 if (!dc) in txx9dmac_chan_probe()
1109 dc->dma.dev = &pdev->dev; in txx9dmac_chan_probe()
1110 dc->dma.device_alloc_chan_resources = txx9dmac_alloc_chan_resources; in txx9dmac_chan_probe()
1111 dc->dma.device_free_chan_resources = txx9dmac_free_chan_resources; in txx9dmac_chan_probe()
1112 dc->dma.device_control = txx9dmac_control; in txx9dmac_chan_probe()
1113 dc->dma.device_tx_status = txx9dmac_tx_status; in txx9dmac_chan_probe()
1114 dc->dma.device_issue_pending = txx9dmac_issue_pending; in txx9dmac_chan_probe()
1116 dc->dma.device_prep_dma_memcpy = txx9dmac_prep_dma_memcpy; in txx9dmac_chan_probe()
1117 dma_cap_set(DMA_MEMCPY, dc->dma.cap_mask); in txx9dmac_chan_probe()
1119 dc->dma.device_prep_slave_sg = txx9dmac_prep_slave_sg; in txx9dmac_chan_probe()
1120 dma_cap_set(DMA_SLAVE, dc->dma.cap_mask); in txx9dmac_chan_probe()
1121 dma_cap_set(DMA_PRIVATE, dc->dma.cap_mask); in txx9dmac_chan_probe()
1124 INIT_LIST_HEAD(&dc->dma.channels); in txx9dmac_chan_probe()
1125 dc->ddev = platform_get_drvdata(dmac_dev); in txx9dmac_chan_probe()
1126 if (dc->ddev->irq < 0) { in txx9dmac_chan_probe()
1130 tasklet_init(&dc->tasklet, txx9dmac_chan_tasklet, in txx9dmac_chan_probe()
1131 (unsigned long)dc); in txx9dmac_chan_probe()
1132 dc->irq = irq; in txx9dmac_chan_probe()
1133 err = devm_request_irq(&pdev->dev, dc->irq, in txx9dmac_chan_probe()
1134 txx9dmac_chan_interrupt, 0, dev_name(&pdev->dev), dc); in txx9dmac_chan_probe()
1138 dc->irq = -1; in txx9dmac_chan_probe()
1139 dc->ddev->chan[ch] = dc; in txx9dmac_chan_probe()
1140 dc->chan.device = &dc->dma; in txx9dmac_chan_probe()
1141 list_add_tail(&dc->chan.device_node, &dc->chan.device->channels); in txx9dmac_chan_probe()
1142 dma_cookie_init(&dc->chan); in txx9dmac_chan_probe()
1144 if (is_dmac64(dc)) in txx9dmac_chan_probe()
1145 dc->ch_regs = &__txx9dmac_regs(dc->ddev)->CHAN[ch]; in txx9dmac_chan_probe()
1147 dc->ch_regs = &__txx9dmac_regs32(dc->ddev)->CHAN[ch]; in txx9dmac_chan_probe()
1148 spin_lock_init(&dc->lock); in txx9dmac_chan_probe()
1150 INIT_LIST_HEAD(&dc->active_list); in txx9dmac_chan_probe()
1151 INIT_LIST_HEAD(&dc->queue); in txx9dmac_chan_probe()
1152 INIT_LIST_HEAD(&dc->free_list); in txx9dmac_chan_probe()
1154 txx9dmac_reset_chan(dc); in txx9dmac_chan_probe()
1156 platform_set_drvdata(pdev, dc); in txx9dmac_chan_probe()
1158 err = dma_async_device_register(&dc->dma); in txx9dmac_chan_probe()
1162 dc->dma.dev_id, in txx9dmac_chan_probe()
1163 dma_has_cap(DMA_MEMCPY, dc->dma.cap_mask) ? " memcpy" : "", in txx9dmac_chan_probe()
1164 dma_has_cap(DMA_SLAVE, dc->dma.cap_mask) ? " slave" : ""); in txx9dmac_chan_probe()
1171 struct txx9dmac_chan *dc = platform_get_drvdata(pdev); in txx9dmac_chan_remove() local
1173 dma_async_device_unregister(&dc->dma); in txx9dmac_chan_remove()
1174 if (dc->irq >= 0) in txx9dmac_chan_remove()
1175 tasklet_kill(&dc->tasklet); in txx9dmac_chan_remove()
1176 dc->ddev->chan[pdev->id % TXX9_DMA_MAX_NR_CHANNELS] = NULL; in txx9dmac_chan_remove()