32 	struct drm_display_mode *mode;  in tpo_vid_get_config_mode()  local
37 	mode = kzalloc(sizeof(*mode), GFP_KERNEL);  in tpo_vid_get_config_mode()
38 	if (!mode)  in tpo_vid_get_config_mode()
42 		mode->hdisplay = (ti->hactive_hi << 8) | ti->hactive_lo;  in tpo_vid_get_config_mode()
43 		mode->vdisplay = (ti->vactive_hi << 8) | ti->vactive_lo;  in tpo_vid_get_config_mode()
44 		mode->hsync_start = mode->hdisplay +  in tpo_vid_get_config_mode()
47 		mode->hsync_end = mode->hsync_start +  in tpo_vid_get_config_mode()
50 		mode->htotal = mode->hdisplay + ((ti->hblank_hi << 8) |  in tpo_vid_get_config_mode()
52 		mode->vsync_start =  in tpo_vid_get_config_mode()
53 			mode->vdisplay + ((ti->vsync_offset_hi << 8) |  in tpo_vid_get_config_mode()
55 		mode->vsync_end =  in tpo_vid_get_config_mode()
56 			mode->vsync_start + ((ti->vsync_pulse_width_hi << 8) |  in tpo_vid_get_config_mode()
58 		mode->vtotal = mode->vdisplay +  in tpo_vid_get_config_mode()
60 		mode->clock = ti->pixel_clock * 10;  in tpo_vid_get_config_mode()
62 		dev_dbg(dev->dev, "hdisplay is %d\n", mode->hdisplay);  in tpo_vid_get_config_mode()
63 		dev_dbg(dev->dev, "vdisplay is %d\n", mode->vdisplay);  in tpo_vid_get_config_mode()
64 		dev_dbg(dev->dev, "HSS is %d\n", mode->hsync_start);  in tpo_vid_get_config_mode()
65 		dev_dbg(dev->dev, "HSE is %d\n", mode->hsync_end);  in tpo_vid_get_config_mode()
66 		dev_dbg(dev->dev, "htotal is %d\n", mode->htotal);  in tpo_vid_get_config_mode()
67 		dev_dbg(dev->dev, "VSS is %d\n", mode->vsync_start);  in tpo_vid_get_config_mode()
68 		dev_dbg(dev->dev, "VSE is %d\n", mode->vsync_end);  in tpo_vid_get_config_mode()
69 		dev_dbg(dev->dev, "vtotal is %d\n", mode->vtotal);  in tpo_vid_get_config_mode()
70 		dev_dbg(dev->dev, "clock is %d\n", mode->clock);  in tpo_vid_get_config_mode()
72 		mode->hdisplay = 864;  in tpo_vid_get_config_mode()
73 		mode->vdisplay = 480;  in tpo_vid_get_config_mode()
74 		mode->hsync_start = 873;  in tpo_vid_get_config_mode()
75 		mode->hsync_end = 876;  in tpo_vid_get_config_mode()
76 		mode->htotal = 887;  in tpo_vid_get_config_mode()
77 		mode->vsync_start = 487;  in tpo_vid_get_config_mode()
78 		mode->vsync_end = 490;  in tpo_vid_get_config_mode()
79 		mode->vtotal = 499;  in tpo_vid_get_config_mode()
80 		mode->clock = 33264;  in tpo_vid_get_config_mode()
83 	drm_mode_set_name(mode);  in tpo_vid_get_config_mode()
84 	drm_mode_set_crtcinfo(mode, 0);  in tpo_vid_get_config_mode()
86 	mode->type |= DRM_MODE_TYPE_PREFERRED;  in tpo_vid_get_config_mode()
88 	return mode;  in tpo_vid_get_config_mode()