1167 		intel_dp->DP |= DP_PLL_FREQ_160MHZ;  in ironlake_set_pll_cpu_edp()
1170 		intel_dp->DP |= DP_PLL_FREQ_270MHZ;  in ironlake_set_pll_cpu_edp()
1208 	intel_dp->DP = I915_READ(intel_dp->output_reg) & DP_DETECTED;  in intel_dp_prepare()
1211 	intel_dp->DP |= DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0;  in intel_dp_prepare()
1212 	intel_dp->DP |= DP_PORT_WIDTH(intel_dp->lane_count);  in intel_dp_prepare()
1217 		intel_dp->DP |= DP_AUDIO_OUTPUT_ENABLE;  in intel_dp_prepare()
1225 			intel_dp->DP |= DP_SYNC_HS_HIGH;  in intel_dp_prepare()
1227 			intel_dp->DP |= DP_SYNC_VS_HIGH;  in intel_dp_prepare()
1228 		intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT;  in intel_dp_prepare()
1231 			intel_dp->DP |= DP_ENHANCED_FRAMING;  in intel_dp_prepare()
1233 		intel_dp->DP |= crtc->pipe << 29;  in intel_dp_prepare()
1236 			intel_dp->DP |= intel_dp->color_range;  in intel_dp_prepare()
1239 			intel_dp->DP |= DP_SYNC_HS_HIGH;  in intel_dp_prepare()
1241 			intel_dp->DP |= DP_SYNC_VS_HIGH;  in intel_dp_prepare()
1242 		intel_dp->DP |= DP_LINK_TRAIN_OFF;  in intel_dp_prepare()
1245 			intel_dp->DP |= DP_ENHANCED_FRAMING;  in intel_dp_prepare()
1249 				intel_dp->DP |= DP_PIPEB_SELECT;  in intel_dp_prepare()
1251 			intel_dp->DP |= DP_PIPE_SELECT_CHV(crtc->pipe);  in intel_dp_prepare()
1254 		intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT;  in intel_dp_prepare()
1747 	intel_dp->DP &= ~(DP_PORT_EN | DP_AUDIO_OUTPUT_ENABLE);  in ironlake_edp_pll_on()
1748 	intel_dp->DP |= DP_PLL_ENABLE;  in ironlake_edp_pll_on()
1749 	I915_WRITE(DP_A, intel_dp->DP);  in ironlake_edp_pll_on()
2383 			 uint32_t *DP,  in _intel_dp_set_link_train()  argument
2418 		*DP &= ~DP_LINK_TRAIN_MASK_CPT;  in _intel_dp_set_link_train()
2422 			*DP |= DP_LINK_TRAIN_OFF_CPT;  in _intel_dp_set_link_train()
2425 			*DP |= DP_LINK_TRAIN_PAT_1_CPT;  in _intel_dp_set_link_train()
2428 			*DP |= DP_LINK_TRAIN_PAT_2_CPT;  in _intel_dp_set_link_train()
2432 			*DP |= DP_LINK_TRAIN_PAT_2_CPT;  in _intel_dp_set_link_train()
2438 			*DP &= ~DP_LINK_TRAIN_MASK_CHV;  in _intel_dp_set_link_train()
2440 			*DP &= ~DP_LINK_TRAIN_MASK;  in _intel_dp_set_link_train()
2444 			*DP |= DP_LINK_TRAIN_OFF;  in _intel_dp_set_link_train()
2447 			*DP |= DP_LINK_TRAIN_PAT_1;  in _intel_dp_set_link_train()
2450 			*DP |= DP_LINK_TRAIN_PAT_2;  in _intel_dp_set_link_train()
2454 				*DP |= DP_LINK_TRAIN_PAT_3_CHV;  in _intel_dp_set_link_train()
2457 				*DP |= DP_LINK_TRAIN_PAT_2;  in _intel_dp_set_link_train()
2469 	intel_dp->DP |= DP_PORT_EN;  in intel_dp_enable_port()
2472 	_intel_dp_set_link_train(intel_dp, &intel_dp->DP,  in intel_dp_enable_port()
2475 	I915_WRITE(intel_dp->output_reg, intel_dp->DP);  in intel_dp_enable_port()
3335 intel_dp_set_signal_levels(struct intel_dp *intel_dp, uint32_t *DP)  in intel_dp_set_signal_levels()  argument
3365 	*DP = (*DP & ~mask) | signal_levels;  in intel_dp_set_signal_levels()
3370 			uint32_t *DP,  in intel_dp_set_link_train()  argument
3379 	_intel_dp_set_link_train(intel_dp, DP, dp_train_pat);  in intel_dp_set_link_train()
3381 	I915_WRITE(intel_dp->output_reg, *DP);  in intel_dp_set_link_train()
3402 intel_dp_reset_link_train(struct intel_dp *intel_dp, uint32_t *DP,  in intel_dp_reset_link_train()  argument
3406 	intel_dp_set_signal_levels(intel_dp, DP);  in intel_dp_reset_link_train()
3407 	return intel_dp_set_link_train(intel_dp, DP, dp_train_pat);  in intel_dp_reset_link_train()
3411 intel_dp_update_link_train(struct intel_dp *intel_dp, uint32_t *DP,  in intel_dp_update_link_train()  argument
3420 	intel_dp_set_signal_levels(intel_dp, DP);  in intel_dp_update_link_train()
3422 	I915_WRITE(intel_dp->output_reg, *DP);  in intel_dp_update_link_train()
3471 	uint32_t DP = intel_dp->DP;  in intel_dp_start_link_train()  local
3488 	DP |= DP_PORT_EN;  in intel_dp_start_link_train()
3491 	if (!intel_dp_reset_link_train(intel_dp, &DP,  in intel_dp_start_link_train()
3525 			intel_dp_reset_link_train(intel_dp, &DP,  in intel_dp_start_link_train()
3544 		if (!intel_dp_update_link_train(intel_dp, &DP, link_status)) {  in intel_dp_start_link_train()
3550 	intel_dp->DP = DP;  in intel_dp_start_link_train()
3558 	uint32_t DP = intel_dp->DP;  in intel_dp_complete_link_train()  local
3566 	if (!intel_dp_set_link_train(intel_dp, &DP,  in intel_dp_complete_link_train()
3593 			intel_dp_set_link_train(intel_dp, &DP,  in intel_dp_complete_link_train()
3609 			intel_dp_set_link_train(intel_dp, &DP,  in intel_dp_complete_link_train()
3618 		if (!intel_dp_update_link_train(intel_dp, &DP, link_status)) {  in intel_dp_complete_link_train()
3627 	intel_dp->DP = DP;  in intel_dp_complete_link_train()
3636 	intel_dp_set_link_train(intel_dp, &intel_dp->DP,  in intel_dp_stop_link_train()
3647 	uint32_t DP = intel_dp->DP;  in intel_dp_link_down()  local
3658 		DP &= ~DP_LINK_TRAIN_MASK_CPT;  in intel_dp_link_down()
3659 		I915_WRITE(intel_dp->output_reg, DP | DP_LINK_TRAIN_PAT_IDLE_CPT);  in intel_dp_link_down()
3662 			DP &= ~DP_LINK_TRAIN_MASK_CHV;  in intel_dp_link_down()
3664 			DP &= ~DP_LINK_TRAIN_MASK;  in intel_dp_link_down()
3665 		I915_WRITE(intel_dp->output_reg, DP | DP_LINK_TRAIN_PAT_IDLE);  in intel_dp_link_down()
3679 		DP &= ~DP_PIPEB_SELECT;  in intel_dp_link_down()
3680 		I915_WRITE(intel_dp->output_reg, DP);  in intel_dp_link_down()
3684 	DP &= ~DP_AUDIO_OUTPUT_ENABLE;  in intel_dp_link_down()
3685 	I915_WRITE(intel_dp->output_reg, DP & ~DP_PORT_EN);  in intel_dp_link_down()
5091 	intel_dp->DP = I915_READ(intel_dp->output_reg);  in intel_dp_init_connector()