25 int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value)  in adreno_get_param()  argument
27 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in adreno_get_param()
43 		DBG("%s: invalid param: %u", gpu->name, param);  in adreno_get_param()
51 int adreno_hw_init(struct msm_gpu *gpu)  in adreno_hw_init()  argument
53 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in adreno_hw_init()
56 	DBG("%s", gpu->name);  in adreno_hw_init()
58 	ret = msm_gem_get_iova(gpu->rb->bo, gpu->id, &gpu->rb_iova);  in adreno_hw_init()
60 		gpu->rb_iova = 0;  in adreno_hw_init()
61 		dev_err(gpu->dev->dev, "could not map ringbuffer: %d\n", ret);  in adreno_hw_init()
66 	gpu_write(gpu, REG_AXXX_CP_RB_CNTL,  in adreno_hw_init()
68 			AXXX_CP_RB_CNTL_BUFSZ(ilog2(gpu->rb->size / 8)) |  in adreno_hw_init()
72 	gpu_write(gpu, REG_AXXX_CP_RB_BASE, gpu->rb_iova);  in adreno_hw_init()
73 	gpu_write(gpu, REG_AXXX_CP_RB_RPTR_ADDR, rbmemptr(adreno_gpu, rptr));  in adreno_hw_init()
76 	gpu_write(gpu, REG_AXXX_SCRATCH_ADDR, rbmemptr(adreno_gpu, fence));  in adreno_hw_init()
78 	gpu_write(gpu, REG_AXXX_SCRATCH_UMSK, 0x1);  in adreno_hw_init()
88 uint32_t adreno_last_fence(struct msm_gpu *gpu)  in adreno_last_fence()  argument
90 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in adreno_last_fence()
94 void adreno_recover(struct msm_gpu *gpu)  in adreno_recover()  argument
96 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in adreno_recover()
97 	struct drm_device *dev = gpu->dev;  in adreno_recover()
100 	gpu->funcs->pm_suspend(gpu);  in adreno_recover()
103 	gpu->rb->cur = gpu->rb->start;  in adreno_recover()
106 	adreno_gpu->memptrs->fence = gpu->submitted_fence;  in adreno_recover()
110 	gpu->funcs->pm_resume(gpu);  in adreno_recover()
111 	ret = gpu->funcs->hw_init(gpu);  in adreno_recover()
118 int adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit,  in adreno_submit()  argument
121 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in adreno_submit()
122 	struct msm_drm_private *priv = gpu->dev->dev_private;  in adreno_submit()
123 	struct msm_ringbuffer *ring = gpu->rb;  in adreno_submit()
184 	gpu->funcs->flush(gpu);  in adreno_submit()
189 void adreno_flush(struct msm_gpu *gpu)  in adreno_flush()  argument
191 	uint32_t wptr = get_wptr(gpu->rb);  in adreno_flush()
196 	gpu_write(gpu, REG_AXXX_CP_RB_WPTR, wptr);  in adreno_flush()
199 void adreno_idle(struct msm_gpu *gpu)  in adreno_idle()  argument
201 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in adreno_idle()
209 	wptr = get_wptr(gpu->rb) & ((gpu->rb->size / 4) - 1);  in adreno_idle()
213 		DRM_ERROR("%s: timeout waiting to drain ringbuffer!\n", gpu->name);  in adreno_idle()
219 void adreno_show(struct msm_gpu *gpu, struct seq_file *m)  in adreno_show()  argument
221 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in adreno_show()
230 			gpu->submitted_fence);  in adreno_show()
233 	seq_printf(m, "rb wptr:  %d\n", get_wptr(gpu->rb));  in adreno_show()
235 	gpu->funcs->pm_resume(gpu);  in adreno_show()
238 	seq_printf(m, "IO:region %s 00000000 00020000\n", gpu->name);  in adreno_show()
245 			uint32_t val = gpu_read(gpu, addr);  in adreno_show()
250 	gpu->funcs->pm_suspend(gpu);  in adreno_show()
255 void adreno_dump(struct msm_gpu *gpu)  in adreno_dump()  argument
257 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in adreno_dump()
266 			gpu->submitted_fence);  in adreno_dump()
269 	printk("rb wptr:  %d\n", get_wptr(gpu->rb));  in adreno_dump()
272 	printk("IO:region %s 00000000 00020000\n", gpu->name);  in adreno_dump()
279 			uint32_t val = gpu_read(gpu, addr);  in adreno_dump()
285 static uint32_t ring_freewords(struct msm_gpu *gpu)  in ring_freewords()  argument
287 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in ring_freewords()
288 	uint32_t size = gpu->rb->size / 4;  in ring_freewords()
289 	uint32_t wptr = get_wptr(gpu->rb);  in ring_freewords()
294 void adreno_wait_ring(struct msm_gpu *gpu, uint32_t ndwords)  in adreno_wait_ring()  argument
296 	if (spin_until(ring_freewords(gpu) >= ndwords))  in adreno_wait_ring()
297 		DRM_ERROR("%s: timeout waiting for ringbuffer space\n", gpu->name);  in adreno_wait_ring()
309 	struct msm_gpu *gpu = &adreno_gpu->base;  in adreno_gpu_init()  local
319 	gpu->fast_rate = config->fast_rate;  in adreno_gpu_init()
320 	gpu->slow_rate = config->slow_rate;  in adreno_gpu_init()
321 	gpu->bus_freq  = config->bus_freq;  in adreno_gpu_init()
323 	gpu->bus_scale_table = config->bus_scale_table;  in adreno_gpu_init()
327 			gpu->fast_rate, gpu->slow_rate, gpu->bus_freq);  in adreno_gpu_init()
349 	mmu = gpu->mmu;  in adreno_gpu_init()
374 	ret = msm_gem_get_iova(adreno_gpu->memptrs_bo, gpu->id,  in adreno_gpu_init()
384 void adreno_gpu_cleanup(struct adreno_gpu *gpu)  in adreno_gpu_cleanup()  argument
386 	if (gpu->memptrs_bo) {  in adreno_gpu_cleanup()
387 		if (gpu->memptrs_iova)  in adreno_gpu_cleanup()
388 			msm_gem_put_iova(gpu->memptrs_bo, gpu->base.id);  in adreno_gpu_cleanup()
389 		drm_gem_object_unreference(gpu->memptrs_bo);  in adreno_gpu_cleanup()
391 	if (gpu->pm4)  in adreno_gpu_cleanup()
392 		release_firmware(gpu->pm4);  in adreno_gpu_cleanup()
393 	if (gpu->pfp)  in adreno_gpu_cleanup()
394 		release_firmware(gpu->pfp);  in adreno_gpu_cleanup()
395 	msm_gpu_cleanup(&gpu->base);  in adreno_gpu_cleanup()