Lines Matching refs:table
230 RV770_SMC_STATETABLE *table) in rv730_populate_smc_acpi_state() argument
242 table->ACPIState = table->initialState; in rv730_populate_smc_acpi_state()
243 table->ACPIState.flags &= ~PPSMC_SWSTATE_FLAG_DC; in rv730_populate_smc_acpi_state()
247 &table->ACPIState.levels[0].vddc); in rv730_populate_smc_acpi_state()
248 table->ACPIState.levels[0].gen2PCIE = pi->pcie_gen2 ? in rv730_populate_smc_acpi_state()
250 table->ACPIState.levels[0].gen2XSP = in rv730_populate_smc_acpi_state()
254 &table->ACPIState.levels[0].vddc); in rv730_populate_smc_acpi_state()
255 table->ACPIState.levels[0].gen2PCIE = 0; in rv730_populate_smc_acpi_state()
297 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL = cpu_to_be32(mpll_func_cntl); in rv730_populate_smc_acpi_state()
298 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL2 = cpu_to_be32(mpll_func_cntl_2); in rv730_populate_smc_acpi_state()
299 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL3 = cpu_to_be32(mpll_func_cntl_3); in rv730_populate_smc_acpi_state()
300 table->ACPIState.levels[0].mclk.mclk730.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv730_populate_smc_acpi_state()
301 table->ACPIState.levels[0].mclk.mclk730.vDLL_CNTL = cpu_to_be32(dll_cntl); in rv730_populate_smc_acpi_state()
303 table->ACPIState.levels[0].mclk.mclk730.mclk_value = 0; in rv730_populate_smc_acpi_state()
305 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = cpu_to_be32(spll_func_cntl); in rv730_populate_smc_acpi_state()
306 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2); in rv730_populate_smc_acpi_state()
307 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3); in rv730_populate_smc_acpi_state()
309 table->ACPIState.levels[0].sclk.sclk_value = 0; in rv730_populate_smc_acpi_state()
311 rv770_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd); in rv730_populate_smc_acpi_state()
313 table->ACPIState.levels[1] = table->ACPIState.levels[0]; in rv730_populate_smc_acpi_state()
314 table->ACPIState.levels[2] = table->ACPIState.levels[0]; in rv730_populate_smc_acpi_state()
321 RV770_SMC_STATETABLE *table) in rv730_populate_smc_initial_state() argument
327 table->initialState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL = in rv730_populate_smc_initial_state()
329 table->initialState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL2 = in rv730_populate_smc_initial_state()
331 table->initialState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL3 = in rv730_populate_smc_initial_state()
333 table->initialState.levels[0].mclk.mclk730.vMCLK_PWRMGT_CNTL = in rv730_populate_smc_initial_state()
335 table->initialState.levels[0].mclk.mclk730.vDLL_CNTL = in rv730_populate_smc_initial_state()
337 table->initialState.levels[0].mclk.mclk730.vMPLL_SS = in rv730_populate_smc_initial_state()
339 table->initialState.levels[0].mclk.mclk730.vMPLL_SS2 = in rv730_populate_smc_initial_state()
342 table->initialState.levels[0].mclk.mclk730.mclk_value = in rv730_populate_smc_initial_state()
345 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = in rv730_populate_smc_initial_state()
347 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = in rv730_populate_smc_initial_state()
349 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = in rv730_populate_smc_initial_state()
351 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM = in rv730_populate_smc_initial_state()
353 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM_2 = in rv730_populate_smc_initial_state()
356 table->initialState.levels[0].sclk.sclk_value = in rv730_populate_smc_initial_state()
359 table->initialState.levels[0].arbValue = MC_CG_ARB_FREQ_F0; in rv730_populate_smc_initial_state()
361 table->initialState.levels[0].seqValue = in rv730_populate_smc_initial_state()
366 &table->initialState.levels[0].vddc); in rv730_populate_smc_initial_state()
368 &table->initialState.levels[0].mvdd); in rv730_populate_smc_initial_state()
372 table->initialState.levels[0].aT = cpu_to_be32(a_t); in rv730_populate_smc_initial_state()
374 table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp); in rv730_populate_smc_initial_state()
377 table->initialState.levels[0].gen2PCIE = 1; in rv730_populate_smc_initial_state()
379 table->initialState.levels[0].gen2PCIE = 0; in rv730_populate_smc_initial_state()
381 table->initialState.levels[0].gen2XSP = 1; in rv730_populate_smc_initial_state()
383 table->initialState.levels[0].gen2XSP = 0; in rv730_populate_smc_initial_state()
385 table->initialState.levels[1] = table->initialState.levels[0]; in rv730_populate_smc_initial_state()
386 table->initialState.levels[2] = table->initialState.levels[0]; in rv730_populate_smc_initial_state()
388 table->initialState.flags |= PPSMC_SWSTATE_FLAG_DC; in rv730_populate_smc_initial_state()