Lines Matching refs:dd
229 static inline u32 qib_read_ureg32(const struct qib_devdata *dd, in qib_read_ureg32() argument
232 if (!dd->kregbase || !(dd->flags & QIB_PRESENT)) in qib_read_ureg32()
235 if (dd->userbase) in qib_read_ureg32()
237 ((char __iomem *)dd->userbase + in qib_read_ureg32()
238 dd->ureg_align * ctxt)); in qib_read_ureg32()
241 (dd->uregbase + in qib_read_ureg32()
242 (char __iomem *)dd->kregbase + in qib_read_ureg32()
243 dd->ureg_align * ctxt)); in qib_read_ureg32()
255 static inline void qib_write_ureg(const struct qib_devdata *dd, in qib_write_ureg() argument
260 if (dd->userbase) in qib_write_ureg()
262 ((char __iomem *) dd->userbase + in qib_write_ureg()
263 dd->ureg_align * ctxt); in qib_write_ureg()
266 (dd->uregbase + in qib_write_ureg()
267 (char __iomem *) dd->kregbase + in qib_write_ureg()
268 dd->ureg_align * ctxt); in qib_write_ureg()
270 if (dd->kregbase && (dd->flags & QIB_PRESENT)) in qib_write_ureg()
281 static inline void qib_write_kreg_ctxt(const struct qib_devdata *dd, in qib_write_kreg_ctxt() argument
285 qib_write_kreg(dd, regno + ctxt, value); in qib_write_kreg_ctxt()
288 static inline void write_7220_creg(const struct qib_devdata *dd, in write_7220_creg() argument
291 if (dd->cspec->cregbase && (dd->flags & QIB_PRESENT)) in write_7220_creg()
292 writeq(value, &dd->cspec->cregbase[regno]); in write_7220_creg()
295 static inline u64 read_7220_creg(const struct qib_devdata *dd, u16 regno) in read_7220_creg() argument
297 if (!dd->cspec->cregbase || !(dd->flags & QIB_PRESENT)) in read_7220_creg()
299 return readq(&dd->cspec->cregbase[regno]); in read_7220_creg()
302 static inline u32 read_7220_creg32(const struct qib_devdata *dd, u16 regno) in read_7220_creg32() argument
304 if (!dd->cspec->cregbase || !(dd->flags & QIB_PRESENT)) in read_7220_creg32()
306 return readl(&dd->cspec->cregbase[regno]); in read_7220_creg32()
753 struct qib_devdata *dd = ppd->dd; in qib_disarm_7220_senderrbufs() local
760 sbuf[0] = qib_read_kreg64(dd, kr_sendbuffererror); in qib_disarm_7220_senderrbufs()
761 sbuf[1] = qib_read_kreg64(dd, kr_sendbuffererror + 1); in qib_disarm_7220_senderrbufs()
762 sbuf[2] = qib_read_kreg64(dd, kr_sendbuffererror + 2); in qib_disarm_7220_senderrbufs()
765 qib_disarm_piobufs_set(dd, sbuf, in qib_disarm_7220_senderrbufs()
766 dd->piobcnt2k + dd->piobcnt4k); in qib_disarm_7220_senderrbufs()
769 static void qib_7220_txe_recover(struct qib_devdata *dd) in qib_7220_txe_recover() argument
771 qib_devinfo(dd->pcidev, "Recovering from TXE PIO parity error\n"); in qib_7220_txe_recover()
772 qib_disarm_7220_senderrbufs(dd->pport); in qib_7220_txe_recover()
780 struct qib_devdata *dd = ppd->dd; in qib_7220_sdma_sendctrl() local
799 spin_lock(&dd->sendctrl_lock); in qib_7220_sdma_sendctrl()
801 dd->sendctrl |= set_sendctrl; in qib_7220_sdma_sendctrl()
802 dd->sendctrl &= ~clr_sendctrl; in qib_7220_sdma_sendctrl()
804 qib_write_kreg(dd, kr_sendctrl, dd->sendctrl); in qib_7220_sdma_sendctrl()
805 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_sdma_sendctrl()
807 spin_unlock(&dd->sendctrl_lock); in qib_7220_sdma_sendctrl()
861 ppd->dd->upd_pio_shadow = 1; /* update our idea of what's busy */ in qib_7220_sdma_hw_clean_up()
871 qib_write_kreg(ppd->dd, kr_senddmalengen, ppd->sdma_descq_cnt); in qib_sdma_7220_setlengen()
872 qib_write_kreg(ppd->dd, kr_senddmalengen, in qib_sdma_7220_setlengen()
899 struct qib_devdata *dd = ppd->dd; in sdma_7220_errors() local
904 msg = dd->cspec->sdmamsgbuf; in sdma_7220_errors()
905 qib_decode_7220_sdma_errs(ppd, errs, msg, sizeof dd->cspec->sdmamsgbuf); in sdma_7220_errors()
911 sbuf[0] = qib_read_kreg64(dd, kr_sendbuffererror); in sdma_7220_errors()
912 sbuf[1] = qib_read_kreg64(dd, kr_sendbuffererror + 1); in sdma_7220_errors()
913 sbuf[2] = qib_read_kreg64(dd, kr_sendbuffererror + 2); in sdma_7220_errors()
915 qib_dev_err(ppd->dd, in sdma_7220_errors()
917 ppd->dd->unit, ppd->port, sbuf[2], sbuf[1], in sdma_7220_errors()
922 qib_dev_err(dd, "IB%u:%u SDmaUnexpData\n", ppd->dd->unit, in sdma_7220_errors()
968 static int qib_decode_7220_err(struct qib_devdata *dd, char *buf, size_t blen, in qib_decode_7220_err() argument
1036 qib_decode_7220_sdma_errs(dd->pport, err, buf, blen); in qib_decode_7220_err()
1089 static void handle_7220_errors(struct qib_devdata *dd, u64 errs) in handle_7220_errors() argument
1095 struct qib_pportdata *ppd = dd->pport; in handle_7220_errors()
1099 errs &= dd->cspec->errormask; in handle_7220_errors()
1100 msg = dd->cspec->emsgbuf; in handle_7220_errors()
1104 qib_7220_handle_hwerrors(dd, msg, sizeof dd->cspec->emsgbuf); in handle_7220_errors()
1107 if (errs & dd->eep_st_masks[log_idx].errs_to_log) in handle_7220_errors()
1108 qib_inc_eeprom_err(dd, log_idx, 1); in handle_7220_errors()
1114 qib_dev_err(dd, in handle_7220_errors()
1143 qib_write_kreg(dd, kr_errclear, errs); in handle_7220_errors()
1158 qib_decode_7220_err(dd, msg, sizeof dd->cspec->emsgbuf, errs & ~mask); in handle_7220_errors()
1170 ibcs = qib_read_kreg64(dd, kr_ibcstatus); in handle_7220_errors()
1195 qib_dev_err(dd, in handle_7220_errors()
1197 dd->flags &= ~QIB_INITTED; /* needs re-init */ in handle_7220_errors()
1199 *dd->devstatusp |= QIB_STATUS_HWERROR; in handle_7220_errors()
1200 *dd->pport->statusp &= ~QIB_STATUS_IB_CONF; in handle_7220_errors()
1204 qib_dev_porterr(dd, ppd->port, "%s error\n", msg); in handle_7220_errors()
1217 qib_handle_urcv(dd, ~0U); in handle_7220_errors()
1228 static void qib_7220_set_intr_state(struct qib_devdata *dd, u32 enable) in qib_7220_set_intr_state() argument
1231 if (dd->flags & QIB_BADINTR) in qib_7220_set_intr_state()
1233 qib_write_kreg(dd, kr_intmask, ~0ULL); in qib_7220_set_intr_state()
1235 qib_write_kreg(dd, kr_intclear, 0ULL); in qib_7220_set_intr_state()
1237 qib_write_kreg(dd, kr_intmask, 0ULL); in qib_7220_set_intr_state()
1255 static void qib_7220_clear_freeze(struct qib_devdata *dd) in qib_7220_clear_freeze() argument
1258 qib_write_kreg(dd, kr_errmask, 0ULL); in qib_7220_clear_freeze()
1261 qib_7220_set_intr_state(dd, 0); in qib_7220_clear_freeze()
1263 qib_cancel_sends(dd->pport); in qib_7220_clear_freeze()
1266 qib_write_kreg(dd, kr_control, dd->control); in qib_7220_clear_freeze()
1267 qib_read_kreg32(dd, kr_scratch); in qib_7220_clear_freeze()
1270 qib_force_pio_avail_update(dd); in qib_7220_clear_freeze()
1278 qib_write_kreg(dd, kr_hwerrclear, 0ULL); in qib_7220_clear_freeze()
1279 qib_write_kreg(dd, kr_errclear, E_SPKT_ERRS_IGNORE); in qib_7220_clear_freeze()
1280 qib_write_kreg(dd, kr_errmask, dd->cspec->errormask); in qib_7220_clear_freeze()
1281 qib_7220_set_intr_state(dd, 1); in qib_7220_clear_freeze()
1295 static void qib_7220_handle_hwerrors(struct qib_devdata *dd, char *msg, in qib_7220_handle_hwerrors() argument
1304 hwerrs = qib_read_kreg64(dd, kr_hwerrstatus); in qib_7220_handle_hwerrors()
1308 qib_dev_err(dd, in qib_7220_handle_hwerrors()
1321 qib_write_kreg(dd, kr_hwerrclear, in qib_7220_handle_hwerrors()
1324 hwerrs &= dd->cspec->hwerrmask; in qib_7220_handle_hwerrors()
1328 if (hwerrs & dd->eep_st_masks[log_idx].hwerrs_to_log) in qib_7220_handle_hwerrors()
1329 qib_inc_eeprom_err(dd, log_idx, 1); in qib_7220_handle_hwerrors()
1332 qib_devinfo(dd->pcidev, in qib_7220_handle_hwerrors()
1337 qib_dev_err(dd, in qib_7220_handle_hwerrors()
1342 qib_sd7220_clr_ibpar(dd); in qib_7220_handle_hwerrors()
1344 ctrl = qib_read_kreg32(dd, kr_control); in qib_7220_handle_hwerrors()
1345 if ((ctrl & QLOGIC_IB_C_FREEZEMODE) && !dd->diag_client) { in qib_7220_handle_hwerrors()
1352 qib_7220_txe_recover(dd); in qib_7220_handle_hwerrors()
1359 qib_7220_clear_freeze(dd); in qib_7220_handle_hwerrors()
1370 dd->cspec->hwerrmask &= ~HWE_MASK(PowerOnBISTFailed); in qib_7220_handle_hwerrors()
1371 qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask); in qib_7220_handle_hwerrors()
1377 bitsmsg = dd->cspec->bitsmsgbuf; in qib_7220_handle_hwerrors()
1383 snprintf(bitsmsg, sizeof dd->cspec->bitsmsgbuf, in qib_7220_handle_hwerrors()
1393 snprintf(bitsmsg, sizeof dd->cspec->bitsmsgbuf, in qib_7220_handle_hwerrors()
1398 dd->cspec->hwerrmask &= ~(hwerrs & _QIB_PLL_FAIL); in qib_7220_handle_hwerrors()
1399 qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask); in qib_7220_handle_hwerrors()
1407 dd->cspec->hwerrmask &= ~QLOGIC_IB_HWE_SERDESPLLFAILED; in qib_7220_handle_hwerrors()
1408 qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask); in qib_7220_handle_hwerrors()
1411 qib_dev_err(dd, "%s hardware error\n", msg); in qib_7220_handle_hwerrors()
1413 if (isfatal && !dd->diag_client) { in qib_7220_handle_hwerrors()
1414 qib_dev_err(dd, in qib_7220_handle_hwerrors()
1416 dd->serial); in qib_7220_handle_hwerrors()
1421 if (dd->freezemsg) in qib_7220_handle_hwerrors()
1422 snprintf(dd->freezemsg, dd->freezelen, in qib_7220_handle_hwerrors()
1424 qib_disable_after_error(dd); in qib_7220_handle_hwerrors()
1439 static void qib_7220_init_hwerrors(struct qib_devdata *dd) in qib_7220_init_hwerrors() argument
1444 extsval = qib_read_kreg64(dd, kr_extstatus); in qib_7220_init_hwerrors()
1448 qib_dev_err(dd, "MemBIST did not complete!\n"); in qib_7220_init_hwerrors()
1450 qib_devinfo(dd->pcidev, "MemBIST is disabled.\n"); in qib_7220_init_hwerrors()
1455 dd->cspec->hwerrmask = val; in qib_7220_init_hwerrors()
1457 qib_write_kreg(dd, kr_hwerrclear, ~HWE_MASK(PowerOnBISTFailed)); in qib_7220_init_hwerrors()
1458 qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask); in qib_7220_init_hwerrors()
1461 qib_write_kreg(dd, kr_errclear, ~0ULL); in qib_7220_init_hwerrors()
1463 qib_write_kreg(dd, kr_errmask, ~0ULL); in qib_7220_init_hwerrors()
1464 dd->cspec->errormask = qib_read_kreg64(dd, kr_errmask); in qib_7220_init_hwerrors()
1466 qib_write_kreg(dd, kr_intclear, ~0ULL); in qib_7220_init_hwerrors()
1475 static void qib_set_7220_armlaunch(struct qib_devdata *dd, u32 enable) in qib_set_7220_armlaunch() argument
1478 qib_write_kreg(dd, kr_errclear, ERR_MASK(SendPioArmLaunchErr)); in qib_set_7220_armlaunch()
1479 dd->cspec->errormask |= ERR_MASK(SendPioArmLaunchErr); in qib_set_7220_armlaunch()
1481 dd->cspec->errormask &= ~ERR_MASK(SendPioArmLaunchErr); in qib_set_7220_armlaunch()
1482 qib_write_kreg(dd, kr_errmask, dd->cspec->errormask); in qib_set_7220_armlaunch()
1494 struct qib_devdata *dd = ppd->dd; in qib_set_ib_7220_lstate() local
1519 qib_write_kreg(dd, kr_ibcctrl, ppd->cpspec->ibcctrl | mod_wd); in qib_set_ib_7220_lstate()
1521 qib_write_kreg(dd, kr_scratch, 0); in qib_set_ib_7220_lstate()
1537 struct qib_devdata *dd = ppd->dd; in qib_7220_bringup_serdes() local
1542 dd->control &= ~QLOGIC_IB_C_LINKENABLE; in qib_7220_bringup_serdes()
1543 qib_write_kreg(dd, kr_control, 0ULL); in qib_7220_bringup_serdes()
1547 ppd->cpspec->ibsymsnap = read_7220_creg32(dd, cr_ibsymbolerr); in qib_7220_bringup_serdes()
1549 read_7220_creg32(dd, cr_iblinkerrrecov); in qib_7220_bringup_serdes()
1576 qib_write_kreg(dd, kr_ibcctrl, val); in qib_7220_bringup_serdes()
1580 ppd->cpspec->ibcddrctrl = qib_read_kreg64(dd, kr_ibcddrctrl); in qib_7220_bringup_serdes()
1609 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_bringup_serdes()
1611 qib_write_kreg(dd, kr_ibcddrctrl, ppd->cpspec->ibcddrctrl); in qib_7220_bringup_serdes()
1612 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_bringup_serdes()
1614 qib_write_kreg(dd, kr_ncmodectrl, 0Ull); in qib_7220_bringup_serdes()
1615 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_bringup_serdes()
1617 ret = qib_sd7220_init(dd); in qib_7220_bringup_serdes()
1619 val = qib_read_kreg64(dd, kr_xgxs_cfg); in qib_7220_bringup_serdes()
1623 qib_write_kreg(dd, kr_xgxs_cfg, val); in qib_7220_bringup_serdes()
1624 qib_read_kreg32(dd, kr_scratch); in qib_7220_bringup_serdes()
1629 qib_write_kreg(dd, kr_xgxs_cfg, val); in qib_7220_bringup_serdes()
1633 ppd->guid = dd->base_guid; in qib_7220_bringup_serdes()
1636 qib_write_kreg(dd, kr_hrtbt_guid, guid); in qib_7220_bringup_serdes()
1638 dd->control |= QLOGIC_IB_C_LINKENABLE; in qib_7220_bringup_serdes()
1639 qib_write_kreg(dd, kr_control, dd->control); in qib_7220_bringup_serdes()
1642 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_bringup_serdes()
1654 struct qib_devdata *dd = ppd->dd; in qib_7220_quiet_serdes() local
1658 dd->control &= ~QLOGIC_IB_C_LINKENABLE; in qib_7220_quiet_serdes()
1659 qib_write_kreg(dd, kr_control, in qib_7220_quiet_serdes()
1660 dd->control | QLOGIC_IB_C_FREEZEMODE); in qib_7220_quiet_serdes()
1671 diagc = qib_read_kreg64(dd, kr_hwdiagctrl); in qib_7220_quiet_serdes()
1672 qib_write_kreg(dd, kr_hwdiagctrl, in qib_7220_quiet_serdes()
1676 val = read_7220_creg32(dd, cr_ibsymbolerr); in qib_7220_quiet_serdes()
1680 write_7220_creg(dd, cr_ibsymbolerr, val); in qib_7220_quiet_serdes()
1683 val = read_7220_creg32(dd, cr_iblinkerrrecov); in qib_7220_quiet_serdes()
1687 write_7220_creg(dd, cr_iblinkerrrecov, val); in qib_7220_quiet_serdes()
1691 qib_write_kreg(dd, kr_hwdiagctrl, diagc); in qib_7220_quiet_serdes()
1701 shutdown_7220_relock_poll(ppd->dd); in qib_7220_quiet_serdes()
1702 val = qib_read_kreg64(ppd->dd, kr_xgxs_cfg); in qib_7220_quiet_serdes()
1704 qib_write_kreg(ppd->dd, kr_xgxs_cfg, val); in qib_7220_quiet_serdes()
1732 struct qib_devdata *dd = ppd->dd; in qib_setup_7220_setextled() local
1740 if (dd->diag_client) in qib_setup_7220_setextled()
1749 val = qib_read_kreg64(dd, kr_ibcstatus); in qib_setup_7220_setextled()
1757 spin_lock_irqsave(&dd->cspec->gpio_lock, flags); in qib_setup_7220_setextled()
1758 extctl = dd->cspec->extctrl & ~(SYM_MASK(EXTCtrl, LEDPriPortGreenOn) | in qib_setup_7220_setextled()
1772 dd->cspec->extctrl = extctl; in qib_setup_7220_setextled()
1773 qib_write_kreg(dd, kr_extctrl, extctl); in qib_setup_7220_setextled()
1774 spin_unlock_irqrestore(&dd->cspec->gpio_lock, flags); in qib_setup_7220_setextled()
1777 qib_write_kreg(dd, kr_rcvpktledcnt, ledblink); in qib_setup_7220_setextled()
1780 static void qib_7220_free_irq(struct qib_devdata *dd) in qib_7220_free_irq() argument
1782 if (dd->cspec->irq) { in qib_7220_free_irq()
1783 free_irq(dd->cspec->irq, dd); in qib_7220_free_irq()
1784 dd->cspec->irq = 0; in qib_7220_free_irq()
1786 qib_nomsi(dd); in qib_7220_free_irq()
1796 static void qib_setup_7220_cleanup(struct qib_devdata *dd) in qib_setup_7220_cleanup() argument
1798 qib_7220_free_irq(dd); in qib_setup_7220_cleanup()
1799 kfree(dd->cspec->cntrs); in qib_setup_7220_cleanup()
1800 kfree(dd->cspec->portcntrs); in qib_setup_7220_cleanup()
1842 static void qib_wantpiobuf_7220_intr(struct qib_devdata *dd, u32 needint) in qib_wantpiobuf_7220_intr() argument
1846 spin_lock_irqsave(&dd->sendctrl_lock, flags); in qib_wantpiobuf_7220_intr()
1848 if (!(dd->sendctrl & SYM_MASK(SendCtrl, SendBufAvailUpd))) in qib_wantpiobuf_7220_intr()
1855 qib_write_kreg(dd, kr_sendctrl, dd->sendctrl & in qib_wantpiobuf_7220_intr()
1857 qib_write_kreg(dd, kr_scratch, 0ULL); in qib_wantpiobuf_7220_intr()
1858 dd->sendctrl |= SYM_MASK(SendCtrl, SendIntBufAvail); in qib_wantpiobuf_7220_intr()
1860 dd->sendctrl &= ~SYM_MASK(SendCtrl, SendIntBufAvail); in qib_wantpiobuf_7220_intr()
1861 qib_write_kreg(dd, kr_sendctrl, dd->sendctrl); in qib_wantpiobuf_7220_intr()
1862 qib_write_kreg(dd, kr_scratch, 0ULL); in qib_wantpiobuf_7220_intr()
1864 spin_unlock_irqrestore(&dd->sendctrl_lock, flags); in qib_wantpiobuf_7220_intr()
1871 static noinline void unlikely_7220_intr(struct qib_devdata *dd, u64 istat) in unlikely_7220_intr() argument
1874 qib_dev_err(dd, in unlikely_7220_intr()
1888 gpiostatus = qib_read_kreg32(dd, kr_gpio_status); in unlikely_7220_intr()
1896 qib_write_kreg(dd, kr_gpio_clear, gpiostatus); in unlikely_7220_intr()
1899 const u32 mask = qib_read_kreg32(dd, kr_gpio_mask); in unlikely_7220_intr()
1913 dd->cspec->gpio_mask &= ~gpio_irq; in unlikely_7220_intr()
1914 qib_write_kreg(dd, kr_gpio_mask, dd->cspec->gpio_mask); in unlikely_7220_intr()
1922 estat = qib_read_kreg64(dd, kr_errstatus); in unlikely_7220_intr()
1924 qib_devinfo(dd->pcidev, in unlikely_7220_intr()
1928 handle_7220_errors(dd, estat); in unlikely_7220_intr()
1934 struct qib_devdata *dd = data; in qib_7220intr() local
1941 if ((dd->flags & (QIB_PRESENT | QIB_BADINTR)) != QIB_PRESENT) { in qib_7220intr()
1952 istat = qib_read_kreg64(dd, kr_intstatus); in qib_7220intr()
1959 qib_bad_intrstatus(dd); in qib_7220intr()
1965 this_cpu_inc(*dd->int_counter); in qib_7220intr()
1968 unlikely_7220_intr(dd, istat); in qib_7220intr()
1976 qib_write_kreg(dd, kr_intclear, istat); in qib_7220intr()
1989 for (i = 0; i < dd->first_user_ctxt; i++) { in qib_7220intr()
1992 qib_kreceive(dd->rcd[i], NULL, NULL); in qib_7220intr()
2000 qib_handle_urcv(dd, ctxtrbits); in qib_7220intr()
2006 sdma_7220_intr(dd->pport, istat); in qib_7220intr()
2008 if ((istat & QLOGIC_IB_I_SPIOBUFAVAIL) && (dd->flags & QIB_INITTED)) in qib_7220intr()
2009 qib_ib_piobufavail(dd); in qib_7220intr()
2024 static void qib_setup_7220_interrupt(struct qib_devdata *dd) in qib_setup_7220_interrupt() argument
2026 if (!dd->cspec->irq) in qib_setup_7220_interrupt()
2027 qib_dev_err(dd, in qib_setup_7220_interrupt()
2030 int ret = request_irq(dd->cspec->irq, qib_7220intr, in qib_setup_7220_interrupt()
2031 dd->msi_lo ? 0 : IRQF_SHARED, in qib_setup_7220_interrupt()
2032 QIB_DRV_NAME, dd); in qib_setup_7220_interrupt()
2035 qib_dev_err(dd, in qib_setup_7220_interrupt()
2037 dd->msi_lo ? "MSI" : "INTx", in qib_setup_7220_interrupt()
2038 dd->cspec->irq, ret); in qib_setup_7220_interrupt()
2048 static void qib_7220_boardname(struct qib_devdata *dd) in qib_7220_boardname() argument
2053 boardid = SYM_FIELD(dd->revision, Revision, in qib_7220_boardname()
2064 qib_dev_err(dd, "Unknown 7220 board with ID %u\n", boardid); in qib_7220_boardname()
2070 dd->boardname = kmalloc(namelen, GFP_KERNEL); in qib_7220_boardname()
2071 if (!dd->boardname) in qib_7220_boardname()
2072 qib_dev_err(dd, "Failed allocation for board name: %s\n", n); in qib_7220_boardname()
2074 snprintf(dd->boardname, namelen, "%s", n); in qib_7220_boardname()
2076 if (dd->majrev != 5 || !dd->minrev || dd->minrev > 2) in qib_7220_boardname()
2077 qib_dev_err(dd, in qib_7220_boardname()
2079 dd->majrev, dd->minrev); in qib_7220_boardname()
2081 snprintf(dd->boardversion, sizeof(dd->boardversion), in qib_7220_boardname()
2083 QIB_CHIP_VERS_MAJ, QIB_CHIP_VERS_MIN, dd->boardname, in qib_7220_boardname()
2084 (unsigned)SYM_FIELD(dd->revision, Revision_R, Arch), in qib_7220_boardname()
2085 dd->majrev, dd->minrev, in qib_7220_boardname()
2086 (unsigned)SYM_FIELD(dd->revision, Revision_R, SW)); in qib_7220_boardname()
2093 static int qib_setup_7220_reset(struct qib_devdata *dd) in qib_setup_7220_reset() argument
2102 qib_pcie_getcmd(dd, &cmdval, &int_line, &clinesz); in qib_setup_7220_reset()
2105 qib_dev_err(dd, "Resetting InfiniPath unit %u\n", dd->unit); in qib_setup_7220_reset()
2108 qib_7220_set_intr_state(dd, 0); in qib_setup_7220_reset()
2110 dd->pport->cpspec->ibdeltainprog = 0; in qib_setup_7220_reset()
2111 dd->pport->cpspec->ibsymdelta = 0; in qib_setup_7220_reset()
2112 dd->pport->cpspec->iblnkerrdelta = 0; in qib_setup_7220_reset()
2119 dd->flags &= ~(QIB_INITTED | QIB_PRESENT); in qib_setup_7220_reset()
2121 dd->z_int_counter = qib_int_counter(dd); in qib_setup_7220_reset()
2122 val = dd->control | QLOGIC_IB_C_RESET; in qib_setup_7220_reset()
2123 writeq(val, &dd->kregbase[kr_control]); in qib_setup_7220_reset()
2134 qib_pcie_reenable(dd, cmdval, int_line, clinesz); in qib_setup_7220_reset()
2140 val = readq(&dd->kregbase[kr_revision]); in qib_setup_7220_reset()
2141 if (val == dd->revision) { in qib_setup_7220_reset()
2142 dd->flags |= QIB_PRESENT; /* it's back */ in qib_setup_7220_reset()
2143 ret = qib_reinit_intr(dd); in qib_setup_7220_reset()
2151 if (qib_pcie_params(dd, dd->lbus_width, NULL, NULL)) in qib_setup_7220_reset()
2152 qib_dev_err(dd, in qib_setup_7220_reset()
2156 qib_write_kreg(dd, kr_control, 0ULL); in qib_setup_7220_reset()
2159 qib_7220_init_hwerrors(dd); in qib_setup_7220_reset()
2162 if (dd->pport->cpspec->ibcddrctrl & IBA7220_IBC_IBTA_1_2_MASK) in qib_setup_7220_reset()
2163 dd->cspec->presets_needed = 1; in qib_setup_7220_reset()
2164 spin_lock_irqsave(&dd->pport->lflags_lock, flags); in qib_setup_7220_reset()
2165 dd->pport->lflags |= QIBL_IB_FORCE_NOTIFY; in qib_setup_7220_reset()
2166 dd->pport->lflags &= ~QIBL_IB_AUTONEG_FAILED; in qib_setup_7220_reset()
2167 spin_unlock_irqrestore(&dd->pport->lflags_lock, flags); in qib_setup_7220_reset()
2180 static void qib_7220_put_tid(struct qib_devdata *dd, u64 __iomem *tidptr, in qib_7220_put_tid() argument
2183 if (pa != dd->tidinvalid) { in qib_7220_put_tid()
2188 qib_dev_err(dd, "Physaddr %lx not 2KB aligned!\n", in qib_7220_put_tid()
2193 qib_dev_err(dd, in qib_7220_put_tid()
2200 chippa |= dd->tidtemplate; in qib_7220_put_tid()
2219 static void qib_7220_clear_tids(struct qib_devdata *dd, in qib_7220_clear_tids() argument
2227 if (!dd->kregbase || !rcd) in qib_7220_clear_tids()
2232 tidinv = dd->tidinvalid; in qib_7220_clear_tids()
2234 ((char __iomem *)(dd->kregbase) + in qib_7220_clear_tids()
2235 dd->rcvtidbase + in qib_7220_clear_tids()
2236 ctxt * dd->rcvtidcnt * sizeof(*tidbase)); in qib_7220_clear_tids()
2238 for (i = 0; i < dd->rcvtidcnt; i++) in qib_7220_clear_tids()
2239 qib_7220_put_tid(dd, &tidbase[i], RCVHQ_RCV_TYPE_EXPECTED, in qib_7220_clear_tids()
2243 ((char __iomem *)(dd->kregbase) + in qib_7220_clear_tids()
2244 dd->rcvegrbase + in qib_7220_clear_tids()
2248 qib_7220_put_tid(dd, &tidbase[i], RCVHQ_RCV_TYPE_EAGER, in qib_7220_clear_tids()
2258 static void qib_7220_tidtemplate(struct qib_devdata *dd) in qib_7220_tidtemplate() argument
2260 if (dd->rcvegrbufsize == 2048) in qib_7220_tidtemplate()
2261 dd->tidtemplate = IBA7220_TID_SZ_2K; in qib_7220_tidtemplate()
2262 else if (dd->rcvegrbufsize == 4096) in qib_7220_tidtemplate()
2263 dd->tidtemplate = IBA7220_TID_SZ_4K; in qib_7220_tidtemplate()
2264 dd->tidinvalid = 0; in qib_7220_tidtemplate()
2281 if (rcd->dd->flags & QIB_USE_SPCL_TRIG) in qib_7220_get_base_info()
2288 qib_7220_get_msgheader(struct qib_devdata *dd, __le32 *rhf_addr) in qib_7220_get_msgheader() argument
2293 (rhf_addr - dd->rhf_offset + offset); in qib_7220_get_msgheader()
2296 static void qib_7220_config_ctxts(struct qib_devdata *dd) in qib_7220_config_ctxts() argument
2301 nchipctxts = qib_read_kreg32(dd, kr_portcnt); in qib_7220_config_ctxts()
2302 dd->cspec->numctxts = nchipctxts; in qib_7220_config_ctxts()
2304 dd->qpn_mask = 0x3e; in qib_7220_config_ctxts()
2305 dd->first_user_ctxt = qib_n_krcv_queues * dd->num_pports; in qib_7220_config_ctxts()
2306 if (dd->first_user_ctxt > nchipctxts) in qib_7220_config_ctxts()
2307 dd->first_user_ctxt = nchipctxts; in qib_7220_config_ctxts()
2309 dd->first_user_ctxt = dd->num_pports; in qib_7220_config_ctxts()
2310 dd->n_krcv_queues = dd->first_user_ctxt; in qib_7220_config_ctxts()
2313 int nctxts = dd->first_user_ctxt + num_online_cpus(); in qib_7220_config_ctxts()
2316 dd->ctxtcnt = 5; in qib_7220_config_ctxts()
2318 dd->ctxtcnt = 9; in qib_7220_config_ctxts()
2320 dd->ctxtcnt = nchipctxts; in qib_7220_config_ctxts()
2322 dd->ctxtcnt = qib_cfgctxts; in qib_7220_config_ctxts()
2323 if (!dd->ctxtcnt) /* none of the above, set to max */ in qib_7220_config_ctxts()
2324 dd->ctxtcnt = nchipctxts; in qib_7220_config_ctxts()
2331 spin_lock_irqsave(&dd->cspec->rcvmod_lock, flags); in qib_7220_config_ctxts()
2332 if (dd->ctxtcnt > 9) in qib_7220_config_ctxts()
2333 dd->rcvctrl |= 2ULL << IBA7220_R_CTXTCFG_SHIFT; in qib_7220_config_ctxts()
2334 else if (dd->ctxtcnt > 5) in qib_7220_config_ctxts()
2335 dd->rcvctrl |= 1ULL << IBA7220_R_CTXTCFG_SHIFT; in qib_7220_config_ctxts()
2337 if (dd->qpn_mask) in qib_7220_config_ctxts()
2338 dd->rcvctrl |= 1ULL << QIB_7220_RcvCtrl_RcvQPMapEnable_LSB; in qib_7220_config_ctxts()
2339 qib_write_kreg(dd, kr_rcvctrl, dd->rcvctrl); in qib_7220_config_ctxts()
2340 spin_unlock_irqrestore(&dd->cspec->rcvmod_lock, flags); in qib_7220_config_ctxts()
2343 dd->cspec->rcvegrcnt = qib_read_kreg32(dd, kr_rcvegrcnt); in qib_7220_config_ctxts()
2344 dd->rcvhdrcnt = max(dd->cspec->rcvegrcnt, IBA7220_KRCVEGRCNT); in qib_7220_config_ctxts()
2380 ret = qib_read_kreg64(ppd->dd, kr_ibcddrstatus) in qib_7220_get_ib_cfg()
2437 struct qib_devdata *dd = ppd->dd; in qib_7220_set_ib_cfg() local
2491 dd->cspec->presets_needed = 1; in qib_7220_set_ib_cfg()
2537 qib_write_kreg(dd, kr_ibcctrl, ppd->cpspec->ibcctrl); in qib_7220_set_ib_cfg()
2538 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_set_ib_cfg()
2550 qib_write_kreg(dd, kr_ibcctrl, ppd->cpspec->ibcctrl); in qib_7220_set_ib_cfg()
2551 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_set_ib_cfg()
2559 qib_write_kreg(dd, kr_partitionkey, maskr); in qib_7220_set_ib_cfg()
2570 qib_write_kreg(dd, kr_ibcctrl, ppd->cpspec->ibcctrl); in qib_7220_set_ib_cfg()
2571 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_set_ib_cfg()
2585 qib_write_kreg(dd, kr_ibcctrl, ppd->cpspec->ibcctrl); in qib_7220_set_ib_cfg()
2586 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_set_ib_cfg()
2597 read_7220_creg32(dd, cr_ibsymbolerr); in qib_7220_set_ib_cfg()
2599 read_7220_creg32(dd, cr_iblinkerrrecov); in qib_7220_set_ib_cfg()
2613 qib_dev_err(dd, "bad linkcmd req 0x%x\n", val >> 16); in qib_7220_set_ib_cfg()
2644 qib_dev_err(dd, "bad linkinitcmd req 0x%x\n", in qib_7220_set_ib_cfg()
2664 qib_write_kreg(dd, kr_ibcddrctrl, in qib_7220_set_ib_cfg()
2666 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_set_ib_cfg()
2688 qib_write_kreg(dd, kr_ibcddrctrl, ppd->cpspec->ibcddrctrl); in qib_7220_set_ib_cfg()
2689 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_set_ib_cfg()
2707 qib_devinfo(ppd->dd->pcidev, "Enabling IB%u:%u IBC loopback\n", in qib_7220_set_loopback()
2708 ppd->dd->unit, ppd->port); in qib_7220_set_loopback()
2713 qib_devinfo(ppd->dd->pcidev, in qib_7220_set_loopback()
2715 ppd->dd->unit, ppd->port); in qib_7220_set_loopback()
2719 qib_write_kreg(ppd->dd, kr_ibcctrl, ppd->cpspec->ibcctrl); in qib_7220_set_loopback()
2723 qib_write_kreg(ppd->dd, kr_ibcddrctrl, in qib_7220_set_loopback()
2725 qib_write_kreg(ppd->dd, kr_scratch, 0); in qib_7220_set_loopback()
2734 qib_write_ureg(rcd->dd, ur_rcvegrindexhead, egrhd, rcd->ctxt); in qib_update_7220_usrhead()
2736 qib_write_ureg(rcd->dd, ur_rcvhdrhead, hd, rcd->ctxt); in qib_update_7220_usrhead()
2744 head = qib_read_ureg32(rcd->dd, ur_rcvhdrhead, rcd->ctxt); in qib_7220_hdrqempty()
2748 tail = qib_read_ureg32(rcd->dd, ur_rcvhdrtail, rcd->ctxt); in qib_7220_hdrqempty()
2762 struct qib_devdata *dd = ppd->dd; in rcvctrl_7220_mod() local
2766 spin_lock_irqsave(&dd->cspec->rcvmod_lock, flags); in rcvctrl_7220_mod()
2768 dd->rcvctrl |= (1ULL << IBA7220_R_TAILUPD_SHIFT); in rcvctrl_7220_mod()
2770 dd->rcvctrl &= ~(1ULL << IBA7220_R_TAILUPD_SHIFT); in rcvctrl_7220_mod()
2772 dd->rcvctrl &= ~(1ULL << IBA7220_R_PKEY_DIS_SHIFT); in rcvctrl_7220_mod()
2774 dd->rcvctrl |= (1ULL << IBA7220_R_PKEY_DIS_SHIFT); in rcvctrl_7220_mod()
2776 mask = (1ULL << dd->ctxtcnt) - 1; in rcvctrl_7220_mod()
2781 dd->rcvctrl |= (mask << SYM_LSB(RcvCtrl, PortEnable)); in rcvctrl_7220_mod()
2782 if (!(dd->flags & QIB_NODMA_RTAIL)) in rcvctrl_7220_mod()
2783 dd->rcvctrl |= 1ULL << IBA7220_R_TAILUPD_SHIFT; in rcvctrl_7220_mod()
2785 qib_write_kreg_ctxt(dd, kr_rcvhdrtailaddr, ctxt, in rcvctrl_7220_mod()
2786 dd->rcd[ctxt]->rcvhdrqtailaddr_phys); in rcvctrl_7220_mod()
2787 qib_write_kreg_ctxt(dd, kr_rcvhdraddr, ctxt, in rcvctrl_7220_mod()
2788 dd->rcd[ctxt]->rcvhdrq_phys); in rcvctrl_7220_mod()
2789 dd->rcd[ctxt]->seq_cnt = 1; in rcvctrl_7220_mod()
2792 dd->rcvctrl &= ~(mask << SYM_LSB(RcvCtrl, PortEnable)); in rcvctrl_7220_mod()
2794 dd->rcvctrl |= (mask << IBA7220_R_INTRAVAIL_SHIFT); in rcvctrl_7220_mod()
2796 dd->rcvctrl &= ~(mask << IBA7220_R_INTRAVAIL_SHIFT); in rcvctrl_7220_mod()
2797 qib_write_kreg(dd, kr_rcvctrl, dd->rcvctrl); in rcvctrl_7220_mod()
2798 if ((op & QIB_RCVCTRL_INTRAVAIL_ENB) && dd->rhdrhead_intr_off) { in rcvctrl_7220_mod()
2800 val = qib_read_ureg32(dd, ur_rcvhdrhead, ctxt) | in rcvctrl_7220_mod()
2801 dd->rhdrhead_intr_off; in rcvctrl_7220_mod()
2802 qib_write_ureg(dd, ur_rcvhdrhead, val, ctxt); in rcvctrl_7220_mod()
2811 val = qib_read_ureg32(dd, ur_rcvegrindextail, ctxt); in rcvctrl_7220_mod()
2812 qib_write_ureg(dd, ur_rcvegrindexhead, val, ctxt); in rcvctrl_7220_mod()
2814 val = qib_read_ureg32(dd, ur_rcvhdrtail, ctxt); in rcvctrl_7220_mod()
2815 dd->rcd[ctxt]->head = val; in rcvctrl_7220_mod()
2817 if (ctxt < dd->first_user_ctxt) in rcvctrl_7220_mod()
2818 val |= dd->rhdrhead_intr_off; in rcvctrl_7220_mod()
2819 qib_write_ureg(dd, ur_rcvhdrhead, val, ctxt); in rcvctrl_7220_mod()
2823 qib_write_kreg_ctxt(dd, kr_rcvhdrtailaddr, ctxt, 0); in rcvctrl_7220_mod()
2824 qib_write_kreg_ctxt(dd, kr_rcvhdraddr, ctxt, 0); in rcvctrl_7220_mod()
2828 for (i = 0; i < dd->cfgctxts; i++) { in rcvctrl_7220_mod()
2829 qib_write_kreg_ctxt(dd, kr_rcvhdrtailaddr, in rcvctrl_7220_mod()
2831 qib_write_kreg_ctxt(dd, kr_rcvhdraddr, i, 0); in rcvctrl_7220_mod()
2835 spin_unlock_irqrestore(&dd->cspec->rcvmod_lock, flags); in rcvctrl_7220_mod()
2848 struct qib_devdata *dd = ppd->dd; in sendctrl_7220_mod() local
2852 spin_lock_irqsave(&dd->sendctrl_lock, flags); in sendctrl_7220_mod()
2856 dd->sendctrl = 0; in sendctrl_7220_mod()
2858 dd->sendctrl &= ~SYM_MASK(SendCtrl, SPioEnable); in sendctrl_7220_mod()
2860 dd->sendctrl |= SYM_MASK(SendCtrl, SPioEnable); in sendctrl_7220_mod()
2861 if (dd->flags & QIB_USE_SPCL_TRIG) in sendctrl_7220_mod()
2862 dd->sendctrl |= SYM_MASK(SendCtrl, in sendctrl_7220_mod()
2866 dd->sendctrl &= ~SYM_MASK(SendCtrl, SendBufAvailUpd); in sendctrl_7220_mod()
2868 dd->sendctrl |= SYM_MASK(SendCtrl, SendBufAvailUpd); in sendctrl_7220_mod()
2873 tmp_dd_sendctrl = dd->sendctrl; in sendctrl_7220_mod()
2878 last = dd->piobcnt2k + dd->piobcnt4k; in sendctrl_7220_mod()
2883 qib_write_kreg(dd, kr_sendctrl, in sendctrl_7220_mod()
2886 qib_write_kreg(dd, kr_scratch, 0); in sendctrl_7220_mod()
2890 tmp_dd_sendctrl = dd->sendctrl; in sendctrl_7220_mod()
2899 (dd->sendctrl & SYM_MASK(SendCtrl, SendBufAvailUpd))) in sendctrl_7220_mod()
2902 qib_write_kreg(dd, kr_sendctrl, tmp_dd_sendctrl); in sendctrl_7220_mod()
2903 qib_write_kreg(dd, kr_scratch, 0); in sendctrl_7220_mod()
2906 qib_write_kreg(dd, kr_sendctrl, dd->sendctrl); in sendctrl_7220_mod()
2907 qib_write_kreg(dd, kr_scratch, 0); in sendctrl_7220_mod()
2910 spin_unlock_irqrestore(&dd->sendctrl_lock, flags); in sendctrl_7220_mod()
2920 v = qib_read_kreg32(dd, kr_scratch); in sendctrl_7220_mod()
2921 qib_write_kreg(dd, kr_scratch, v); in sendctrl_7220_mod()
2922 v = qib_read_kreg32(dd, kr_scratch); in sendctrl_7220_mod()
2923 qib_write_kreg(dd, kr_scratch, v); in sendctrl_7220_mod()
2924 qib_read_kreg32(dd, kr_scratch); in sendctrl_7220_mod()
2936 struct qib_devdata *dd = ppd->dd; in qib_portcntr_7220() local
2977 qib_devinfo(ppd->dd->pcidev, in qib_portcntr_7220()
2987 for (i = 0; i < dd->first_user_ctxt; i++) in qib_portcntr_7220()
2988 ret += read_7220_creg32(dd, cr_portovfl + i); in qib_portcntr_7220()
2999 ret = read_7220_creg(dd, creg); in qib_portcntr_7220()
3001 ret = read_7220_creg32(dd, creg); in qib_portcntr_7220()
3003 if (dd->pport->cpspec->ibdeltainprog) in qib_portcntr_7220()
3005 ret -= dd->pport->cpspec->ibsymdelta; in qib_portcntr_7220()
3007 if (dd->pport->cpspec->ibdeltainprog) in qib_portcntr_7220()
3009 ret -= dd->pport->cpspec->iblnkerrdelta; in qib_portcntr_7220()
3158 static void init_7220_cntrnames(struct qib_devdata *dd) in init_7220_cntrnames() argument
3163 for (i = 0, s = (char *)cntr7220names; s && j <= dd->cfgctxts; in init_7220_cntrnames()
3172 dd->cspec->ncntrs = i; in init_7220_cntrnames()
3175 dd->cspec->cntrnamelen = sizeof(cntr7220names) - 1; in init_7220_cntrnames()
3177 dd->cspec->cntrnamelen = 1 + s - cntr7220names; in init_7220_cntrnames()
3178 dd->cspec->cntrs = kmalloc(dd->cspec->ncntrs in init_7220_cntrnames()
3180 if (!dd->cspec->cntrs) in init_7220_cntrnames()
3181 qib_dev_err(dd, "Failed allocation for counters\n"); in init_7220_cntrnames()
3185 dd->cspec->nportcntrs = i - 1; in init_7220_cntrnames()
3186 dd->cspec->portcntrnamelen = sizeof(portcntr7220names) - 1; in init_7220_cntrnames()
3187 dd->cspec->portcntrs = kmalloc(dd->cspec->nportcntrs in init_7220_cntrnames()
3189 if (!dd->cspec->portcntrs) in init_7220_cntrnames()
3190 qib_dev_err(dd, "Failed allocation for portcounters\n"); in init_7220_cntrnames()
3193 static u32 qib_read_7220cntrs(struct qib_devdata *dd, loff_t pos, char **namep, in qib_read_7220cntrs() argument
3198 if (!dd->cspec->cntrs) { in qib_read_7220cntrs()
3205 ret = dd->cspec->cntrnamelen; in qib_read_7220cntrs()
3209 u64 *cntr = dd->cspec->cntrs; in qib_read_7220cntrs()
3212 ret = dd->cspec->ncntrs * sizeof(u64); in qib_read_7220cntrs()
3220 for (i = 0; i < dd->cspec->ncntrs; i++) in qib_read_7220cntrs()
3221 *cntr++ = read_7220_creg32(dd, cntr7220indices[i]); in qib_read_7220cntrs()
3227 static u32 qib_read_7220portcntrs(struct qib_devdata *dd, loff_t pos, u32 port, in qib_read_7220portcntrs() argument
3232 if (!dd->cspec->portcntrs) { in qib_read_7220portcntrs()
3238 ret = dd->cspec->portcntrnamelen; in qib_read_7220portcntrs()
3242 u64 *cntr = dd->cspec->portcntrs; in qib_read_7220portcntrs()
3243 struct qib_pportdata *ppd = &dd->pport[port]; in qib_read_7220portcntrs()
3246 ret = dd->cspec->nportcntrs * sizeof(u64); in qib_read_7220portcntrs()
3253 for (i = 0; i < dd->cspec->nportcntrs; i++) { in qib_read_7220portcntrs()
3259 *cntr++ = read_7220_creg32(dd, in qib_read_7220portcntrs()
3277 struct qib_devdata *dd = (struct qib_devdata *) opaque; in qib_get_7220_faststats() local
3278 struct qib_pportdata *ppd = dd->pport; in qib_get_7220_faststats()
3286 if (!(dd->flags & QIB_INITTED) || dd->diag_client) in qib_get_7220_faststats()
3297 spin_lock_irqsave(&dd->eep_st_lock, flags); in qib_get_7220_faststats()
3298 traffic_wds -= dd->traffic_wds; in qib_get_7220_faststats()
3299 dd->traffic_wds += traffic_wds; in qib_get_7220_faststats()
3300 spin_unlock_irqrestore(&dd->eep_st_lock, flags); in qib_get_7220_faststats()
3302 mod_timer(&dd->stats_timer, jiffies + HZ * ACTIVITY_TIMER); in qib_get_7220_faststats()
3308 static int qib_7220_intr_fallback(struct qib_devdata *dd) in qib_7220_intr_fallback() argument
3310 if (!dd->msi_lo) in qib_7220_intr_fallback()
3313 qib_devinfo(dd->pcidev, in qib_7220_intr_fallback()
3315 qib_7220_free_irq(dd); in qib_7220_intr_fallback()
3316 qib_enable_intx(dd->pcidev); in qib_7220_intr_fallback()
3323 dd->cspec->irq = dd->pcidev->irq; in qib_7220_intr_fallback()
3324 qib_setup_7220_interrupt(dd); in qib_7220_intr_fallback()
3337 struct qib_devdata *dd = ppd->dd; in qib_7220_xgxs_reset() local
3339 prev_val = qib_read_kreg64(dd, kr_xgxs_cfg); in qib_7220_xgxs_reset()
3342 qib_write_kreg(dd, kr_control, in qib_7220_xgxs_reset()
3343 dd->control & ~QLOGIC_IB_C_LINKENABLE); in qib_7220_xgxs_reset()
3344 qib_write_kreg(dd, kr_xgxs_cfg, val); in qib_7220_xgxs_reset()
3345 qib_read_kreg32(dd, kr_scratch); in qib_7220_xgxs_reset()
3346 qib_write_kreg(dd, kr_xgxs_cfg, prev_val); in qib_7220_xgxs_reset()
3347 qib_write_kreg(dd, kr_control, dd->control); in qib_7220_xgxs_reset()
3368 u32 lbuf = ppd->dd->cspec->lastbuf_for_pio; in get_7220_link_buf()
3376 sendctrl_7220_mod(ppd->dd->pport, QIB_SENDCTRL_AVAIL_BLIP); in get_7220_link_buf()
3377 qib_read_kreg64(ppd->dd, kr_scratch); /* extra chip flush */ in get_7220_link_buf()
3378 buf = qib_getsendbuf_range(ppd->dd, bnum, lbuf, lbuf); in get_7220_link_buf()
3394 qib_read_kreg64(ppd->dd, kr_scratch); /* extra chip flush */ in get_7220_link_buf()
3395 buf = qib_getsendbuf_range(ppd->dd, bnum, lbuf, lbuf); in get_7220_link_buf()
3416 struct qib_devdata *dd = ppd->dd; in autoneg_7220_sendpkt() local
3426 sendctrl_7220_mod(dd->pport, QIB_SENDCTRL_DISARM_BUF(pnum)); in autoneg_7220_sendpkt()
3431 if (dd->flags & QIB_USE_SPCL_TRIG) { in autoneg_7220_sendpkt()
3432 u32 spcl_off = (pnum >= dd->piobcnt2k) ? 2047 : 1023; in autoneg_7220_sendpkt()
3438 qib_sendbuf_done(dd, pnum); in autoneg_7220_sendpkt()
3446 struct qib_devdata *dd = ppd->dd; in autoneg_7220_send() local
3481 qib_read_kreg64(dd, kr_scratch); in autoneg_7220_send()
3484 qib_read_kreg64(dd, kr_scratch); in autoneg_7220_send()
3514 qib_write_kreg(ppd->dd, kr_ibcddrctrl, ppd->cpspec->ibcddrctrl); in set_7220_ibspeed_fast()
3515 qib_write_kreg(ppd->dd, kr_scratch, 0); in set_7220_ibspeed_fast()
3533 qib_write_kreg(ppd->dd, kr_ncmodectrl, 0x3b9dc07); in try_7220_autoneg()
3541 toggle_7220_rclkrls(ppd->dd); in try_7220_autoneg()
3554 struct qib_devdata *dd; in autoneg_7220_work() local
3561 dd = ppd->dd; in autoneg_7220_work()
3587 toggle_7220_rclkrls(dd); in autoneg_7220_work()
3596 toggle_7220_rclkrls(dd); in autoneg_7220_work()
3609 if (dd->cspec->autoneg_tries == AUTONEG_TRIES) { in autoneg_7220_work()
3611 dd->cspec->autoneg_tries = 0; in autoneg_7220_work()
3652 struct qib_devdata *dd = ppd->dd; in qib_7220_ib_updown() local
3669 qib_sd7220_presets(dd); in qib_7220_ib_updown()
3678 set_7220_relock_poll(dd, ibup); in qib_7220_ib_updown()
3686 dd->cspec->autoneg_tries < AUTONEG_TRIES) { in qib_7220_ib_updown()
3688 ++dd->cspec->autoneg_tries; in qib_7220_ib_updown()
3691 ppd->cpspec->ibsymsnap = read_7220_creg32(dd, in qib_7220_ib_updown()
3693 ppd->cpspec->iblnkerrsnap = read_7220_creg32(dd, in qib_7220_ib_updown()
3703 toggle_7220_rclkrls(dd); in qib_7220_ib_updown()
3713 dd->cspec->autoneg_tries = 0; in qib_7220_ib_updown()
3732 qib_write_kreg(dd, kr_ncmodectrl, 0); in qib_7220_ib_updown()
3745 set_7220_relock_poll(dd, ibup); in qib_7220_ib_updown()
3763 ppd->cpspec->ibsymdelta += read_7220_creg32(ppd->dd, in qib_7220_ib_updown()
3765 ppd->cpspec->iblnkerrdelta += read_7220_creg32(ppd->dd, in qib_7220_ib_updown()
3772 ppd->cpspec->ibsymsnap = read_7220_creg32(ppd->dd, in qib_7220_ib_updown()
3774 ppd->cpspec->iblnkerrsnap = read_7220_creg32(ppd->dd, in qib_7220_ib_updown()
3790 static int gpio_7220_mod(struct qib_devdata *dd, u32 out, u32 dir, u32 mask) in gpio_7220_mod() argument
3799 spin_lock_irqsave(&dd->cspec->gpio_lock, flags); in gpio_7220_mod()
3800 dd->cspec->extctrl &= ~((u64)mask << SYM_LSB(EXTCtrl, GPIOOe)); in gpio_7220_mod()
3801 dd->cspec->extctrl |= ((u64) dir << SYM_LSB(EXTCtrl, GPIOOe)); in gpio_7220_mod()
3802 new_out = (dd->cspec->gpio_out & ~mask) | out; in gpio_7220_mod()
3804 qib_write_kreg(dd, kr_extctrl, dd->cspec->extctrl); in gpio_7220_mod()
3805 qib_write_kreg(dd, kr_gpio_out, new_out); in gpio_7220_mod()
3806 dd->cspec->gpio_out = new_out; in gpio_7220_mod()
3807 spin_unlock_irqrestore(&dd->cspec->gpio_lock, flags); in gpio_7220_mod()
3817 read_val = qib_read_kreg64(dd, kr_extstatus); in gpio_7220_mod()
3826 static void get_7220_chip_params(struct qib_devdata *dd) in get_7220_chip_params() argument
3832 dd->uregbase = qib_read_kreg32(dd, kr_userregbase); in get_7220_chip_params()
3834 dd->rcvtidcnt = qib_read_kreg32(dd, kr_rcvtidcnt); in get_7220_chip_params()
3835 dd->rcvtidbase = qib_read_kreg32(dd, kr_rcvtidbase); in get_7220_chip_params()
3836 dd->rcvegrbase = qib_read_kreg32(dd, kr_rcvegrbase); in get_7220_chip_params()
3837 dd->palign = qib_read_kreg32(dd, kr_palign); in get_7220_chip_params()
3838 dd->piobufbase = qib_read_kreg64(dd, kr_sendpiobufbase); in get_7220_chip_params()
3839 dd->pio2k_bufbase = dd->piobufbase & 0xffffffff; in get_7220_chip_params()
3841 val = qib_read_kreg64(dd, kr_sendpiosize); in get_7220_chip_params()
3842 dd->piosize2k = val & ~0U; in get_7220_chip_params()
3843 dd->piosize4k = val >> 32; in get_7220_chip_params()
3848 dd->pport->ibmtu = (u32)mtu; in get_7220_chip_params()
3850 val = qib_read_kreg64(dd, kr_sendpiobufcnt); in get_7220_chip_params()
3851 dd->piobcnt2k = val & ~0U; in get_7220_chip_params()
3852 dd->piobcnt4k = val >> 32; in get_7220_chip_params()
3854 dd->pio2kbase = (u32 __iomem *) in get_7220_chip_params()
3855 ((char __iomem *) dd->kregbase + dd->pio2k_bufbase); in get_7220_chip_params()
3856 if (dd->piobcnt4k) { in get_7220_chip_params()
3857 dd->pio4kbase = (u32 __iomem *) in get_7220_chip_params()
3858 ((char __iomem *) dd->kregbase + in get_7220_chip_params()
3859 (dd->piobufbase >> 32)); in get_7220_chip_params()
3865 dd->align4k = ALIGN(dd->piosize4k, dd->palign); in get_7220_chip_params()
3868 piobufs = dd->piobcnt4k + dd->piobcnt2k; in get_7220_chip_params()
3870 dd->pioavregs = ALIGN(piobufs, sizeof(u64) * BITS_PER_BYTE / 2) / in get_7220_chip_params()
3879 static void set_7220_baseaddrs(struct qib_devdata *dd) in set_7220_baseaddrs() argument
3883 cregbase = qib_read_kreg32(dd, kr_counterregbase); in set_7220_baseaddrs()
3884 dd->cspec->cregbase = (u64 __iomem *) in set_7220_baseaddrs()
3885 ((char __iomem *) dd->kregbase + cregbase); in set_7220_baseaddrs()
3887 dd->egrtidbase = (u64 __iomem *) in set_7220_baseaddrs()
3888 ((char __iomem *) dd->kregbase + dd->rcvegrbase); in set_7220_baseaddrs()
3902 static int sendctrl_hook(struct qib_devdata *dd, in sendctrl_hook() argument
3911 qib_dev_err(dd, "SendCtrl Hook called with offs %X, %s-bit\n", in sendctrl_hook()
3919 spin_lock_irqsave(&dd->sendctrl_lock, flags); in sendctrl_hook()
3929 local_data = (u64)qib_read_kreg32(dd, idx); in sendctrl_hook()
3931 local_data = qib_read_kreg64(dd, idx); in sendctrl_hook()
3932 qib_dev_err(dd, "Sendctrl -> %X, Shad -> %X\n", in sendctrl_hook()
3933 (u32)local_data, (u32)dd->sendctrl); in sendctrl_hook()
3935 (dd->sendctrl & SENDCTRL_SHADOWED)) in sendctrl_hook()
3936 qib_dev_err(dd, "Sendctrl read: %X shadow is %X\n", in sendctrl_hook()
3937 (u32)local_data, (u32) dd->sendctrl); in sendctrl_hook()
3951 sval = (dd->sendctrl & ~mask); in sendctrl_hook()
3953 dd->sendctrl = sval; in sendctrl_hook()
3955 qib_dev_err(dd, "Sendctrl <- %X, Shad <- %X\n", in sendctrl_hook()
3957 qib_write_kreg(dd, kr_sendctrl, tval); in sendctrl_hook()
3958 qib_write_kreg(dd, kr_scratch, 0Ull); in sendctrl_hook()
3960 spin_unlock_irqrestore(&dd->sendctrl_lock, flags); in sendctrl_hook()
3975 static int qib_late_7220_initreg(struct qib_devdata *dd) in qib_late_7220_initreg() argument
3980 qib_write_kreg(dd, kr_rcvhdrentsize, dd->rcvhdrentsize); in qib_late_7220_initreg()
3981 qib_write_kreg(dd, kr_rcvhdrsize, dd->rcvhdrsize); in qib_late_7220_initreg()
3982 qib_write_kreg(dd, kr_rcvhdrcnt, dd->rcvhdrcnt); in qib_late_7220_initreg()
3983 qib_write_kreg(dd, kr_sendpioavailaddr, dd->pioavailregs_phys); in qib_late_7220_initreg()
3984 val = qib_read_kreg64(dd, kr_sendpioavailaddr); in qib_late_7220_initreg()
3985 if (val != dd->pioavailregs_phys) { in qib_late_7220_initreg()
3986 qib_dev_err(dd, in qib_late_7220_initreg()
3988 (unsigned long) dd->pioavailregs_phys, in qib_late_7220_initreg()
3992 qib_register_observer(dd, &sendctrl_observer); in qib_late_7220_initreg()
3996 static int qib_init_7220_variables(struct qib_devdata *dd) in qib_init_7220_variables() argument
4003 cpspec = (struct qib_chippport_specific *)(dd + 1); in qib_init_7220_variables()
4005 dd->pport = ppd; in qib_init_7220_variables()
4006 dd->num_pports = 1; in qib_init_7220_variables()
4008 dd->cspec = (struct qib_chip_specific *)(cpspec + dd->num_pports); in qib_init_7220_variables()
4011 spin_lock_init(&dd->cspec->sdepb_lock); in qib_init_7220_variables()
4012 spin_lock_init(&dd->cspec->rcvmod_lock); in qib_init_7220_variables()
4013 spin_lock_init(&dd->cspec->gpio_lock); in qib_init_7220_variables()
4016 dd->revision = readq(&dd->kregbase[kr_revision]); in qib_init_7220_variables()
4018 if ((dd->revision & 0xffffffffU) == 0xffffffffU) { in qib_init_7220_variables()
4019 qib_dev_err(dd, in qib_init_7220_variables()
4024 dd->flags |= QIB_PRESENT; /* now register routines work */ in qib_init_7220_variables()
4026 dd->majrev = (u8) SYM_FIELD(dd->revision, Revision_R, in qib_init_7220_variables()
4028 dd->minrev = (u8) SYM_FIELD(dd->revision, Revision_R, in qib_init_7220_variables()
4031 get_7220_chip_params(dd); in qib_init_7220_variables()
4032 qib_7220_boardname(dd); in qib_init_7220_variables()
4038 dd->gpio_sda_num = _QIB_GPIO_SDA_NUM; in qib_init_7220_variables()
4039 dd->gpio_scl_num = _QIB_GPIO_SCL_NUM; in qib_init_7220_variables()
4040 dd->twsi_eeprom_dev = QIB_TWSI_EEPROM_DEV; in qib_init_7220_variables()
4042 dd->flags |= QIB_HAS_INTX | QIB_HAS_LINK_LATENCY | in qib_init_7220_variables()
4044 dd->flags |= qib_special_trigger ? in qib_init_7220_variables()
4051 dd->eep_st_masks[0].hwerrs_to_log = HWE_MASK(TXEMemParityErr); in qib_init_7220_variables()
4053 dd->eep_st_masks[1].hwerrs_to_log = HWE_MASK(RXEMemParityErr); in qib_init_7220_variables()
4055 dd->eep_st_masks[2].errs_to_log = ERR_MASK(ResetNegated); in qib_init_7220_variables()
4060 ret = qib_init_pportdata(ppd, dd, 0, 1); in qib_init_7220_variables()
4079 qib_write_kreg(dd, kr_rcvbthqp, QIB_KD_QP); in qib_init_7220_variables()
4087 dd->rcvhdrentsize = QIB_RCVHDR_ENTSIZE; in qib_init_7220_variables()
4088 dd->rcvhdrsize = QIB_DFLT_RCVHDRSIZE; in qib_init_7220_variables()
4089 dd->rhf_offset = in qib_init_7220_variables()
4090 dd->rcvhdrentsize - sizeof(u64) / sizeof(u32); in qib_init_7220_variables()
4094 dd->rcvegrbufsize = ret != -1 ? max(ret, 2048) : QIB_DEFAULT_MTU; in qib_init_7220_variables()
4095 BUG_ON(!is_power_of_2(dd->rcvegrbufsize)); in qib_init_7220_variables()
4096 dd->rcvegrbufsize_shift = ilog2(dd->rcvegrbufsize); in qib_init_7220_variables()
4098 qib_7220_tidtemplate(dd); in qib_init_7220_variables()
4105 dd->rhdrhead_intr_off = 1ULL << 32; in qib_init_7220_variables()
4108 init_timer(&dd->stats_timer); in qib_init_7220_variables()
4109 dd->stats_timer.function = qib_get_7220_faststats; in qib_init_7220_variables()
4110 dd->stats_timer.data = (unsigned long) dd; in qib_init_7220_variables()
4111 dd->stats_timer.expires = jiffies + ACTIVITY_TIMER * HZ; in qib_init_7220_variables()
4119 dd->control |= 1 << 4; in qib_init_7220_variables()
4121 dd->ureg_align = 0x10000; /* 64KB alignment */ in qib_init_7220_variables()
4123 dd->piosize2kmax_dwords = (dd->piosize2k >> 2)-1; in qib_init_7220_variables()
4124 qib_7220_config_ctxts(dd); in qib_init_7220_variables()
4125 qib_set_ctxtcnt(dd); /* needed for PAT setup */ in qib_init_7220_variables()
4128 ret = init_chip_wc_pat(dd, 0); in qib_init_7220_variables()
4132 set_7220_baseaddrs(dd); /* set chip access pointers now */ in qib_init_7220_variables()
4138 ret = qib_create_ctxts(dd); in qib_init_7220_variables()
4139 init_7220_cntrnames(dd); in qib_init_7220_variables()
4152 if (dd->flags & QIB_HAS_SEND_DMA) { in qib_init_7220_variables()
4153 dd->cspec->sdmabufcnt = dd->piobcnt4k; in qib_init_7220_variables()
4156 dd->cspec->sdmabufcnt = 0; in qib_init_7220_variables()
4157 sbufs = dd->piobcnt4k; in qib_init_7220_variables()
4160 dd->cspec->lastbuf_for_pio = dd->piobcnt2k + dd->piobcnt4k - in qib_init_7220_variables()
4161 dd->cspec->sdmabufcnt; in qib_init_7220_variables()
4162 dd->lastctxt_piobuf = dd->cspec->lastbuf_for_pio - sbufs; in qib_init_7220_variables()
4163 dd->cspec->lastbuf_for_pio--; /* range is <= , not < */ in qib_init_7220_variables()
4164 dd->last_pio = dd->cspec->lastbuf_for_pio; in qib_init_7220_variables()
4165 dd->pbufsctxt = dd->lastctxt_piobuf / in qib_init_7220_variables()
4166 (dd->cfgctxts - dd->first_user_ctxt); in qib_init_7220_variables()
4174 if ((dd->pbufsctxt - 2) < updthresh) in qib_init_7220_variables()
4175 updthresh = dd->pbufsctxt - 2; in qib_init_7220_variables()
4177 dd->cspec->updthresh_dflt = updthresh; in qib_init_7220_variables()
4178 dd->cspec->updthresh = updthresh; in qib_init_7220_variables()
4181 dd->sendctrl |= (updthresh & SYM_RMASK(SendCtrl, AvailUpdThld)) in qib_init_7220_variables()
4184 dd->psxmitwait_supported = 1; in qib_init_7220_variables()
4185 dd->psxmitwait_check_rate = QIB_7220_PSXMITWAIT_CHECK_RATE; in qib_init_7220_variables()
4194 struct qib_devdata *dd = ppd->dd; in qib_7220_getsendbuf() local
4201 if ((plen + 1) > dd->piosize2kmax_dwords) in qib_7220_getsendbuf()
4202 first = dd->piobcnt2k; in qib_7220_getsendbuf()
4206 last = dd->cspec->lastbuf_for_pio; in qib_7220_getsendbuf()
4207 buf = qib_getsendbuf_range(dd, pbufnum, first, last); in qib_7220_getsendbuf()
4216 write_7220_creg(ppd->dd, cr_psinterval, intv); in qib_set_cntr_7220_sample()
4217 write_7220_creg(ppd->dd, cr_psstart, start); in qib_set_cntr_7220_sample()
4232 qib_write_kreg(ppd->dd, kr_senddmatail, tail); in qib_sdma_update_7220_tail()
4286 struct qib_devdata *dd = ppd->dd; in init_sdma_7220_regs() local
4291 qib_write_kreg(dd, kr_senddmabase, ppd->sdma_descq_phys); in init_sdma_7220_regs()
4295 qib_write_kreg(dd, kr_senddmaheadaddr, ppd->sdma_head_phys); in init_sdma_7220_regs()
4301 n = dd->piobcnt2k + dd->piobcnt4k; in init_sdma_7220_regs()
4302 i = n - dd->cspec->sdmabufcnt; in init_sdma_7220_regs()
4311 qib_write_kreg(dd, kr_senddmabufmask0, senddmabufmask[0]); in init_sdma_7220_regs()
4312 qib_write_kreg(dd, kr_senddmabufmask1, senddmabufmask[1]); in init_sdma_7220_regs()
4313 qib_write_kreg(dd, kr_senddmabufmask2, senddmabufmask[2]); in init_sdma_7220_regs()
4324 struct qib_devdata *dd = ppd->dd; in qib_sdma_7220_gethead() local
4333 (dd->flags & QIB_HAS_SDMA_TIMEOUT); in qib_sdma_7220_gethead()
4337 (u16)qib_read_kreg32(dd, kr_senddmahead); in qib_sdma_7220_gethead()
4370 u64 hwstatus = qib_read_kreg64(ppd->dd, kr_senddmastatus); in qib_sdma_7220_busy()
4402 static void qib_7220_initvl15_bufs(struct qib_devdata *dd) in qib_7220_initvl15_bufs() argument
4412 rcd->rcvegrcnt = rcd->dd->cspec->rcvegrcnt; in qib_7220_init_ctxt()
4418 static void qib_7220_txchk_change(struct qib_devdata *dd, u32 start, in qib_7220_txchk_change() argument
4427 spin_lock_irqsave(&dd->uctxt_lock, flags); in qib_7220_txchk_change()
4428 for (i = dd->first_user_ctxt; in qib_7220_txchk_change()
4429 dd->cspec->updthresh != dd->cspec->updthresh_dflt in qib_7220_txchk_change()
4430 && i < dd->cfgctxts; i++) in qib_7220_txchk_change()
4431 if (dd->rcd[i] && dd->rcd[i]->subctxt_cnt && in qib_7220_txchk_change()
4432 ((dd->rcd[i]->piocnt / dd->rcd[i]->subctxt_cnt) - 1) in qib_7220_txchk_change()
4433 < dd->cspec->updthresh_dflt) in qib_7220_txchk_change()
4435 spin_unlock_irqrestore(&dd->uctxt_lock, flags); in qib_7220_txchk_change()
4436 if (i == dd->cfgctxts) { in qib_7220_txchk_change()
4437 spin_lock_irqsave(&dd->sendctrl_lock, flags); in qib_7220_txchk_change()
4438 dd->cspec->updthresh = dd->cspec->updthresh_dflt; in qib_7220_txchk_change()
4439 dd->sendctrl &= ~SYM_MASK(SendCtrl, AvailUpdThld); in qib_7220_txchk_change()
4440 dd->sendctrl |= (dd->cspec->updthresh & in qib_7220_txchk_change()
4443 spin_unlock_irqrestore(&dd->sendctrl_lock, flags); in qib_7220_txchk_change()
4444 sendctrl_7220_mod(dd->pport, QIB_SENDCTRL_AVAIL_BLIP); in qib_7220_txchk_change()
4448 spin_lock_irqsave(&dd->sendctrl_lock, flags); in qib_7220_txchk_change()
4450 / rcd->subctxt_cnt) - 1) < dd->cspec->updthresh) { in qib_7220_txchk_change()
4451 dd->cspec->updthresh = (rcd->piocnt / in qib_7220_txchk_change()
4453 dd->sendctrl &= ~SYM_MASK(SendCtrl, AvailUpdThld); in qib_7220_txchk_change()
4454 dd->sendctrl |= (dd->cspec->updthresh & in qib_7220_txchk_change()
4457 spin_unlock_irqrestore(&dd->sendctrl_lock, flags); in qib_7220_txchk_change()
4458 sendctrl_7220_mod(dd->pport, QIB_SENDCTRL_AVAIL_BLIP); in qib_7220_txchk_change()
4460 spin_unlock_irqrestore(&dd->sendctrl_lock, flags); in qib_7220_txchk_change()
4465 static void writescratch(struct qib_devdata *dd, u32 val) in writescratch() argument
4467 qib_write_kreg(dd, kr_scratch, val); in writescratch()
4478 static int qib_7220_tempsense_rd(struct qib_devdata *dd, int regnum) in qib_7220_tempsense_rd() argument
4494 ret = mutex_lock_interruptible(&dd->eep_lock); in qib_7220_tempsense_rd()
4498 ret = qib_twsi_blk_rd(dd, QIB_TWSI_TEMP_DEV, regnum, &rdata, 1); in qib_7220_tempsense_rd()
4502 mutex_unlock(&dd->eep_lock); in qib_7220_tempsense_rd()
4515 static int qib_7220_notify_dca(struct qib_devdata *dd, unsigned long event) in qib_7220_notify_dca() argument
4522 static int qib_7220_eeprom_wen(struct qib_devdata *dd, int wen) in qib_7220_eeprom_wen() argument
4538 struct qib_devdata *dd; in qib_init_iba7220_funcs() local
4542 dd = qib_alloc_devdata(pdev, sizeof(struct qib_chip_specific) + in qib_init_iba7220_funcs()
4544 if (IS_ERR(dd)) in qib_init_iba7220_funcs()
4547 dd->f_bringup_serdes = qib_7220_bringup_serdes; in qib_init_iba7220_funcs()
4548 dd->f_cleanup = qib_setup_7220_cleanup; in qib_init_iba7220_funcs()
4549 dd->f_clear_tids = qib_7220_clear_tids; in qib_init_iba7220_funcs()
4550 dd->f_free_irq = qib_7220_free_irq; in qib_init_iba7220_funcs()
4551 dd->f_get_base_info = qib_7220_get_base_info; in qib_init_iba7220_funcs()
4552 dd->f_get_msgheader = qib_7220_get_msgheader; in qib_init_iba7220_funcs()
4553 dd->f_getsendbuf = qib_7220_getsendbuf; in qib_init_iba7220_funcs()
4554 dd->f_gpio_mod = gpio_7220_mod; in qib_init_iba7220_funcs()
4555 dd->f_eeprom_wen = qib_7220_eeprom_wen; in qib_init_iba7220_funcs()
4556 dd->f_hdrqempty = qib_7220_hdrqempty; in qib_init_iba7220_funcs()
4557 dd->f_ib_updown = qib_7220_ib_updown; in qib_init_iba7220_funcs()
4558 dd->f_init_ctxt = qib_7220_init_ctxt; in qib_init_iba7220_funcs()
4559 dd->f_initvl15_bufs = qib_7220_initvl15_bufs; in qib_init_iba7220_funcs()
4560 dd->f_intr_fallback = qib_7220_intr_fallback; in qib_init_iba7220_funcs()
4561 dd->f_late_initreg = qib_late_7220_initreg; in qib_init_iba7220_funcs()
4562 dd->f_setpbc_control = qib_7220_setpbc_control; in qib_init_iba7220_funcs()
4563 dd->f_portcntr = qib_portcntr_7220; in qib_init_iba7220_funcs()
4564 dd->f_put_tid = qib_7220_put_tid; in qib_init_iba7220_funcs()
4565 dd->f_quiet_serdes = qib_7220_quiet_serdes; in qib_init_iba7220_funcs()
4566 dd->f_rcvctrl = rcvctrl_7220_mod; in qib_init_iba7220_funcs()
4567 dd->f_read_cntrs = qib_read_7220cntrs; in qib_init_iba7220_funcs()
4568 dd->f_read_portcntrs = qib_read_7220portcntrs; in qib_init_iba7220_funcs()
4569 dd->f_reset = qib_setup_7220_reset; in qib_init_iba7220_funcs()
4570 dd->f_init_sdma_regs = init_sdma_7220_regs; in qib_init_iba7220_funcs()
4571 dd->f_sdma_busy = qib_sdma_7220_busy; in qib_init_iba7220_funcs()
4572 dd->f_sdma_gethead = qib_sdma_7220_gethead; in qib_init_iba7220_funcs()
4573 dd->f_sdma_sendctrl = qib_7220_sdma_sendctrl; in qib_init_iba7220_funcs()
4574 dd->f_sdma_set_desc_cnt = qib_sdma_set_7220_desc_cnt; in qib_init_iba7220_funcs()
4575 dd->f_sdma_update_tail = qib_sdma_update_7220_tail; in qib_init_iba7220_funcs()
4576 dd->f_sdma_hw_clean_up = qib_7220_sdma_hw_clean_up; in qib_init_iba7220_funcs()
4577 dd->f_sdma_hw_start_up = qib_7220_sdma_hw_start_up; in qib_init_iba7220_funcs()
4578 dd->f_sdma_init_early = qib_7220_sdma_init_early; in qib_init_iba7220_funcs()
4579 dd->f_sendctrl = sendctrl_7220_mod; in qib_init_iba7220_funcs()
4580 dd->f_set_armlaunch = qib_set_7220_armlaunch; in qib_init_iba7220_funcs()
4581 dd->f_set_cntr_sample = qib_set_cntr_7220_sample; in qib_init_iba7220_funcs()
4582 dd->f_iblink_state = qib_7220_iblink_state; in qib_init_iba7220_funcs()
4583 dd->f_ibphys_portstate = qib_7220_phys_portstate; in qib_init_iba7220_funcs()
4584 dd->f_get_ib_cfg = qib_7220_get_ib_cfg; in qib_init_iba7220_funcs()
4585 dd->f_set_ib_cfg = qib_7220_set_ib_cfg; in qib_init_iba7220_funcs()
4586 dd->f_set_ib_loopback = qib_7220_set_loopback; in qib_init_iba7220_funcs()
4587 dd->f_set_intr_state = qib_7220_set_intr_state; in qib_init_iba7220_funcs()
4588 dd->f_setextled = qib_setup_7220_setextled; in qib_init_iba7220_funcs()
4589 dd->f_txchk_change = qib_7220_txchk_change; in qib_init_iba7220_funcs()
4590 dd->f_update_usrhead = qib_update_7220_usrhead; in qib_init_iba7220_funcs()
4591 dd->f_wantpiobuf_intr = qib_wantpiobuf_7220_intr; in qib_init_iba7220_funcs()
4592 dd->f_xgxs_reset = qib_7220_xgxs_reset; in qib_init_iba7220_funcs()
4593 dd->f_writescratch = writescratch; in qib_init_iba7220_funcs()
4594 dd->f_tempsense_rd = qib_7220_tempsense_rd; in qib_init_iba7220_funcs()
4596 dd->f_notify_dca = qib_7220_notify_dca; in qib_init_iba7220_funcs()
4604 ret = qib_pcie_ddinit(dd, pdev, ent); in qib_init_iba7220_funcs()
4609 ret = qib_init_7220_variables(dd); in qib_init_iba7220_funcs()
4616 boardid = SYM_FIELD(dd->revision, Revision, in qib_init_iba7220_funcs()
4629 if (qib_pcie_params(dd, minwidth, NULL, NULL)) in qib_init_iba7220_funcs()
4630 qib_dev_err(dd, in qib_init_iba7220_funcs()
4634 dd->cspec->irq = pdev->irq; in qib_init_iba7220_funcs()
4636 if (qib_read_kreg64(dd, kr_hwerrstatus) & in qib_init_iba7220_funcs()
4638 qib_write_kreg(dd, kr_hwerrclear, in qib_init_iba7220_funcs()
4642 qib_setup_7220_interrupt(dd); in qib_init_iba7220_funcs()
4643 qib_7220_init_hwerrors(dd); in qib_init_iba7220_funcs()
4646 qib_write_kreg(dd, kr_hwdiagctrl, 0); in qib_init_iba7220_funcs()
4651 qib_pcie_ddcleanup(dd); in qib_init_iba7220_funcs()
4653 qib_free_devdata(dd); in qib_init_iba7220_funcs()
4654 dd = ERR_PTR(ret); in qib_init_iba7220_funcs()
4656 return dd; in qib_init_iba7220_funcs()