34 struct gpiomtd {  struct
41 #define gpio_nand_getpriv(x) container_of(x, struct gpiomtd, mtd_info)  argument
52 static void gpio_nand_dosync(struct gpiomtd *gpiomtd)  in gpio_nand_dosync()  argument
56 	if (gpiomtd->io_sync) {  in gpio_nand_dosync()
62 		tmp = readl(gpiomtd->io_sync);  in gpio_nand_dosync()
67 static inline void gpio_nand_dosync(struct gpiomtd *gpiomtd) {}  in gpio_nand_dosync()  argument
72 	struct gpiomtd *gpiomtd = gpio_nand_getpriv(mtd);  in gpio_nand_cmd_ctrl()  local
74 	gpio_nand_dosync(gpiomtd);  in gpio_nand_cmd_ctrl()
77 		gpio_set_value(gpiomtd->plat.gpio_nce, !(ctrl & NAND_NCE));  in gpio_nand_cmd_ctrl()
78 		gpio_set_value(gpiomtd->plat.gpio_cle, !!(ctrl & NAND_CLE));  in gpio_nand_cmd_ctrl()
79 		gpio_set_value(gpiomtd->plat.gpio_ale, !!(ctrl & NAND_ALE));  in gpio_nand_cmd_ctrl()
80 		gpio_nand_dosync(gpiomtd);  in gpio_nand_cmd_ctrl()
85 	writeb(cmd, gpiomtd->nand_chip.IO_ADDR_W);  in gpio_nand_cmd_ctrl()
86 	gpio_nand_dosync(gpiomtd);  in gpio_nand_cmd_ctrl()
91 	struct gpiomtd *gpiomtd = gpio_nand_getpriv(mtd);  in gpio_nand_devready()  local
93 	return gpio_get_value(gpiomtd->plat.gpio_rdy);  in gpio_nand_devready()
194 	struct gpiomtd *gpiomtd = platform_get_drvdata(pdev);  in gpio_nand_remove()  local
196 	nand_release(&gpiomtd->mtd_info);  in gpio_nand_remove()
198 	if (gpio_is_valid(gpiomtd->plat.gpio_nwp))  in gpio_nand_remove()
199 		gpio_set_value(gpiomtd->plat.gpio_nwp, 0);  in gpio_nand_remove()
200 	gpio_set_value(gpiomtd->plat.gpio_nce, 1);  in gpio_nand_remove()
207 	struct gpiomtd *gpiomtd;  in gpio_nand_probe()  local
216 	gpiomtd = devm_kzalloc(&pdev->dev, sizeof(*gpiomtd), GFP_KERNEL);  in gpio_nand_probe()
217 	if (!gpiomtd)  in gpio_nand_probe()
220 	chip = &gpiomtd->nand_chip;  in gpio_nand_probe()
229 		gpiomtd->io_sync = devm_ioremap_resource(&pdev->dev, res);  in gpio_nand_probe()
230 		if (IS_ERR(gpiomtd->io_sync))  in gpio_nand_probe()
231 			return PTR_ERR(gpiomtd->io_sync);  in gpio_nand_probe()
234 	ret = gpio_nand_get_config(&pdev->dev, &gpiomtd->plat);  in gpio_nand_probe()
238 	ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_nce, "NAND NCE");  in gpio_nand_probe()
241 	gpio_direction_output(gpiomtd->plat.gpio_nce, 1);  in gpio_nand_probe()
243 	if (gpio_is_valid(gpiomtd->plat.gpio_nwp)) {  in gpio_nand_probe()
244 		ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_nwp,  in gpio_nand_probe()
250 	ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_ale, "NAND ALE");  in gpio_nand_probe()
253 	gpio_direction_output(gpiomtd->plat.gpio_ale, 0);  in gpio_nand_probe()
255 	ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_cle, "NAND CLE");  in gpio_nand_probe()
258 	gpio_direction_output(gpiomtd->plat.gpio_cle, 0);  in gpio_nand_probe()
260 	if (gpio_is_valid(gpiomtd->plat.gpio_rdy)) {  in gpio_nand_probe()
261 		ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_rdy,  in gpio_nand_probe()
265 		gpio_direction_input(gpiomtd->plat.gpio_rdy);  in gpio_nand_probe()
271 	chip->options		= gpiomtd->plat.options;  in gpio_nand_probe()
272 	chip->chip_delay	= gpiomtd->plat.chip_delay;  in gpio_nand_probe()
275 	gpiomtd->mtd_info.priv	= chip;  in gpio_nand_probe()
276 	gpiomtd->mtd_info.owner	= THIS_MODULE;  in gpio_nand_probe()
278 	platform_set_drvdata(pdev, gpiomtd);  in gpio_nand_probe()
280 	if (gpio_is_valid(gpiomtd->plat.gpio_nwp))  in gpio_nand_probe()
281 		gpio_direction_output(gpiomtd->plat.gpio_nwp, 1);  in gpio_nand_probe()
283 	if (nand_scan(&gpiomtd->mtd_info, 1)) {  in gpio_nand_probe()
288 	if (gpiomtd->plat.adjust_parts)  in gpio_nand_probe()
289 		gpiomtd->plat.adjust_parts(&gpiomtd->plat,  in gpio_nand_probe()
290 					   gpiomtd->mtd_info.size);  in gpio_nand_probe()
293 	ret = mtd_device_parse_register(&gpiomtd->mtd_info, NULL, &ppdata,  in gpio_nand_probe()
294 					gpiomtd->plat.parts,  in gpio_nand_probe()
295 					gpiomtd->plat.num_parts);  in gpio_nand_probe()
300 	if (gpio_is_valid(gpiomtd->plat.gpio_nwp))  in gpio_nand_probe()
301 		gpio_set_value(gpiomtd->plat.gpio_nwp, 0);  in gpio_nand_probe()