83 	struct jz_nand *nand = mtd_to_jz_nand(mtd);  in jz_nand_select_chip()  local
88 	ctrl = readl(nand->base + JZ_REG_NAND_CTRL);  in jz_nand_select_chip()
94 		banknr = nand->banks[chipnr] - 1;  in jz_nand_select_chip()
95 		chip->IO_ADDR_R = nand->bank_base[banknr];  in jz_nand_select_chip()
96 		chip->IO_ADDR_W = nand->bank_base[banknr];  in jz_nand_select_chip()
98 	writel(ctrl, nand->base + JZ_REG_NAND_CTRL);  in jz_nand_select_chip()
100 	nand->selected_bank = banknr;  in jz_nand_select_chip()
105 	struct jz_nand *nand = mtd_to_jz_nand(mtd);  in jz_nand_cmd_ctrl()  local
108 	void __iomem *bank_base = nand->bank_base[nand->selected_bank];  in jz_nand_cmd_ctrl()
110 	BUG_ON(nand->selected_bank < 0);  in jz_nand_cmd_ctrl()
120 		reg = readl(nand->base + JZ_REG_NAND_CTRL);  in jz_nand_cmd_ctrl()
122 			reg |= JZ_NAND_CTRL_ASSERT_CHIP(nand->selected_bank);  in jz_nand_cmd_ctrl()
124 			reg &= ~JZ_NAND_CTRL_ASSERT_CHIP(nand->selected_bank);  in jz_nand_cmd_ctrl()
125 		writel(reg, nand->base + JZ_REG_NAND_CTRL);  in jz_nand_cmd_ctrl()
133 	struct jz_nand *nand = mtd_to_jz_nand(mtd);  in jz_nand_dev_ready()  local
134 	return gpio_get_value_cansleep(nand->pdata->busy_gpio);  in jz_nand_dev_ready()
139 	struct jz_nand *nand = mtd_to_jz_nand(mtd);  in jz_nand_hwctl()  local
142 	writel(0, nand->base + JZ_REG_NAND_IRQ_STAT);  in jz_nand_hwctl()
143 	reg = readl(nand->base + JZ_REG_NAND_ECC_CTRL);  in jz_nand_hwctl()
152 		nand->is_reading = true;  in jz_nand_hwctl()
156 		nand->is_reading = false;  in jz_nand_hwctl()
162 	writel(reg, nand->base + JZ_REG_NAND_ECC_CTRL);  in jz_nand_hwctl()
168 	struct jz_nand *nand = mtd_to_jz_nand(mtd);  in jz_nand_calculate_ecc_rs()  local
175 	if (nand->is_reading)  in jz_nand_calculate_ecc_rs()
179 		status = readl(nand->base + JZ_REG_NAND_IRQ_STAT);  in jz_nand_calculate_ecc_rs()
185 	reg = readl(nand->base + JZ_REG_NAND_ECC_CTRL);  in jz_nand_calculate_ecc_rs()
187 	writel(reg, nand->base + JZ_REG_NAND_ECC_CTRL);  in jz_nand_calculate_ecc_rs()
190 		ecc_code[i] = readb(nand->base + JZ_REG_NAND_PAR0 + i);  in jz_nand_calculate_ecc_rs()
221 	struct jz_nand *nand = mtd_to_jz_nand(mtd);  in jz_nand_correct_ecc_rs()  local
234 		t &= dat[nand->chip.ecc.size / 2];  in jz_nand_correct_ecc_rs()
235 		t &= dat[nand->chip.ecc.size - 1];  in jz_nand_correct_ecc_rs()
238 			for (i = 1; i < nand->chip.ecc.size - 1; ++i)  in jz_nand_correct_ecc_rs()
246 		writeb(read_ecc[i], nand->base + JZ_REG_NAND_PAR0 + i);  in jz_nand_correct_ecc_rs()
248 	reg = readl(nand->base + JZ_REG_NAND_ECC_CTRL);  in jz_nand_correct_ecc_rs()
250 	writel(reg, nand->base + JZ_REG_NAND_ECC_CTRL);  in jz_nand_correct_ecc_rs()
253 		status = readl(nand->base + JZ_REG_NAND_IRQ_STAT);  in jz_nand_correct_ecc_rs()
259 	reg = readl(nand->base + JZ_REG_NAND_ECC_CTRL);  in jz_nand_correct_ecc_rs()
261 	writel(reg, nand->base + JZ_REG_NAND_ECC_CTRL);  in jz_nand_correct_ecc_rs()
270 			error = readl(nand->base + JZ_REG_NAND_ERR(i));  in jz_nand_correct_ecc_rs()
327 			       struct jz_nand *nand, unsigned char bank,  in jz_nand_detect_bank()  argument
336 	struct mtd_info *mtd = &nand->mtd;  in jz_nand_detect_bank()
337 	struct nand_chip *chip = &nand->chip;  in jz_nand_detect_bank()
353 					&nand->bank_mem[bank - 1],  in jz_nand_detect_bank()
354 					&nand->bank_base[bank - 1]);  in jz_nand_detect_bank()
360 	ctrl = readl(nand->base + JZ_REG_NAND_CTRL);  in jz_nand_detect_bank()
362 	writel(ctrl, nand->base + JZ_REG_NAND_CTRL);  in jz_nand_detect_bank()
398 	writel(ctrl, nand->base + JZ_REG_NAND_CTRL);  in jz_nand_detect_bank()
400 	jz_nand_iounmap_resource(nand->bank_mem[bank - 1],  in jz_nand_detect_bank()
401 				 nand->bank_base[bank - 1]);  in jz_nand_detect_bank()
411 	struct jz_nand *nand;  in jz_nand_probe()  local
418 	nand = kzalloc(sizeof(*nand), GFP_KERNEL);  in jz_nand_probe()
419 	if (!nand)  in jz_nand_probe()
422 	ret = jz_nand_ioremap_resource(pdev, "mmio", &nand->mem, &nand->base);  in jz_nand_probe()
436 	mtd		= &nand->mtd;  in jz_nand_probe()
437 	chip		= &nand->chip;  in jz_nand_probe()
460 	nand->pdata = pdata;  in jz_nand_probe()
461 	platform_set_drvdata(pdev, nand);  in jz_nand_probe()
490 		nand->banks[chipnr] = bank;  in jz_nand_probe()
491 		if (jz_nand_detect_bank(pdev, nand, bank, chipnr,  in jz_nand_probe()
495 			nand->banks[chipnr] = 0;  in jz_nand_probe()
530 		unsigned char bank = nand->banks[chipnr];  in jz_nand_probe()
532 		jz_nand_iounmap_resource(nand->bank_mem[bank - 1],  in jz_nand_probe()
533 					 nand->bank_base[bank - 1]);  in jz_nand_probe()
535 	writel(0, nand->base + JZ_REG_NAND_CTRL);  in jz_nand_probe()
540 	jz_nand_iounmap_resource(nand->mem, nand->base);  in jz_nand_probe()
542 	kfree(nand);  in jz_nand_probe()
548 	struct jz_nand *nand = platform_get_drvdata(pdev);  in jz_nand_remove()  local
552 	nand_release(&nand->mtd);  in jz_nand_remove()
555 	writel(0, nand->base + JZ_REG_NAND_CTRL);  in jz_nand_remove()
558 		unsigned char bank = nand->banks[i];  in jz_nand_remove()
560 			jz_nand_iounmap_resource(nand->bank_mem[bank - 1],  in jz_nand_remove()
561 						 nand->bank_base[bank - 1]);  in jz_nand_remove()
568 	jz_nand_iounmap_resource(nand->mem, nand->base);  in jz_nand_remove()
570 	kfree(nand);  in jz_nand_remove()