Lines Matching refs:field
184 u8 field, port; in mlx4_QUERY_FUNC_CAP_wrapper() local
243 field = vhcr->in_modifier - in mlx4_QUERY_FUNC_CAP_wrapper()
245 MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_PHYS_PORT_OFFSET); in mlx4_QUERY_FUNC_CAP_wrapper()
251 field = QUERY_FUNC_CAP_FLAGS1_NIC_INFO; in mlx4_QUERY_FUNC_CAP_wrapper()
255 field |= QUERY_FUNC_CAP_VF_ENABLE_QP0; in mlx4_QUERY_FUNC_CAP_wrapper()
259 MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_FLAGS1_OFFSET); in mlx4_QUERY_FUNC_CAP_wrapper()
279 field = (QUERY_FUNC_CAP_FLAG_ETH | QUERY_FUNC_CAP_FLAG_RDMA | in mlx4_QUERY_FUNC_CAP_wrapper()
281 MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_FLAGS_OFFSET); in mlx4_QUERY_FUNC_CAP_wrapper()
283 field = min( in mlx4_QUERY_FUNC_CAP_wrapper()
286 MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_NUM_PORTS_OFFSET); in mlx4_QUERY_FUNC_CAP_wrapper()
291 field = 0; /* protected FMR support not available as yet */ in mlx4_QUERY_FUNC_CAP_wrapper()
292 MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_FMR_OFFSET); in mlx4_QUERY_FUNC_CAP_wrapper()
340 u8 field, op_modifier; in mlx4_QUERY_FUNC_CAP() local
359 MLX4_GET(field, outbox, QUERY_FUNC_CAP_FLAGS_OFFSET); in mlx4_QUERY_FUNC_CAP()
360 if (!(field & (QUERY_FUNC_CAP_FLAG_ETH | QUERY_FUNC_CAP_FLAG_RDMA))) { in mlx4_QUERY_FUNC_CAP()
365 func_cap->flags = field; in mlx4_QUERY_FUNC_CAP()
368 MLX4_GET(field, outbox, QUERY_FUNC_CAP_NUM_PORTS_OFFSET); in mlx4_QUERY_FUNC_CAP()
369 func_cap->num_ports = field; in mlx4_QUERY_FUNC_CAP()
441 MLX4_GET(field, outbox, QUERY_FUNC_CAP_FLAGS0_OFFSET); in mlx4_QUERY_FUNC_CAP()
442 if (field & QUERY_FUNC_CAP_FLAGS0_FORCE_PHY_WQE_GID) { in mlx4_QUERY_FUNC_CAP()
449 MLX4_GET(field, outbox, QUERY_FUNC_CAP_PHYS_PORT_OFFSET); in mlx4_QUERY_FUNC_CAP()
450 func_cap->physical_port = field; in mlx4_QUERY_FUNC_CAP()
496 u8 field; in mlx4_QUERY_DEV_CAP() local
591 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_QP_OFFSET); in mlx4_QUERY_DEV_CAP()
592 dev_cap->reserved_qps = 1 << (field & 0xf); in mlx4_QUERY_DEV_CAP()
593 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_QP_OFFSET); in mlx4_QUERY_DEV_CAP()
594 dev_cap->max_qps = 1 << (field & 0x1f); in mlx4_QUERY_DEV_CAP()
595 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_SRQ_OFFSET); in mlx4_QUERY_DEV_CAP()
596 dev_cap->reserved_srqs = 1 << (field >> 4); in mlx4_QUERY_DEV_CAP()
597 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_SRQ_OFFSET); in mlx4_QUERY_DEV_CAP()
598 dev_cap->max_srqs = 1 << (field & 0x1f); in mlx4_QUERY_DEV_CAP()
599 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_CQ_SZ_OFFSET); in mlx4_QUERY_DEV_CAP()
600 dev_cap->max_cq_sz = 1 << field; in mlx4_QUERY_DEV_CAP()
601 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_CQ_OFFSET); in mlx4_QUERY_DEV_CAP()
602 dev_cap->reserved_cqs = 1 << (field & 0xf); in mlx4_QUERY_DEV_CAP()
603 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_CQ_OFFSET); in mlx4_QUERY_DEV_CAP()
604 dev_cap->max_cqs = 1 << (field & 0x1f); in mlx4_QUERY_DEV_CAP()
605 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_MPT_OFFSET); in mlx4_QUERY_DEV_CAP()
606 dev_cap->max_mpts = 1 << (field & 0x3f); in mlx4_QUERY_DEV_CAP()
607 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_EQ_OFFSET); in mlx4_QUERY_DEV_CAP()
608 dev_cap->reserved_eqs = field & 0xf; in mlx4_QUERY_DEV_CAP()
609 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_EQ_OFFSET); in mlx4_QUERY_DEV_CAP()
610 dev_cap->max_eqs = 1 << (field & 0xf); in mlx4_QUERY_DEV_CAP()
611 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_MTT_OFFSET); in mlx4_QUERY_DEV_CAP()
612 dev_cap->reserved_mtts = 1 << (field >> 4); in mlx4_QUERY_DEV_CAP()
613 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_MRW_SZ_OFFSET); in mlx4_QUERY_DEV_CAP()
614 dev_cap->max_mrw_sz = 1 << field; in mlx4_QUERY_DEV_CAP()
615 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_MRW_OFFSET); in mlx4_QUERY_DEV_CAP()
616 dev_cap->reserved_mrws = 1 << (field & 0xf); in mlx4_QUERY_DEV_CAP()
617 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_MTT_SEG_OFFSET); in mlx4_QUERY_DEV_CAP()
618 dev_cap->max_mtt_seg = 1 << (field & 0x3f); in mlx4_QUERY_DEV_CAP()
619 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_REQ_QP_OFFSET); in mlx4_QUERY_DEV_CAP()
620 dev_cap->max_requester_per_qp = 1 << (field & 0x3f); in mlx4_QUERY_DEV_CAP()
621 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_RES_QP_OFFSET); in mlx4_QUERY_DEV_CAP()
622 dev_cap->max_responder_per_qp = 1 << (field & 0x3f); in mlx4_QUERY_DEV_CAP()
623 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_GSO_OFFSET); in mlx4_QUERY_DEV_CAP()
624 field &= 0x1f; in mlx4_QUERY_DEV_CAP()
625 if (!field) in mlx4_QUERY_DEV_CAP()
628 dev_cap->max_gso_sz = 1 << field; in mlx4_QUERY_DEV_CAP()
630 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSS_OFFSET); in mlx4_QUERY_DEV_CAP()
631 if (field & 0x20) in mlx4_QUERY_DEV_CAP()
633 if (field & 0x10) in mlx4_QUERY_DEV_CAP()
635 field &= 0xf; in mlx4_QUERY_DEV_CAP()
636 if (field) { in mlx4_QUERY_DEV_CAP()
638 dev_cap->max_rss_tbl_sz = 1 << field; in mlx4_QUERY_DEV_CAP()
641 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_RDMA_OFFSET); in mlx4_QUERY_DEV_CAP()
642 dev_cap->max_rdma_global = 1 << (field & 0x3f); in mlx4_QUERY_DEV_CAP()
643 MLX4_GET(field, outbox, QUERY_DEV_CAP_ACK_DELAY_OFFSET); in mlx4_QUERY_DEV_CAP()
644 dev_cap->local_ca_ack_delay = field & 0x1f; in mlx4_QUERY_DEV_CAP()
645 MLX4_GET(field, outbox, QUERY_DEV_CAP_VL_PORT_OFFSET); in mlx4_QUERY_DEV_CAP()
646 dev_cap->num_ports = field & 0xf; in mlx4_QUERY_DEV_CAP()
647 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_MSG_SZ_OFFSET); in mlx4_QUERY_DEV_CAP()
648 dev_cap->max_msg_sz = 1 << (field & 0x1f); in mlx4_QUERY_DEV_CAP()
649 MLX4_GET(field, outbox, QUERY_DEV_CAP_FLOW_STEERING_RANGE_EN_OFFSET); in mlx4_QUERY_DEV_CAP()
650 if (field & 0x80) in mlx4_QUERY_DEV_CAP()
652 dev_cap->fs_log_max_ucast_qp_range_size = field & 0x1f; in mlx4_QUERY_DEV_CAP()
653 MLX4_GET(field, outbox, QUERY_DEV_CAP_FLOW_STEERING_IPOIB_OFFSET); in mlx4_QUERY_DEV_CAP()
654 if (field & 0x80) in mlx4_QUERY_DEV_CAP()
656 MLX4_GET(field, outbox, QUERY_DEV_CAP_FLOW_STEERING_MAX_QP_OFFSET); in mlx4_QUERY_DEV_CAP()
657 dev_cap->fs_max_num_qp_per_entry = field; in mlx4_QUERY_DEV_CAP()
660 MLX4_GET(field, outbox, QUERY_DEV_CAP_CQ_TS_SUPPORT_OFFSET); in mlx4_QUERY_DEV_CAP()
661 if (field & 0x80) in mlx4_QUERY_DEV_CAP()
666 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_UAR_OFFSET); in mlx4_QUERY_DEV_CAP()
667 dev_cap->reserved_uars = field >> 4; in mlx4_QUERY_DEV_CAP()
668 MLX4_GET(field, outbox, QUERY_DEV_CAP_UAR_SZ_OFFSET); in mlx4_QUERY_DEV_CAP()
669 dev_cap->uar_size = 1 << ((field & 0x3f) + 20); in mlx4_QUERY_DEV_CAP()
670 MLX4_GET(field, outbox, QUERY_DEV_CAP_PAGE_SZ_OFFSET); in mlx4_QUERY_DEV_CAP()
671 dev_cap->min_page_sz = 1 << field; in mlx4_QUERY_DEV_CAP()
673 MLX4_GET(field, outbox, QUERY_DEV_CAP_BF_OFFSET); in mlx4_QUERY_DEV_CAP()
674 if (field & 0x80) { in mlx4_QUERY_DEV_CAP()
675 MLX4_GET(field, outbox, QUERY_DEV_CAP_LOG_BF_REG_SZ_OFFSET); in mlx4_QUERY_DEV_CAP()
676 dev_cap->bf_reg_size = 1 << (field & 0x1f); in mlx4_QUERY_DEV_CAP()
677 MLX4_GET(field, outbox, QUERY_DEV_CAP_LOG_MAX_BF_REGS_PER_PAGE_OFFSET); in mlx4_QUERY_DEV_CAP()
678 if ((1 << (field & 0x3f)) > (PAGE_SIZE / dev_cap->bf_reg_size)) in mlx4_QUERY_DEV_CAP()
679 field = 3; in mlx4_QUERY_DEV_CAP()
680 dev_cap->bf_regs_per_page = 1 << (field & 0x3f); in mlx4_QUERY_DEV_CAP()
688 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_SG_SQ_OFFSET); in mlx4_QUERY_DEV_CAP()
689 dev_cap->max_sq_sg = field; in mlx4_QUERY_DEV_CAP()
693 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_QP_MCG_OFFSET); in mlx4_QUERY_DEV_CAP()
694 dev_cap->max_qp_per_mcg = 1 << field; in mlx4_QUERY_DEV_CAP()
695 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_MCG_OFFSET); in mlx4_QUERY_DEV_CAP()
696 dev_cap->reserved_mgms = field & 0xf; in mlx4_QUERY_DEV_CAP()
697 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_MCG_OFFSET); in mlx4_QUERY_DEV_CAP()
698 dev_cap->max_mcgs = 1 << field; in mlx4_QUERY_DEV_CAP()
699 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_PD_OFFSET); in mlx4_QUERY_DEV_CAP()
700 dev_cap->reserved_pds = field >> 4; in mlx4_QUERY_DEV_CAP()
701 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_PD_OFFSET); in mlx4_QUERY_DEV_CAP()
702 dev_cap->max_pds = 1 << (field & 0x3f); in mlx4_QUERY_DEV_CAP()
703 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_XRC_OFFSET); in mlx4_QUERY_DEV_CAP()
704 dev_cap->reserved_xrcds = field >> 4; in mlx4_QUERY_DEV_CAP()
705 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_XRC_OFFSET); in mlx4_QUERY_DEV_CAP()
706 dev_cap->max_xrcds = 1 << (field & 0x1f); in mlx4_QUERY_DEV_CAP()
729 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_SRQ_SZ_OFFSET); in mlx4_QUERY_DEV_CAP()
730 dev_cap->max_srq_sz = 1 << field; in mlx4_QUERY_DEV_CAP()
731 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_QP_SZ_OFFSET); in mlx4_QUERY_DEV_CAP()
732 dev_cap->max_qp_sz = 1 << field; in mlx4_QUERY_DEV_CAP()
733 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSZ_SRQ_OFFSET); in mlx4_QUERY_DEV_CAP()
734 dev_cap->resize_srq = field & 1; in mlx4_QUERY_DEV_CAP()
735 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_SG_RQ_OFFSET); in mlx4_QUERY_DEV_CAP()
736 dev_cap->max_rq_sg = field; in mlx4_QUERY_DEV_CAP()
739 MLX4_GET(field, outbox, QUERY_DEV_CAP_CQ_EQ_CACHE_LINE_STRIDE); in mlx4_QUERY_DEV_CAP()
740 if (field & (1 << 6)) in mlx4_QUERY_DEV_CAP()
742 if (field & (1 << 7)) in mlx4_QUERY_DEV_CAP()
749 MLX4_GET(field, outbox, QUERY_DEV_CAP_FW_REASSIGN_MAC); in mlx4_QUERY_DEV_CAP()
750 if (field & 1<<6) in mlx4_QUERY_DEV_CAP()
752 MLX4_GET(field, outbox, QUERY_DEV_CAP_VXLAN); in mlx4_QUERY_DEV_CAP()
753 if (field & 1<<3) in mlx4_QUERY_DEV_CAP()
776 MLX4_GET(field, outbox, QUERY_DEV_CAP_VL_PORT_OFFSET); in mlx4_QUERY_DEV_CAP()
777 dev_cap->max_vl[i] = field >> 4; in mlx4_QUERY_DEV_CAP()
778 MLX4_GET(field, outbox, QUERY_DEV_CAP_MTU_WIDTH_OFFSET); in mlx4_QUERY_DEV_CAP()
779 dev_cap->ib_mtu[i] = field >> 4; in mlx4_QUERY_DEV_CAP()
780 dev_cap->max_port_width[i] = field & 0xf; in mlx4_QUERY_DEV_CAP()
781 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_GID_OFFSET); in mlx4_QUERY_DEV_CAP()
782 dev_cap->max_gids[i] = 1 << (field & 0xf); in mlx4_QUERY_DEV_CAP()
783 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_PKEY_OFFSET); in mlx4_QUERY_DEV_CAP()
784 dev_cap->max_pkeys[i] = 1 << (field & 0xf); in mlx4_QUERY_DEV_CAP()
805 MLX4_GET(field, outbox, QUERY_PORT_SUPPORTED_TYPE_OFFSET); in mlx4_QUERY_DEV_CAP()
806 dev_cap->supported_port_types[i] = field & 3; in mlx4_QUERY_DEV_CAP()
807 dev_cap->suggested_type[i] = (field >> 3) & 1; in mlx4_QUERY_DEV_CAP()
808 dev_cap->default_sense[i] = (field >> 4) & 1; in mlx4_QUERY_DEV_CAP()
809 MLX4_GET(field, outbox, QUERY_PORT_MTU_OFFSET); in mlx4_QUERY_DEV_CAP()
810 dev_cap->ib_mtu[i] = field & 0xf; in mlx4_QUERY_DEV_CAP()
811 MLX4_GET(field, outbox, QUERY_PORT_WIDTH_OFFSET); in mlx4_QUERY_DEV_CAP()
812 dev_cap->max_port_width[i] = field & 0xf; in mlx4_QUERY_DEV_CAP()
813 MLX4_GET(field, outbox, QUERY_PORT_MAX_GID_PKEY_OFFSET); in mlx4_QUERY_DEV_CAP()
814 dev_cap->max_gids[i] = 1 << (field >> 4); in mlx4_QUERY_DEV_CAP()
815 dev_cap->max_pkeys[i] = 1 << (field & 0xf); in mlx4_QUERY_DEV_CAP()
816 MLX4_GET(field, outbox, QUERY_PORT_MAX_VL_OFFSET); in mlx4_QUERY_DEV_CAP()
817 dev_cap->max_vl[i] = field & 0xf; in mlx4_QUERY_DEV_CAP()
818 MLX4_GET(field, outbox, QUERY_PORT_MAX_MACVLAN_OFFSET); in mlx4_QUERY_DEV_CAP()
819 dev_cap->log_max_macs[i] = field & 0xf; in mlx4_QUERY_DEV_CAP()
820 dev_cap->log_max_vlans[i] = field >> 4; in mlx4_QUERY_DEV_CAP()
887 u8 field; in mlx4_QUERY_DEV_CAP_wrapper() local
920 MLX4_GET(field, outbox->buf, QUERY_DEV_CAP_VL_PORT_OFFSET); in mlx4_QUERY_DEV_CAP_wrapper()
921 field &= ~0x0F; in mlx4_QUERY_DEV_CAP_wrapper()
922 field |= bitmap_weight(actv_ports.ports, dev->caps.num_ports) & 0x0F; in mlx4_QUERY_DEV_CAP_wrapper()
923 MLX4_PUT(outbox->buf, field, QUERY_DEV_CAP_VL_PORT_OFFSET); in mlx4_QUERY_DEV_CAP_wrapper()
926 MLX4_GET(field, outbox->buf, QUERY_DEV_CAP_CQ_TS_SUPPORT_OFFSET); in mlx4_QUERY_DEV_CAP_wrapper()
927 field &= 0x7f; in mlx4_QUERY_DEV_CAP_wrapper()
928 MLX4_PUT(outbox->buf, field, QUERY_DEV_CAP_CQ_TS_SUPPORT_OFFSET); in mlx4_QUERY_DEV_CAP_wrapper()
931 MLX4_GET(field, outbox->buf, QUERY_DEV_CAP_VXLAN); in mlx4_QUERY_DEV_CAP_wrapper()
932 field &= 0xf7; in mlx4_QUERY_DEV_CAP_wrapper()
933 MLX4_PUT(outbox->buf, field, QUERY_DEV_CAP_VXLAN); in mlx4_QUERY_DEV_CAP_wrapper()
936 MLX4_GET(field, outbox->buf, QUERY_DEV_CAP_BF_OFFSET); in mlx4_QUERY_DEV_CAP_wrapper()
937 field &= 0x7f; in mlx4_QUERY_DEV_CAP_wrapper()
938 MLX4_PUT(outbox->buf, field, QUERY_DEV_CAP_BF_OFFSET); in mlx4_QUERY_DEV_CAP_wrapper()
947 MLX4_GET(field, outbox->buf, in mlx4_QUERY_DEV_CAP_wrapper()
949 field &= 0x7f; in mlx4_QUERY_DEV_CAP_wrapper()
950 MLX4_PUT(outbox->buf, field, in mlx4_QUERY_DEV_CAP_wrapper()
955 MLX4_GET(field, outbox->buf, QUERY_DEV_CAP_FLOW_STEERING_IPOIB_OFFSET); in mlx4_QUERY_DEV_CAP_wrapper()
956 field &= ~0x80; in mlx4_QUERY_DEV_CAP_wrapper()
957 MLX4_PUT(outbox->buf, field, QUERY_DEV_CAP_FLOW_STEERING_IPOIB_OFFSET); in mlx4_QUERY_DEV_CAP_wrapper()
1039 u16 field; in mlx4_get_slave_pkey_gid_tbl_len() local
1054 MLX4_GET(field, outbox, QUERY_PORT_CUR_MAX_GID_OFFSET); in mlx4_get_slave_pkey_gid_tbl_len()
1055 *gid_tbl_len = field; in mlx4_get_slave_pkey_gid_tbl_len()
1057 MLX4_GET(field, outbox, QUERY_PORT_CUR_MAX_PKEY_OFFSET); in mlx4_get_slave_pkey_gid_tbl_len()
1058 *pkey_tbl_len = field; in mlx4_get_slave_pkey_gid_tbl_len()
1739 u16 field; in mlx4_INIT_PORT() local
1766 field = 128 << dev->caps.ib_mtu_cap[port]; in mlx4_INIT_PORT()
1767 MLX4_PUT(inbox, field, INIT_PORT_MTU_OFFSET); in mlx4_INIT_PORT()
1768 field = dev->caps.gid_table_len[port]; in mlx4_INIT_PORT()
1769 MLX4_PUT(inbox, field, INIT_PORT_MAX_GID_OFFSET); in mlx4_INIT_PORT()
1770 field = dev->caps.pkey_table_len[port]; in mlx4_INIT_PORT()
1771 MLX4_PUT(inbox, field, INIT_PORT_MAX_PKEY_OFFSET); in mlx4_INIT_PORT()