Lines Matching refs:tr
506 struct tc35815_regs __iomem *tr = in tc_mdio_read() local
510 tc_writel(MD_CA_Busy | (mii_id << 5) | (regnum & 0x1f), &tr->MD_CA); in tc_mdio_read()
512 while (tc_readl(&tr->MD_CA) & MD_CA_Busy) { in tc_mdio_read()
517 return tc_readl(&tr->MD_Data) & 0xffff; in tc_mdio_read()
523 struct tc35815_regs __iomem *tr = in tc_mdio_write() local
527 tc_writel(val, &tr->MD_Data); in tc_mdio_write()
529 &tr->MD_CA); in tc_mdio_write()
531 while (tc_readl(&tr->MD_CA) & MD_CA_Busy) { in tc_mdio_write()
549 struct tc35815_regs __iomem *tr = in tc_handle_link_change() local
553 reg = tc_readl(&tr->MAC_Ctl); in tc_handle_link_change()
555 tc_writel(reg, &tr->MAC_Ctl); in tc_handle_link_change()
560 tc_writel(reg, &tr->MAC_Ctl); in tc_handle_link_change()
562 tc_writel(reg, &tr->MAC_Ctl); in tc_handle_link_change()
575 tc_writel(tc_readl(&tr->Tx_Ctl) | Tx_EnLCarr, in tc_handle_link_change()
576 &tr->Tx_Ctl); in tc_handle_link_change()
750 struct tc35815_regs __iomem *tr = in tc35815_init_dev_addr() local
754 while (tc_readl(&tr->PROM_Ctl) & PROM_Busy) in tc35815_init_dev_addr()
758 tc_writel(PROM_Busy | PROM_Read | (i / 2 + 2), &tr->PROM_Ctl); in tc35815_init_dev_addr()
759 while (tc_readl(&tr->PROM_Ctl) & PROM_Busy) in tc35815_init_dev_addr()
761 data = tc_readl(&tr->PROM_Data); in tc35815_init_dev_addr()
1205 struct tc35815_regs __iomem *tr = in tc35815_schedule_restart() local
1211 tc_writel(0, &tr->Int_En); in tc35815_schedule_restart()
1212 tc_writel(tc_readl(&tr->DMA_Ctl) | DMA_IntMask, &tr->DMA_Ctl); in tc35815_schedule_restart()
1219 struct tc35815_regs __iomem *tr = in tc35815_tx_timeout() local
1223 dev->name, tc_readl(&tr->Tx_Stat)); in tc35815_tx_timeout()
1330 struct tc35815_regs __iomem *tr = in tc35815_send_packet() local
1339 tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr); in tc35815_send_packet()
1450 struct tc35815_regs __iomem *tr = in tc35815_interrupt() local
1452 u32 dmactl = tc_readl(&tr->DMA_Ctl); in tc35815_interrupt()
1456 tc_writel(dmactl | DMA_IntMask, &tr->DMA_Ctl); in tc35815_interrupt()
1464 (void)tc_readl(&tr->Int_Src); /* flush */ in tc35815_interrupt()
1643 struct tc35815_regs __iomem *tr = in tc35815_poll() local
1652 status = tc_readl(&tr->Int_Src); in tc35815_poll()
1656 &tr->Int_Src); /* write to clear */ in tc35815_poll()
1661 &tr->Int_Src); in tc35815_poll()
1667 status = tc_readl(&tr->Int_Src); in tc35815_poll()
1674 tc_writel(tc_readl(&tr->DMA_Ctl) & ~DMA_IntMask, &tr->DMA_Ctl); in tc35815_poll()
1717 struct tc35815_regs __iomem *tr = in tc35815_check_tx_stat() local
1719 tc_writel(TX_THRESHOLD_MAX, &tr->TxThrsh); in tc35815_check_tx_stat()
1802 struct tc35815_regs __iomem *tr = in tc35815_txdone() local
1828 tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr); in tc35815_txdone()
1870 struct tc35815_regs __iomem *tr = in tc35815_get_stats() local
1874 dev->stats.rx_missed_errors += tc_readl(&tr->Miss_Cnt); in tc35815_get_stats()
1882 struct tc35815_regs __iomem *tr = in tc35815_set_cam_entry() local
1888 saved_addr = tc_readl(&tr->CAM_Adr); in tc35815_set_cam_entry()
1895 tc_writel(cam_index - 2, &tr->CAM_Adr); in tc35815_set_cam_entry()
1896 cam_data = tc_readl(&tr->CAM_Data) & 0xffff0000; in tc35815_set_cam_entry()
1898 tc_writel(cam_data, &tr->CAM_Data); in tc35815_set_cam_entry()
1900 tc_writel(cam_index + 2, &tr->CAM_Adr); in tc35815_set_cam_entry()
1902 tc_writel(cam_data, &tr->CAM_Data); in tc35815_set_cam_entry()
1905 tc_writel(cam_index, &tr->CAM_Adr); in tc35815_set_cam_entry()
1907 tc_writel(cam_data, &tr->CAM_Data); in tc35815_set_cam_entry()
1909 tc_writel(cam_index + 4, &tr->CAM_Adr); in tc35815_set_cam_entry()
1910 cam_data = tc_readl(&tr->CAM_Data) & 0x0000ffff; in tc35815_set_cam_entry()
1912 tc_writel(cam_data, &tr->CAM_Data); in tc35815_set_cam_entry()
1915 tc_writel(saved_addr, &tr->CAM_Adr); in tc35815_set_cam_entry()
1929 struct tc35815_regs __iomem *tr = in tc35815_set_multicast_list() local
1940 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc | CAM_StationAcc, &tr->CAM_Ctl); in tc35815_set_multicast_list()
1945 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc, &tr->CAM_Ctl); in tc35815_set_multicast_list()
1951 tc_writel(0, &tr->CAM_Ctl); in tc35815_set_multicast_list()
1960 tc_writel(ena_bits, &tr->CAM_Ena); in tc35815_set_multicast_list()
1961 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl); in tc35815_set_multicast_list()
1963 tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena); in tc35815_set_multicast_list()
1964 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl); in tc35815_set_multicast_list()
2067 struct tc35815_regs __iomem *tr = in tc35815_chip_reset() local
2071 tc_writel(MAC_Reset, &tr->MAC_Ctl); in tc35815_chip_reset()
2074 while (tc_readl(&tr->MAC_Ctl) & MAC_Reset) { in tc35815_chip_reset()
2081 tc_writel(0, &tr->MAC_Ctl); in tc35815_chip_reset()
2084 tc_writel(0, &tr->DMA_Ctl); in tc35815_chip_reset()
2085 tc_writel(0, &tr->TxThrsh); in tc35815_chip_reset()
2086 tc_writel(0, &tr->TxPollCtr); in tc35815_chip_reset()
2087 tc_writel(0, &tr->RxFragSize); in tc35815_chip_reset()
2088 tc_writel(0, &tr->Int_En); in tc35815_chip_reset()
2089 tc_writel(0, &tr->FDA_Bas); in tc35815_chip_reset()
2090 tc_writel(0, &tr->FDA_Lim); in tc35815_chip_reset()
2091 tc_writel(0xffffffff, &tr->Int_Src); /* Write 1 to clear */ in tc35815_chip_reset()
2092 tc_writel(0, &tr->CAM_Ctl); in tc35815_chip_reset()
2093 tc_writel(0, &tr->Tx_Ctl); in tc35815_chip_reset()
2094 tc_writel(0, &tr->Rx_Ctl); in tc35815_chip_reset()
2095 tc_writel(0, &tr->CAM_Ena); in tc35815_chip_reset()
2096 (void)tc_readl(&tr->Miss_Cnt); /* Read to clear */ in tc35815_chip_reset()
2099 tc_writel(DMA_TestMode, &tr->DMA_Ctl); in tc35815_chip_reset()
2101 tc_writel(i, &tr->CAM_Adr); in tc35815_chip_reset()
2102 tc_writel(0, &tr->CAM_Data); in tc35815_chip_reset()
2104 tc_writel(0, &tr->DMA_Ctl); in tc35815_chip_reset()
2110 struct tc35815_regs __iomem *tr = in tc35815_chip_init() local
2118 tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena); in tc35815_chip_init()
2119 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl); in tc35815_chip_init()
2123 tc_writel(DMA_BURST_SIZE | DMA_RxAlign_2, &tr->DMA_Ctl); in tc35815_chip_init()
2125 tc_writel(DMA_BURST_SIZE, &tr->DMA_Ctl); in tc35815_chip_init()
2126 tc_writel(0, &tr->TxPollCtr); /* Batch mode */ in tc35815_chip_init()
2127 tc_writel(TX_THRESHOLD, &tr->TxThrsh); in tc35815_chip_init()
2128 tc_writel(INT_EN_CMD, &tr->Int_En); in tc35815_chip_init()
2131 tc_writel(fd_virt_to_bus(lp, lp->rfd_base), &tr->FDA_Bas); in tc35815_chip_init()
2133 &tr->FDA_Lim); in tc35815_chip_init()
2139 tc_writel(fd_virt_to_bus(lp, lp->fbl_ptr), &tr->BLFrmPtr); /* start DMA receiver */ in tc35815_chip_init()
2140 tc_writel(RX_CTL_CMD, &tr->Rx_Ctl); /* start MAC receiver */ in tc35815_chip_init()
2149 tc_writel(txctl, &tr->Tx_Ctl); in tc35815_chip_init()