629 	u32 read_buf;  in smsc95xx_set_features()  local
632 	ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);  in smsc95xx_set_features()
637 		read_buf |= Tx_COE_EN_;  in smsc95xx_set_features()
639 		read_buf &= ~Tx_COE_EN_;  in smsc95xx_set_features()
642 		read_buf |= Rx_COE_EN_;  in smsc95xx_set_features()
644 		read_buf &= ~Rx_COE_EN_;  in smsc95xx_set_features()
646 	ret = smsc95xx_write_reg(dev, COE_CR, read_buf);  in smsc95xx_set_features()
650 	netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf);  in smsc95xx_set_features()
878 	u32 read_buf, write_buf, burst_cap;  in smsc95xx_reset()  local
890 		ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);  in smsc95xx_reset()
894 	} while ((read_buf & HW_CFG_LRST_) && (timeout < 100));  in smsc95xx_reset()
908 		ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);  in smsc95xx_reset()
912 	} while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));  in smsc95xx_reset()
926 	ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);  in smsc95xx_reset()
931 		  read_buf);  in smsc95xx_reset()
933 	read_buf |= HW_CFG_BIR_;  in smsc95xx_reset()
935 	ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);  in smsc95xx_reset()
939 	ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);  in smsc95xx_reset()
945 		  read_buf);  in smsc95xx_reset()
965 	ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);  in smsc95xx_reset()
971 		  read_buf);  in smsc95xx_reset()
977 	ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);  in smsc95xx_reset()
983 		  read_buf);  in smsc95xx_reset()
985 	ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);  in smsc95xx_reset()
990 		  read_buf);  in smsc95xx_reset()
993 		read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);  in smsc95xx_reset()
995 	read_buf &= ~HW_CFG_RXDOFF_;  in smsc95xx_reset()
998 	read_buf |= NET_IP_ALIGN << 9;  in smsc95xx_reset()
1000 	ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);  in smsc95xx_reset()
1004 	ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);  in smsc95xx_reset()
1009 		  "Read Value from HW_CFG after writing: 0x%08x\n", read_buf);  in smsc95xx_reset()
1015 	ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);  in smsc95xx_reset()
1018 	netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf);  in smsc95xx_reset()
1062 	ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);  in smsc95xx_reset()
1067 	read_buf |= INT_EP_CTL_PHY_INT_;  in smsc95xx_reset()
1069 	ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);  in smsc95xx_reset()