Lines Matching refs:ah
38 static void ar9003_hw_setup_calibration(struct ath_hw *ah, in ar9003_hw_setup_calibration() argument
41 struct ath_common *common = ath9k_hw_common(ah); in ar9003_hw_setup_calibration()
50 REG_RMW_FIELD(ah, AR_PHY_TIMING4, in ar9003_hw_setup_calibration()
53 REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ); in ar9003_hw_setup_calibration()
59 REG_SET_BIT(ah, AR_PHY_TIMING4, AR_PHY_TIMING4_DO_CAL); in ar9003_hw_setup_calibration()
72 static bool ar9003_hw_per_calibration(struct ath_hw *ah, in ar9003_hw_per_calibration() argument
77 struct ath9k_hw_cal_data *caldata = ah->caldata; in ar9003_hw_per_calibration()
84 if (!(REG_READ(ah, AR_PHY_TIMING4) & AR_PHY_TIMING4_DO_CAL)) { in ar9003_hw_per_calibration()
88 currCal->calData->calCollect(ah); in ar9003_hw_per_calibration()
89 ah->cal_samples++; in ar9003_hw_per_calibration()
91 if (ah->cal_samples >= in ar9003_hw_per_calibration()
102 currCal->calData->calPostProc(ah, numChains); in ar9003_hw_per_calibration()
113 ar9003_hw_setup_calibration(ah, currCal); in ar9003_hw_per_calibration()
118 ath9k_hw_reset_calibration(ah, currCal); in ar9003_hw_per_calibration()
124 static bool ar9003_hw_calibrate(struct ath_hw *ah, in ar9003_hw_calibrate() argument
130 struct ath9k_cal_list *currCal = ah->cal_list_curr; in ar9003_hw_calibrate()
144 iscaldone = ar9003_hw_per_calibration(ah, chan, in ar9003_hw_calibrate()
147 ah->cal_list_curr = currCal = currCal->calNext; in ar9003_hw_calibrate()
151 ath9k_hw_reset_calibration(ah, currCal); in ar9003_hw_calibrate()
160 if (longcal && ath9k_hw_getnf(ah, chan)) { in ar9003_hw_calibrate()
166 ath9k_hw_loadnf(ah, ah->curchan); in ar9003_hw_calibrate()
169 ath9k_hw_start_nfcal(ah, false); in ar9003_hw_calibrate()
175 static void ar9003_hw_iqcal_collect(struct ath_hw *ah) in ar9003_hw_iqcal_collect() argument
181 if (ah->txchainmask & BIT(i)) { in ar9003_hw_iqcal_collect()
182 ah->totalPowerMeasI[i] += in ar9003_hw_iqcal_collect()
183 REG_READ(ah, AR_PHY_CAL_MEAS_0(i)); in ar9003_hw_iqcal_collect()
184 ah->totalPowerMeasQ[i] += in ar9003_hw_iqcal_collect()
185 REG_READ(ah, AR_PHY_CAL_MEAS_1(i)); in ar9003_hw_iqcal_collect()
186 ah->totalIqCorrMeas[i] += in ar9003_hw_iqcal_collect()
187 (int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_2(i)); in ar9003_hw_iqcal_collect()
188 ath_dbg(ath9k_hw_common(ah), CALIBRATE, in ar9003_hw_iqcal_collect()
190 ah->cal_samples, i, ah->totalPowerMeasI[i], in ar9003_hw_iqcal_collect()
191 ah->totalPowerMeasQ[i], in ar9003_hw_iqcal_collect()
192 ah->totalIqCorrMeas[i]); in ar9003_hw_iqcal_collect()
197 static void ar9003_hw_iqcalibrate(struct ath_hw *ah, u8 numChains) in ar9003_hw_iqcalibrate() argument
199 struct ath_common *common = ath9k_hw_common(ah); in ar9003_hw_iqcalibrate()
211 powerMeasI = ah->totalPowerMeasI[i]; in ar9003_hw_iqcalibrate()
212 powerMeasQ = ah->totalPowerMeasQ[i]; in ar9003_hw_iqcalibrate()
213 iqCorrMeas = ah->totalIqCorrMeas[i]; in ar9003_hw_iqcalibrate()
220 i, ah->totalIqCorrMeas[i]); in ar9003_hw_iqcalibrate()
271 REG_READ(ah, offset_array[i])); in ar9003_hw_iqcalibrate()
273 if (AR_SREV_9565(ah) && in ar9003_hw_iqcalibrate()
278 REG_RMW_FIELD(ah, offset_array[i], in ar9003_hw_iqcalibrate()
281 REG_RMW_FIELD(ah, offset_array[i], in ar9003_hw_iqcalibrate()
288 REG_READ(ah, offset_array[i])); in ar9003_hw_iqcalibrate()
293 REG_READ(ah, offset_array[i])); in ar9003_hw_iqcalibrate()
300 REG_SET_BIT(ah, AR_PHY_RX_IQCAL_CORR_B0, in ar9003_hw_iqcalibrate()
306 REG_READ(ah, AR_PHY_RX_IQCAL_CORR_B0)); in ar9003_hw_iqcalibrate()
317 static void ar9003_hw_init_cal_settings(struct ath_hw *ah) in ar9003_hw_init_cal_settings() argument
319 ah->iq_caldata.calData = &iq_cal_single_sample; in ar9003_hw_init_cal_settings()
321 if (AR_SREV_9300_20_OR_LATER(ah)) { in ar9003_hw_init_cal_settings()
322 ah->enabled_cals |= TX_IQ_CAL; in ar9003_hw_init_cal_settings()
323 if (AR_SREV_9485_OR_LATER(ah) && !AR_SREV_9340(ah)) in ar9003_hw_init_cal_settings()
324 ah->enabled_cals |= TX_IQ_ON_AGC_CAL; in ar9003_hw_init_cal_settings()
327 ah->supp_cals = IQ_MISMATCH_CAL; in ar9003_hw_init_cal_settings()
333 static bool ar9003_hw_dynamic_osdac_selection(struct ath_hw *ah, in ar9003_hw_dynamic_osdac_selection() argument
336 struct ath_common *common = ath9k_hw_common(ah); in ar9003_hw_dynamic_osdac_selection()
349 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, in ar9003_hw_dynamic_osdac_selection()
351 REG_CLR_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0, in ar9003_hw_dynamic_osdac_selection()
353 REG_WRITE(ah, AR_PHY_AGC_CONTROL, in ar9003_hw_dynamic_osdac_selection()
354 REG_READ(ah, AR_PHY_AGC_CONTROL) | AR_PHY_AGC_CONTROL_CAL); in ar9003_hw_dynamic_osdac_selection()
356 status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, in ar9003_hw_dynamic_osdac_selection()
370 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, in ar9003_hw_dynamic_osdac_selection()
372 REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, in ar9003_hw_dynamic_osdac_selection()
374 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, in ar9003_hw_dynamic_osdac_selection()
376 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, in ar9003_hw_dynamic_osdac_selection()
384 osdac_ch0 = (REG_READ(ah, AR_PHY_65NM_CH0_BB1) >> 30) & 0x3; in ar9003_hw_dynamic_osdac_selection()
385 osdac_ch1 = (REG_READ(ah, AR_PHY_65NM_CH1_BB1) >> 30) & 0x3; in ar9003_hw_dynamic_osdac_selection()
386 osdac_ch2 = (REG_READ(ah, AR_PHY_65NM_CH2_BB1) >> 30) & 0x3; in ar9003_hw_dynamic_osdac_selection()
388 REG_SET_BIT(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN); in ar9003_hw_dynamic_osdac_selection()
390 REG_WRITE(ah, AR_PHY_AGC_CONTROL, in ar9003_hw_dynamic_osdac_selection()
391 REG_READ(ah, AR_PHY_AGC_CONTROL) | AR_PHY_AGC_CONTROL_CAL); in ar9003_hw_dynamic_osdac_selection()
393 status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, in ar9003_hw_dynamic_osdac_selection()
402 REG_CLR_BIT(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN); in ar9003_hw_dynamic_osdac_selection()
407 REG_WRITE(ah, AR_PHY_65NM_CH0_BB3, in ar9003_hw_dynamic_osdac_selection()
408 ((REG_READ(ah, AR_PHY_65NM_CH0_BB3) & 0xfffffcff) | (1 << 8))); in ar9003_hw_dynamic_osdac_selection()
409 REG_WRITE(ah, AR_PHY_65NM_CH1_BB3, in ar9003_hw_dynamic_osdac_selection()
410 ((REG_READ(ah, AR_PHY_65NM_CH1_BB3) & 0xfffffcff) | (1 << 8))); in ar9003_hw_dynamic_osdac_selection()
411 REG_WRITE(ah, AR_PHY_65NM_CH2_BB3, in ar9003_hw_dynamic_osdac_selection()
412 ((REG_READ(ah, AR_PHY_65NM_CH2_BB3) & 0xfffffcff) | (1 << 8))); in ar9003_hw_dynamic_osdac_selection()
414 temp = REG_READ(ah, AR_PHY_65NM_CH0_BB3); in ar9003_hw_dynamic_osdac_selection()
418 temp = REG_READ(ah, AR_PHY_65NM_CH1_BB3); in ar9003_hw_dynamic_osdac_selection()
422 temp = REG_READ(ah, AR_PHY_65NM_CH2_BB3); in ar9003_hw_dynamic_osdac_selection()
429 REG_WRITE(ah, AR_PHY_65NM_CH0_BB3, in ar9003_hw_dynamic_osdac_selection()
430 ((REG_READ(ah, AR_PHY_65NM_CH0_BB3) & 0xfffffcff) | (2 << 8))); in ar9003_hw_dynamic_osdac_selection()
431 REG_WRITE(ah, AR_PHY_65NM_CH1_BB3, in ar9003_hw_dynamic_osdac_selection()
432 ((REG_READ(ah, AR_PHY_65NM_CH1_BB3) & 0xfffffcff) | (2 << 8))); in ar9003_hw_dynamic_osdac_selection()
433 REG_WRITE(ah, AR_PHY_65NM_CH2_BB3, in ar9003_hw_dynamic_osdac_selection()
434 ((REG_READ(ah, AR_PHY_65NM_CH2_BB3) & 0xfffffcff) | (2 << 8))); in ar9003_hw_dynamic_osdac_selection()
436 temp = REG_READ(ah, AR_PHY_65NM_CH0_BB3); in ar9003_hw_dynamic_osdac_selection()
440 temp = REG_READ(ah, AR_PHY_65NM_CH1_BB3); in ar9003_hw_dynamic_osdac_selection()
444 temp = REG_READ(ah, AR_PHY_65NM_CH2_BB3); in ar9003_hw_dynamic_osdac_selection()
451 REG_WRITE(ah, AR_PHY_65NM_CH0_BB3, in ar9003_hw_dynamic_osdac_selection()
452 ((REG_READ(ah, AR_PHY_65NM_CH0_BB3) & 0xfffffcff) | (3 << 8))); in ar9003_hw_dynamic_osdac_selection()
453 REG_WRITE(ah, AR_PHY_65NM_CH1_BB3, in ar9003_hw_dynamic_osdac_selection()
454 ((REG_READ(ah, AR_PHY_65NM_CH1_BB3) & 0xfffffcff) | (3 << 8))); in ar9003_hw_dynamic_osdac_selection()
455 REG_WRITE(ah, AR_PHY_65NM_CH2_BB3, in ar9003_hw_dynamic_osdac_selection()
456 ((REG_READ(ah, AR_PHY_65NM_CH2_BB3) & 0xfffffcff) | (3 << 8))); in ar9003_hw_dynamic_osdac_selection()
458 temp = REG_READ(ah, AR_PHY_65NM_CH0_BB3); in ar9003_hw_dynamic_osdac_selection()
462 temp = REG_READ(ah, AR_PHY_65NM_CH1_BB3); in ar9003_hw_dynamic_osdac_selection()
466 temp = REG_READ(ah, AR_PHY_65NM_CH2_BB3); in ar9003_hw_dynamic_osdac_selection()
481 val = REG_READ(ah, AR_PHY_65NM_CH0_BB1) & 0x3fffffff; in ar9003_hw_dynamic_osdac_selection()
483 REG_WRITE(ah, AR_PHY_65NM_CH0_BB1, val); in ar9003_hw_dynamic_osdac_selection()
502 val = REG_READ(ah, AR_PHY_65NM_CH1_BB1) & 0x3fffffff; in ar9003_hw_dynamic_osdac_selection()
504 REG_WRITE(ah, AR_PHY_65NM_CH1_BB1, val); in ar9003_hw_dynamic_osdac_selection()
523 val = REG_READ(ah, AR_PHY_65NM_CH2_BB1) & 0x3fffffff; in ar9003_hw_dynamic_osdac_selection()
525 REG_WRITE(ah, AR_PHY_65NM_CH2_BB1, val); in ar9003_hw_dynamic_osdac_selection()
534 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, in ar9003_hw_dynamic_osdac_selection()
536 REG_SET_BIT(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN); in ar9003_hw_dynamic_osdac_selection()
542 REG_SET_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0, in ar9003_hw_dynamic_osdac_selection()
551 static bool ar9003_hw_solve_iq_cal(struct ath_hw *ah, in ar9003_hw_solve_iq_cal() argument
567 struct ath_common *common = ath9k_hw_common(ah); in ar9003_hw_solve_iq_cal()
599 static s32 ar9003_hw_find_mag_approx(struct ath_hw *ah, s32 in_re, s32 in_im) in ar9003_hw_find_mag_approx() argument
618 static bool ar9003_hw_calc_iq_corr(struct ath_hw *ah, in ar9003_hw_calc_iq_corr() argument
637 struct ath_common *common = ath9k_hw_common(ah); in ar9003_hw_calc_iq_corr()
739 mag1 = ar9003_hw_find_mag_approx(ah, cos_2phi_1, sin_2phi_1); in ar9003_hw_calc_iq_corr()
740 mag2 = ar9003_hw_find_mag_approx(ah, cos_2phi_2, sin_2phi_2); in ar9003_hw_calc_iq_corr()
755 if (!ar9003_hw_solve_iq_cal(ah, in ar9003_hw_calc_iq_corr()
888 static void ar9003_hw_tx_iq_cal_outlier_detection(struct ath_hw *ah, in ar9003_hw_tx_iq_cal_outlier_detection() argument
895 struct ath9k_hw_cal_data *caldata = ah->caldata; in ar9003_hw_tx_iq_cal_outlier_detection()
901 if (!AR_SREV_9485(ah)) { in ar9003_hw_tx_iq_cal_outlier_detection()
914 if (!(ah->txchainmask & (1 << i))) in ar9003_hw_tx_iq_cal_outlier_detection()
916 nmeasurement = REG_READ_FIELD(ah, in ar9003_hw_tx_iq_cal_outlier_detection()
926 if (!AR_SREV_9550(ah)) { in ar9003_hw_tx_iq_cal_outlier_detection()
949 REG_RMW_FIELD(ah, tx_corr_coeff[im][i], in ar9003_hw_tx_iq_cal_outlier_detection()
953 REG_RMW_FIELD(ah, tx_corr_coeff[im][i], in ar9003_hw_tx_iq_cal_outlier_detection()
965 REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_3, in ar9003_hw_tx_iq_cal_outlier_detection()
967 REG_RMW_FIELD(ah, AR_PHY_RX_IQCAL_CORR_B0, in ar9003_hw_tx_iq_cal_outlier_detection()
980 static bool ar9003_hw_tx_iq_cal_run(struct ath_hw *ah) in ar9003_hw_tx_iq_cal_run() argument
982 struct ath_common *common = ath9k_hw_common(ah); in ar9003_hw_tx_iq_cal_run()
985 tx_gain_forced = REG_READ_FIELD(ah, AR_PHY_TX_FORCED_GAIN, in ar9003_hw_tx_iq_cal_run()
988 REG_RMW_FIELD(ah, AR_PHY_TX_FORCED_GAIN, in ar9003_hw_tx_iq_cal_run()
991 REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_START, in ar9003_hw_tx_iq_cal_run()
994 if (!ath9k_hw_wait(ah, AR_PHY_TX_IQCAL_START, in ar9003_hw_tx_iq_cal_run()
1003 static void __ar955x_tx_iq_cal_sort(struct ath_hw *ah, in __ar955x_tx_iq_cal_sort() argument
1007 struct ath_common *common = ath9k_hw_common(ah); in __ar955x_tx_iq_cal_sort()
1040 static bool ar955x_tx_iq_cal_median(struct ath_hw *ah, in ar955x_tx_iq_cal_median() argument
1051 __ar955x_tx_iq_cal_sort(ah, coeff, i, nmeasurement); in ar955x_tx_iq_cal_median()
1057 static void ar9003_hw_tx_iq_cal_post_proc(struct ath_hw *ah, in ar9003_hw_tx_iq_cal_post_proc() argument
1061 struct ath_common *common = ath9k_hw_common(ah); in ar9003_hw_tx_iq_cal_post_proc()
1079 if (!(ah->txchainmask & (1 << i))) in ar9003_hw_tx_iq_cal_post_proc()
1082 nmeasurement = REG_READ_FIELD(ah, in ar9003_hw_tx_iq_cal_post_proc()
1092 if (REG_READ(ah, txiqcal_status[i]) & in ar9003_hw_tx_iq_cal_post_proc()
1102 REG_RMW_FIELD(ah, in ar9003_hw_tx_iq_cal_post_proc()
1108 iq_res[idx] = REG_READ(ah, in ar9003_hw_tx_iq_cal_post_proc()
1112 REG_RMW_FIELD(ah, in ar9003_hw_tx_iq_cal_post_proc()
1118 iq_res[idx + 1] = 0xffff & REG_READ(ah, in ar9003_hw_tx_iq_cal_post_proc()
1127 if (!ar9003_hw_calc_iq_corr(ah, i, iq_res, in ar9003_hw_tx_iq_cal_post_proc()
1146 if (AR_SREV_9550(ah)) in ar9003_hw_tx_iq_cal_post_proc()
1147 outlier_detect = ar955x_tx_iq_cal_median(ah, &coeff, in ar9003_hw_tx_iq_cal_post_proc()
1150 ar9003_hw_tx_iq_cal_outlier_detection(ah, &coeff, is_reusable); in ar9003_hw_tx_iq_cal_post_proc()
1159 static void ar9003_hw_tx_iq_cal_reload(struct ath_hw *ah) in ar9003_hw_tx_iq_cal_reload() argument
1161 struct ath9k_hw_cal_data *caldata = ah->caldata; in ar9003_hw_tx_iq_cal_reload()
1169 if (!AR_SREV_9485(ah)) { in ar9003_hw_tx_iq_cal_reload()
1181 if (!(ah->txchainmask & (1 << i))) in ar9003_hw_tx_iq_cal_reload()
1186 REG_RMW_FIELD(ah, tx_corr_coeff[im][i], in ar9003_hw_tx_iq_cal_reload()
1190 REG_RMW_FIELD(ah, tx_corr_coeff[im][i], in ar9003_hw_tx_iq_cal_reload()
1196 REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_3, in ar9003_hw_tx_iq_cal_reload()
1198 REG_RMW_FIELD(ah, AR_PHY_RX_IQCAL_CORR_B0, in ar9003_hw_tx_iq_cal_reload()
1202 static void ar9003_hw_manual_peak_cal(struct ath_hw *ah, u8 chain, bool is_2g) in ar9003_hw_manual_peak_cal() argument
1207 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_GAINSTAGES(chain), in ar9003_hw_manual_peak_cal()
1209 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_GAINSTAGES(chain), in ar9003_hw_manual_peak_cal()
1212 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_GAINSTAGES(chain), in ar9003_hw_manual_peak_cal()
1215 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_GAINSTAGES(chain), in ar9003_hw_manual_peak_cal()
1218 REG_RMW_FIELD(ah, AR_PHY_65NM_RXTX2(chain), in ar9003_hw_manual_peak_cal()
1220 REG_RMW_FIELD(ah, AR_PHY_65NM_RXTX2(chain), in ar9003_hw_manual_peak_cal()
1223 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain), in ar9003_hw_manual_peak_cal()
1225 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain), in ar9003_hw_manual_peak_cal()
1227 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain), in ar9003_hw_manual_peak_cal()
1230 if (AR_SREV_9330_11(ah)) { in ar9003_hw_manual_peak_cal()
1231 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain), in ar9003_hw_manual_peak_cal()
1235 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain), in ar9003_hw_manual_peak_cal()
1238 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain), in ar9003_hw_manual_peak_cal()
1247 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain), in ar9003_hw_manual_peak_cal()
1251 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain), in ar9003_hw_manual_peak_cal()
1255 agc_out = REG_READ_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain), in ar9003_hw_manual_peak_cal()
1262 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain), in ar9003_hw_manual_peak_cal()
1265 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain), in ar9003_hw_manual_peak_cal()
1268 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_GAINSTAGES(chain), in ar9003_hw_manual_peak_cal()
1270 REG_RMW_FIELD(ah, AR_PHY_65NM_RXTX2(chain), in ar9003_hw_manual_peak_cal()
1272 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain), in ar9003_hw_manual_peak_cal()
1276 static void ar9003_hw_do_pcoem_manual_peak_cal(struct ath_hw *ah, in ar9003_hw_do_pcoem_manual_peak_cal() argument
1280 struct ath9k_hw_cal_data *caldata = ah->caldata; in ar9003_hw_do_pcoem_manual_peak_cal()
1283 if (!AR_SREV_9462(ah) && !AR_SREV_9565(ah) && !AR_SREV_9485(ah)) in ar9003_hw_do_pcoem_manual_peak_cal()
1286 if ((ah->caps.hw_caps & ATH9K_HW_CAP_RTT) && !run_rtt_cal) in ar9003_hw_do_pcoem_manual_peak_cal()
1290 if (!(ah->rxchainmask & (1 << i))) in ar9003_hw_do_pcoem_manual_peak_cal()
1292 ar9003_hw_manual_peak_cal(ah, i, IS_CHAN_2GHZ(chan)); in ar9003_hw_do_pcoem_manual_peak_cal()
1298 if ((ah->caps.hw_caps & ATH9K_HW_CAP_RTT) && caldata) { in ar9003_hw_do_pcoem_manual_peak_cal()
1300 caldata->caldac[0] = REG_READ_FIELD(ah, in ar9003_hw_do_pcoem_manual_peak_cal()
1303 caldata->caldac[1] = REG_READ_FIELD(ah, in ar9003_hw_do_pcoem_manual_peak_cal()
1307 caldata->caldac[0] = REG_READ_FIELD(ah, in ar9003_hw_do_pcoem_manual_peak_cal()
1310 caldata->caldac[1] = REG_READ_FIELD(ah, in ar9003_hw_do_pcoem_manual_peak_cal()
1317 static void ar9003_hw_cl_cal_post_proc(struct ath_hw *ah, bool is_reusable) in ar9003_hw_cl_cal_post_proc() argument
1322 struct ath9k_hw_cal_data *caldata = ah->caldata; in ar9003_hw_cl_cal_post_proc()
1326 if (!caldata || !(ah->enabled_cals & TX_CL_CAL)) in ar9003_hw_cl_cal_post_proc()
1329 txclcal_done = !!(REG_READ(ah, AR_PHY_AGC_CONTROL) & in ar9003_hw_cl_cal_post_proc()
1334 if (!(ah->txchainmask & (1 << i))) in ar9003_hw_cl_cal_post_proc()
1337 REG_WRITE(ah, CL_TAB_ENTRY(cl_idx[i]), in ar9003_hw_cl_cal_post_proc()
1342 if (!(ah->txchainmask & (1 << i))) in ar9003_hw_cl_cal_post_proc()
1346 REG_READ(ah, CL_TAB_ENTRY(cl_idx[i])); in ar9003_hw_cl_cal_post_proc()
1352 static bool ar9003_hw_init_cal_pcoem(struct ath_hw *ah, in ar9003_hw_init_cal_pcoem() argument
1355 struct ath_common *common = ath9k_hw_common(ah); in ar9003_hw_init_cal_pcoem()
1356 struct ath9k_hw_cal_data *caldata = ah->caldata; in ar9003_hw_init_cal_pcoem()
1360 bool rtt = !!(ah->caps.hw_caps & ATH9K_HW_CAP_RTT); in ar9003_hw_init_cal_pcoem()
1367 ar9003_hw_set_chain_masks(ah, ah->caps.rx_chainmask, ah->caps.tx_chainmask); in ar9003_hw_init_cal_pcoem()
1370 if (!ar9003_hw_rtt_restore(ah, chan)) in ar9003_hw_init_cal_pcoem()
1380 ar9003_hw_rtt_enable(ah); in ar9003_hw_init_cal_pcoem()
1381 ar9003_hw_rtt_set_mask(ah, 0x00); in ar9003_hw_init_cal_pcoem()
1382 ar9003_hw_rtt_clear_hist(ah); in ar9003_hw_init_cal_pcoem()
1387 agc_ctrl = REG_READ(ah, AR_PHY_AGC_CONTROL); in ar9003_hw_init_cal_pcoem()
1392 REG_WRITE(ah, AR_PHY_AGC_CONTROL, agc_ctrl); in ar9003_hw_init_cal_pcoem()
1394 if (ah->ah_flags & AH_FASTCC) in ar9003_hw_init_cal_pcoem()
1399 if (ah->enabled_cals & TX_CL_CAL) { in ar9003_hw_init_cal_pcoem()
1401 REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, in ar9003_hw_init_cal_pcoem()
1404 REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, in ar9003_hw_init_cal_pcoem()
1411 !(ah->enabled_cals & TX_IQ_CAL)) in ar9003_hw_init_cal_pcoem()
1415 REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1, in ar9003_hw_init_cal_pcoem()
1423 if (ah->enabled_cals & TX_IQ_ON_AGC_CAL) { in ar9003_hw_init_cal_pcoem()
1425 REG_SET_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0, in ar9003_hw_init_cal_pcoem()
1428 REG_CLR_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0, in ar9003_hw_init_cal_pcoem()
1434 if (ath9k_hw_mci_is_enabled(ah) && IS_CHAN_2GHZ(chan) && run_agc_cal) in ar9003_hw_init_cal_pcoem()
1435 ar9003_mci_init_cal_req(ah, &is_reusable); in ar9003_hw_init_cal_pcoem()
1437 if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE) { in ar9003_hw_init_cal_pcoem()
1438 rx_delay = REG_READ(ah, AR_PHY_RX_DELAY); in ar9003_hw_init_cal_pcoem()
1440 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS); in ar9003_hw_init_cal_pcoem()
1442 REG_WRITE(ah, AR_PHY_RX_DELAY, AR_PHY_RX_DELAY_DELAY); in ar9003_hw_init_cal_pcoem()
1443 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN); in ar9003_hw_init_cal_pcoem()
1446 if (run_agc_cal || !(ah->ah_flags & AH_FASTCC)) { in ar9003_hw_init_cal_pcoem()
1448 REG_WRITE(ah, AR_PHY_AGC_CONTROL, in ar9003_hw_init_cal_pcoem()
1449 REG_READ(ah, AR_PHY_AGC_CONTROL) | in ar9003_hw_init_cal_pcoem()
1453 status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, in ar9003_hw_init_cal_pcoem()
1457 ar9003_hw_do_pcoem_manual_peak_cal(ah, chan, run_rtt_cal); in ar9003_hw_init_cal_pcoem()
1460 if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE) { in ar9003_hw_init_cal_pcoem()
1461 REG_WRITE(ah, AR_PHY_RX_DELAY, rx_delay); in ar9003_hw_init_cal_pcoem()
1465 if (ath9k_hw_mci_is_enabled(ah) && IS_CHAN_2GHZ(chan) && run_agc_cal) in ar9003_hw_init_cal_pcoem()
1466 ar9003_mci_init_cal_done(ah); in ar9003_hw_init_cal_pcoem()
1470 REG_WRITE(ah, AR_PHY_AGC_CONTROL, agc_ctrl); in ar9003_hw_init_cal_pcoem()
1475 ar9003_hw_rtt_disable(ah); in ar9003_hw_init_cal_pcoem()
1484 ar9003_hw_tx_iq_cal_post_proc(ah, 0, is_reusable); in ar9003_hw_init_cal_pcoem()
1486 ar9003_hw_tx_iq_cal_reload(ah); in ar9003_hw_init_cal_pcoem()
1488 ar9003_hw_cl_cal_post_proc(ah, is_reusable); in ar9003_hw_init_cal_pcoem()
1492 if (!ath9k_hw_rfbus_req(ah)) { in ar9003_hw_init_cal_pcoem()
1493 ath_err(ath9k_hw_common(ah), in ar9003_hw_init_cal_pcoem()
1496 ar9003_hw_rtt_fill_hist(ah); in ar9003_hw_init_cal_pcoem()
1499 ar9003_hw_rtt_load_hist(ah); in ar9003_hw_init_cal_pcoem()
1502 ath9k_hw_rfbus_done(ah); in ar9003_hw_init_cal_pcoem()
1505 ar9003_hw_rtt_disable(ah); in ar9003_hw_init_cal_pcoem()
1509 ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask); in ar9003_hw_init_cal_pcoem()
1512 ah->cal_list = ah->cal_list_last = ah->cal_list_curr = NULL; in ar9003_hw_init_cal_pcoem()
1514 INIT_CAL(&ah->iq_caldata); in ar9003_hw_init_cal_pcoem()
1515 INSERT_CAL(ah, &ah->iq_caldata); in ar9003_hw_init_cal_pcoem()
1519 ah->cal_list_curr = ah->cal_list; in ar9003_hw_init_cal_pcoem()
1521 if (ah->cal_list_curr) in ar9003_hw_init_cal_pcoem()
1522 ath9k_hw_reset_calibration(ah, ah->cal_list_curr); in ar9003_hw_init_cal_pcoem()
1530 static bool do_ar9003_agc_cal(struct ath_hw *ah) in do_ar9003_agc_cal() argument
1532 struct ath_common *common = ath9k_hw_common(ah); in do_ar9003_agc_cal()
1535 REG_WRITE(ah, AR_PHY_AGC_CONTROL, in do_ar9003_agc_cal()
1536 REG_READ(ah, AR_PHY_AGC_CONTROL) | in do_ar9003_agc_cal()
1539 status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, in do_ar9003_agc_cal()
1553 static bool ar9003_hw_init_cal_soc(struct ath_hw *ah, in ar9003_hw_init_cal_soc() argument
1556 struct ath_common *common = ath9k_hw_common(ah); in ar9003_hw_init_cal_soc()
1557 struct ath9k_hw_cal_data *caldata = ah->caldata; in ar9003_hw_init_cal_soc()
1564 ar9003_hw_set_chain_masks(ah, ah->caps.rx_chainmask, ah->caps.tx_chainmask); in ar9003_hw_init_cal_soc()
1566 if (ah->enabled_cals & TX_CL_CAL) { in ar9003_hw_init_cal_soc()
1567 REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE); in ar9003_hw_init_cal_soc()
1575 REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1, in ar9003_hw_init_cal_soc()
1583 if (ah->enabled_cals & TX_IQ_ON_AGC_CAL) { in ar9003_hw_init_cal_soc()
1584 if (REG_READ_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_0, in ar9003_hw_init_cal_soc()
1600 txiqcal_done = ar9003_hw_tx_iq_cal_run(ah); in ar9003_hw_init_cal_soc()
1601 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS); in ar9003_hw_init_cal_soc()
1603 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN); in ar9003_hw_init_cal_soc()
1606 if (AR_SREV_9550(ah) && IS_CHAN_2GHZ(chan)) { in ar9003_hw_init_cal_soc()
1607 if (!ar9003_hw_dynamic_osdac_selection(ah, txiqcal_done)) in ar9003_hw_init_cal_soc()
1612 if (run_agc_cal || !(ah->ah_flags & AH_FASTCC)) { in ar9003_hw_init_cal_soc()
1613 if (AR_SREV_9330_11(ah)) in ar9003_hw_init_cal_soc()
1614 ar9003_hw_manual_peak_cal(ah, 0, IS_CHAN_2GHZ(chan)); in ar9003_hw_init_cal_soc()
1624 if (!AR_SREV_9550(ah)) { in ar9003_hw_init_cal_soc()
1625 status = do_ar9003_agc_cal(ah); in ar9003_hw_init_cal_soc()
1630 ar9003_hw_tx_iq_cal_post_proc(ah, 0, false); in ar9003_hw_init_cal_soc()
1633 status = do_ar9003_agc_cal(ah); in ar9003_hw_init_cal_soc()
1638 status = do_ar9003_agc_cal(ah); in ar9003_hw_init_cal_soc()
1641 ar9003_hw_tx_iq_cal_post_proc(ah, i, false); in ar9003_hw_init_cal_soc()
1648 ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask); in ar9003_hw_init_cal_soc()
1651 ah->cal_list = ah->cal_list_last = ah->cal_list_curr = NULL; in ar9003_hw_init_cal_soc()
1653 INIT_CAL(&ah->iq_caldata); in ar9003_hw_init_cal_soc()
1654 INSERT_CAL(ah, &ah->iq_caldata); in ar9003_hw_init_cal_soc()
1658 ah->cal_list_curr = ah->cal_list; in ar9003_hw_init_cal_soc()
1660 if (ah->cal_list_curr) in ar9003_hw_init_cal_soc()
1661 ath9k_hw_reset_calibration(ah, ah->cal_list_curr); in ar9003_hw_init_cal_soc()
1669 void ar9003_hw_attach_calib_ops(struct ath_hw *ah) in ar9003_hw_attach_calib_ops() argument
1671 struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah); in ar9003_hw_attach_calib_ops()
1672 struct ath_hw_ops *ops = ath9k_hw_ops(ah); in ar9003_hw_attach_calib_ops()
1674 if (AR_SREV_9485(ah) || AR_SREV_9462(ah) || AR_SREV_9565(ah)) in ar9003_hw_attach_calib_ops()