Lines Matching refs:dm_digtable
152 struct dig_t *dm_digtable = &rtlpriv->dm_digtable; in rtl8723e_dm_diginit() local
154 dm_digtable->dig_enable_flag = true; in rtl8723e_dm_diginit()
155 dm_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX; in rtl8723e_dm_diginit()
156 dm_digtable->cur_igvalue = 0x20; in rtl8723e_dm_diginit()
157 dm_digtable->pre_igvalue = 0x0; in rtl8723e_dm_diginit()
158 dm_digtable->cursta_cstate = DIG_STA_DISCONNECT; in rtl8723e_dm_diginit()
159 dm_digtable->presta_cstate = DIG_STA_DISCONNECT; in rtl8723e_dm_diginit()
160 dm_digtable->curmultista_cstate = DIG_MULTISTA_DISCONNECT; in rtl8723e_dm_diginit()
161 dm_digtable->rssi_lowthresh = DM_DIG_THRESH_LOW; in rtl8723e_dm_diginit()
162 dm_digtable->rssi_highthresh = DM_DIG_THRESH_HIGH; in rtl8723e_dm_diginit()
163 dm_digtable->fa_lowthresh = DM_FALSEALARM_THRESH_LOW; in rtl8723e_dm_diginit()
164 dm_digtable->fa_highthresh = DM_FALSEALARM_THRESH_HIGH; in rtl8723e_dm_diginit()
165 dm_digtable->rx_gain_max = DM_DIG_MAX; in rtl8723e_dm_diginit()
166 dm_digtable->rx_gain_min = DM_DIG_MIN; in rtl8723e_dm_diginit()
167 dm_digtable->back_val = DM_DIG_BACKOFF_DEFAULT; in rtl8723e_dm_diginit()
168 dm_digtable->back_range_max = DM_DIG_BACKOFF_MAX; in rtl8723e_dm_diginit()
169 dm_digtable->back_range_min = DM_DIG_BACKOFF_MIN; in rtl8723e_dm_diginit()
170 dm_digtable->pre_cck_pd_state = CCK_PD_STAGE_MAX; in rtl8723e_dm_diginit()
171 dm_digtable->cur_cck_pd_state = CCK_PD_STAGE_MAX; in rtl8723e_dm_diginit()
177 struct dig_t *dm_digtable = &rtlpriv->dm_digtable; in rtl8723e_dm_initial_gain_min_pwdb() local
180 if ((dm_digtable->curmultista_cstate == DIG_MULTISTA_CONNECT) && in rtl8723e_dm_initial_gain_min_pwdb()
181 (dm_digtable->cursta_cstate == DIG_STA_CONNECT)) { in rtl8723e_dm_initial_gain_min_pwdb()
190 } else if (dm_digtable->cursta_cstate == DIG_STA_CONNECT || in rtl8723e_dm_initial_gain_min_pwdb()
191 dm_digtable->cursta_cstate == DIG_STA_BEFORE_CONNECT) { in rtl8723e_dm_initial_gain_min_pwdb()
193 } else if (dm_digtable->curmultista_cstate == in rtl8723e_dm_initial_gain_min_pwdb()
252 struct dig_t *dm_digtable = &rtlpriv->dm_digtable; in rtl92c_dm_ctrl_initgain_by_fa() local
253 u8 value_igi = dm_digtable->cur_igvalue; in rtl92c_dm_ctrl_initgain_by_fa()
270 dm_digtable->cur_igvalue = value_igi; in rtl92c_dm_ctrl_initgain_by_fa()
277 struct dig_t *dm_digtable = &rtlpriv->dm_digtable; in rtl92c_dm_ctrl_initgain_by_rssi() local
279 if (rtlpriv->falsealm_cnt.cnt_all > dm_digtable->fa_highthresh) { in rtl92c_dm_ctrl_initgain_by_rssi()
280 if ((dm_digtable->back_val - 2) < in rtl92c_dm_ctrl_initgain_by_rssi()
281 dm_digtable->back_range_min) in rtl92c_dm_ctrl_initgain_by_rssi()
282 dm_digtable->back_val = in rtl92c_dm_ctrl_initgain_by_rssi()
283 dm_digtable->back_range_min; in rtl92c_dm_ctrl_initgain_by_rssi()
285 dm_digtable->back_val -= 2; in rtl92c_dm_ctrl_initgain_by_rssi()
286 } else if (rtlpriv->falsealm_cnt.cnt_all < dm_digtable->fa_lowthresh) { in rtl92c_dm_ctrl_initgain_by_rssi()
287 if ((dm_digtable->back_val + 2) > in rtl92c_dm_ctrl_initgain_by_rssi()
288 dm_digtable->back_range_max) in rtl92c_dm_ctrl_initgain_by_rssi()
289 dm_digtable->back_val = in rtl92c_dm_ctrl_initgain_by_rssi()
290 dm_digtable->back_range_max; in rtl92c_dm_ctrl_initgain_by_rssi()
292 dm_digtable->back_val += 2; in rtl92c_dm_ctrl_initgain_by_rssi()
295 if ((dm_digtable->rssi_val_min + 10 - dm_digtable->back_val) > in rtl92c_dm_ctrl_initgain_by_rssi()
296 dm_digtable->rx_gain_max) in rtl92c_dm_ctrl_initgain_by_rssi()
297 dm_digtable->cur_igvalue = dm_digtable->rx_gain_max; in rtl92c_dm_ctrl_initgain_by_rssi()
298 else if ((dm_digtable->rssi_val_min + 10 - in rtl92c_dm_ctrl_initgain_by_rssi()
299 dm_digtable->back_val) < dm_digtable->rx_gain_min) in rtl92c_dm_ctrl_initgain_by_rssi()
300 dm_digtable->cur_igvalue = dm_digtable->rx_gain_min; in rtl92c_dm_ctrl_initgain_by_rssi()
302 dm_digtable->cur_igvalue = dm_digtable->rssi_val_min + 10 - in rtl92c_dm_ctrl_initgain_by_rssi()
303 dm_digtable->back_val; in rtl92c_dm_ctrl_initgain_by_rssi()
307 dm_digtable->rssi_val_min, dm_digtable->back_val); in rtl92c_dm_ctrl_initgain_by_rssi()
317 struct dig_t *dm_digtable = &rtlpriv->dm_digtable; in rtl8723e_dm_initial_gain_multi_sta() local
324 if (!multi_sta || (dm_digtable->cursta_cstate != DIG_STA_DISCONNECT)) { in rtl8723e_dm_initial_gain_multi_sta()
326 dm_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX; in rtl8723e_dm_initial_gain_multi_sta()
330 dm_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_0; in rtl8723e_dm_initial_gain_multi_sta()
331 dm_digtable->cur_igvalue = 0x20; in rtl8723e_dm_initial_gain_multi_sta()
335 if (dm_digtable->curmultista_cstate == DIG_MULTISTA_CONNECT) { in rtl8723e_dm_initial_gain_multi_sta()
336 if ((rssi_strength < dm_digtable->rssi_lowthresh) && in rtl8723e_dm_initial_gain_multi_sta()
337 (dm_digtable->dig_ext_port_stage != DIG_EXT_PORT_STAGE_1)) { in rtl8723e_dm_initial_gain_multi_sta()
339 if (dm_digtable->dig_ext_port_stage == in rtl8723e_dm_initial_gain_multi_sta()
341 dm_digtable->cur_igvalue = 0x20; in rtl8723e_dm_initial_gain_multi_sta()
345 dm_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_1; in rtl8723e_dm_initial_gain_multi_sta()
346 } else if (rssi_strength > dm_digtable->rssi_highthresh) { in rtl8723e_dm_initial_gain_multi_sta()
347 dm_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_2; in rtl8723e_dm_initial_gain_multi_sta()
350 } else if (dm_digtable->dig_ext_port_stage != DIG_EXT_PORT_STAGE_0) { in rtl8723e_dm_initial_gain_multi_sta()
351 dm_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_0; in rtl8723e_dm_initial_gain_multi_sta()
352 dm_digtable->cur_igvalue = 0x20; in rtl8723e_dm_initial_gain_multi_sta()
358 dm_digtable->curmultista_cstate, in rtl8723e_dm_initial_gain_multi_sta()
359 dm_digtable->dig_ext_port_stage); in rtl8723e_dm_initial_gain_multi_sta()
365 struct dig_t *dm_digtable = &rtlpriv->dm_digtable; in rtl8723e_dm_initial_gain_sta() local
369 dm_digtable->presta_cstate, in rtl8723e_dm_initial_gain_sta()
370 dm_digtable->cursta_cstate); in rtl8723e_dm_initial_gain_sta()
372 if (dm_digtable->presta_cstate == dm_digtable->cursta_cstate || in rtl8723e_dm_initial_gain_sta()
373 dm_digtable->cursta_cstate == DIG_STA_BEFORE_CONNECT || in rtl8723e_dm_initial_gain_sta()
374 dm_digtable->cursta_cstate == DIG_STA_CONNECT) { in rtl8723e_dm_initial_gain_sta()
375 if (dm_digtable->cursta_cstate != DIG_STA_DISCONNECT) { in rtl8723e_dm_initial_gain_sta()
376 dm_digtable->rssi_val_min = in rtl8723e_dm_initial_gain_sta()
381 dm_digtable->rssi_val_min = 0; in rtl8723e_dm_initial_gain_sta()
382 dm_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX; in rtl8723e_dm_initial_gain_sta()
383 dm_digtable->back_val = DM_DIG_BACKOFF_DEFAULT; in rtl8723e_dm_initial_gain_sta()
384 dm_digtable->cur_igvalue = 0x20; in rtl8723e_dm_initial_gain_sta()
385 dm_digtable->pre_igvalue = 0; in rtl8723e_dm_initial_gain_sta()
393 struct dig_t *dm_digtable = &rtlpriv->dm_digtable; in rtl8723e_dm_cck_packet_detection_thresh() local
395 if (dm_digtable->cursta_cstate == DIG_STA_CONNECT) { in rtl8723e_dm_cck_packet_detection_thresh()
396 dm_digtable->rssi_val_min = rtl8723e_dm_initial_gain_min_pwdb(hw); in rtl8723e_dm_cck_packet_detection_thresh()
398 if (dm_digtable->pre_cck_pd_state == CCK_PD_STAGE_LowRssi) { in rtl8723e_dm_cck_packet_detection_thresh()
399 if (dm_digtable->rssi_val_min <= 25) in rtl8723e_dm_cck_packet_detection_thresh()
400 dm_digtable->cur_cck_pd_state = in rtl8723e_dm_cck_packet_detection_thresh()
403 dm_digtable->cur_cck_pd_state = in rtl8723e_dm_cck_packet_detection_thresh()
406 if (dm_digtable->rssi_val_min <= 20) in rtl8723e_dm_cck_packet_detection_thresh()
407 dm_digtable->cur_cck_pd_state = in rtl8723e_dm_cck_packet_detection_thresh()
410 dm_digtable->cur_cck_pd_state = in rtl8723e_dm_cck_packet_detection_thresh()
414 dm_digtable->cur_cck_pd_state = CCK_PD_STAGE_MAX; in rtl8723e_dm_cck_packet_detection_thresh()
417 if (dm_digtable->pre_cck_pd_state != dm_digtable->cur_cck_pd_state) { in rtl8723e_dm_cck_packet_detection_thresh()
418 if (dm_digtable->cur_cck_pd_state == CCK_PD_STAGE_LowRssi) { in rtl8723e_dm_cck_packet_detection_thresh()
420 dm_digtable->cur_cck_fa_state = in rtl8723e_dm_cck_packet_detection_thresh()
423 dm_digtable->cur_cck_fa_state = in rtl8723e_dm_cck_packet_detection_thresh()
425 if (dm_digtable->pre_cck_fa_state != in rtl8723e_dm_cck_packet_detection_thresh()
426 dm_digtable->cur_cck_fa_state) { in rtl8723e_dm_cck_packet_detection_thresh()
427 if (dm_digtable->cur_cck_fa_state == in rtl8723e_dm_cck_packet_detection_thresh()
435 dm_digtable->pre_cck_fa_state = in rtl8723e_dm_cck_packet_detection_thresh()
436 dm_digtable->cur_cck_fa_state; in rtl8723e_dm_cck_packet_detection_thresh()
446 dm_digtable->pre_cck_pd_state = dm_digtable->cur_cck_pd_state; in rtl8723e_dm_cck_packet_detection_thresh()
450 "CCKPDStage=%x\n", dm_digtable->cur_cck_pd_state); in rtl8723e_dm_cck_packet_detection_thresh()
458 struct dig_t *dm_digtable = &rtlpriv->dm_digtable; in rtl8723e_dm_ctrl_initgain_by_twoport() local
464 dm_digtable->cursta_cstate = DIG_STA_CONNECT; in rtl8723e_dm_ctrl_initgain_by_twoport()
466 dm_digtable->cursta_cstate = DIG_STA_DISCONNECT; in rtl8723e_dm_ctrl_initgain_by_twoport()
472 dm_digtable->presta_cstate = dm_digtable->cursta_cstate; in rtl8723e_dm_ctrl_initgain_by_twoport()
479 struct dig_t *dm_digtable = &rtlpriv->dm_digtable; in rtl8723e_dm_dig() local
483 if (!dm_digtable->dig_enable_flag) in rtl8723e_dm_dig()
570 struct dig_t *dm_digtable = &rtlpriv->dm_digtable; in rtl8723e_dm_write_dig() local
574 dm_digtable->cur_igvalue, dm_digtable->pre_igvalue, in rtl8723e_dm_write_dig()
575 dm_digtable->back_val); in rtl8723e_dm_write_dig()
577 if (dm_digtable->pre_igvalue != dm_digtable->cur_igvalue) { in rtl8723e_dm_write_dig()
579 dm_digtable->cur_igvalue); in rtl8723e_dm_write_dig()
581 dm_digtable->cur_igvalue); in rtl8723e_dm_write_dig()
583 dm_digtable->pre_igvalue = dm_digtable->cur_igvalue; in rtl8723e_dm_write_dig()