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Lines Matching refs:base_addr

210     error_config = READ_REG32(d->hba.base_addr + LBA_ERROR_CONFIG);		\
213 status_control = READ_REG32(d->hba.base_addr + LBA_STAT_CTL); \
219 arb_mask = READ_REG32(d->hba.base_addr + LBA_ARB_MASK); \
225 WRITE_REG32(0x1, d->hba.base_addr + LBA_ARB_MASK); \
231 WRITE_REG32(error_config | LBA_SMART_MODE, d->hba.base_addr + LBA_ERROR_CONFIG); \
240 WRITE_REG32(tok | PCI_VENDOR_ID, (d)->hba.base_addr + LBA_PCI_CFG_ADDR);\
245 lba_t32 = READ_REG32((d)->hba.base_addr + LBA_PCI_CFG_ADDR); \
250 WRITE_REG32(~0, (d)->hba.base_addr + LBA_PCI_CFG_DATA); \
255 lba_t32 = READ_REG32((d)->hba.base_addr + LBA_PCI_CFG_ADDR); \
310 WRITE_REG32(((addr) & ~3), (d)->hba.base_addr + LBA_PCI_CFG_ADDR);
313 WRITE_REG32(((addr) & ~3), (d)->hba.base_addr + LBA_PCI_CFG_ADDR); \
318 lba_t32 = READ_REG32((d)->hba.base_addr + LBA_PCI_CFG_ADDR); \
350 LBA_CFG_MASTER_ABORT_CHECK(d, d->hba.base_addr, tok, error); in lba_rd_cfg()
352 void __iomem *data_reg = d->hba.base_addr + LBA_PCI_CFG_DATA; in lba_rd_cfg()
361 LBA_CFG_RESTORE(d, d->hba.base_addr); in lba_rd_cfg()
371 void __iomem *data_reg = d->hba.base_addr + LBA_PCI_CFG_DATA; in elroy_cfg_read()
414 void __iomem *data_reg = d->hba.base_addr + LBA_PCI_CFG_DATA; in lba_wr_cfg()
423 LBA_CFG_MASTER_ABORT_CHECK(d, d->hba.base_addr, tok, error); in lba_wr_cfg()
424 LBA_CFG_RESTORE(d, d->hba.base_addr); in lba_wr_cfg()
459 case 1: WRITE_REG8 (data, d->hba.base_addr + LBA_PCI_CFG_DATA + (pos & 3)); in elroy_cfg_write()
461 case 2: WRITE_REG16(data, d->hba.base_addr + LBA_PCI_CFG_DATA + (pos & 2)); in elroy_cfg_write()
463 case 4: WRITE_REG32(data, d->hba.base_addr + LBA_PCI_CFG_DATA); in elroy_cfg_write()
467 lba_t32 = READ_REG32(d->hba.base_addr + LBA_PCI_CFG_ADDR); in elroy_cfg_write()
488 void __iomem *data_reg = d->hba.base_addr + LBA_PCI_CFG_DATA; in mercury_cfg_read()
518 void __iomem *data_reg = d->hba.base_addr + LBA_PCI_CFG_DATA; in mercury_cfg_write()
541 lba_t32 = READ_U32(d->hba.base_addr + LBA_PCI_CFG_ADDR); in mercury_cfg_write()
900 lba_t32 = READ_U32(d->base_addr + LBA_FUNC_ID); \
958 lba_t32 = READ_U32(l->base_addr + LBA_FUNC_ID); \
1049 lba_len = ~READ_REG32(lba_dev->hba.base_addr in lba_pat_resources()
1152 lba_num = READ_REG32(lba_dev->hba.base_addr + LBA_FW_SCRATCH); in lba_legacy_resources()
1234 r->start = READ_REG32(lba_dev->hba.base_addr + LBA_LMMIO_BASE); in lba_legacy_resources()
1242 rsize = ~ READ_REG32(lba_dev->hba.base_addr + LBA_LMMIO_MASK); in lba_legacy_resources()
1280 r->start = READ_REG32(lba_dev->hba.base_addr + LBA_ELMMIO_BASE); in lba_legacy_resources()
1288 rsize = READ_REG32(lba_dev->hba.base_addr + LBA_ELMMIO_MASK); in lba_legacy_resources()
1298 r->start = READ_REG32(lba_dev->hba.base_addr + LBA_IOS_BASE) & ~1L; in lba_legacy_resources()
1299 …r->end = r->start + (READ_REG32(lba_dev->hba.base_addr + LBA_IOS_MASK) ^ (HBA_PORT_SPACE_SIZE - … in lba_legacy_resources()
1328 d->hba.base_addr, in lba_hw_init()
1329 READ_REG64(d->hba.base_addr + LBA_STAT_CTL), in lba_hw_init()
1330 READ_REG64(d->hba.base_addr + LBA_ERROR_CONFIG), in lba_hw_init()
1331 READ_REG64(d->hba.base_addr + LBA_ERROR_STATUS), in lba_hw_init()
1332 READ_REG64(d->hba.base_addr + LBA_DMA_CTL) ); in lba_hw_init()
1334 READ_REG64(d->hba.base_addr + LBA_ARB_MASK), in lba_hw_init()
1335 READ_REG64(d->hba.base_addr + LBA_ARB_PRI), in lba_hw_init()
1336 READ_REG64(d->hba.base_addr + LBA_ARB_MODE), in lba_hw_init()
1337 READ_REG64(d->hba.base_addr + LBA_ARB_MTLT) ); in lba_hw_init()
1339 READ_REG64(d->hba.base_addr + LBA_HINT_CFG)); in lba_hw_init()
1343 printk(" %Lx", READ_REG64(d->hba.base_addr + i)); in lba_hw_init()
1357 bus_reset = READ_REG32(d->hba.base_addr + LBA_STAT_CTL + 4) & 1; in lba_hw_init()
1362 stat = READ_REG32(d->hba.base_addr + LBA_ERROR_CONFIG); in lba_hw_init()
1366 WRITE_REG32(stat, d->hba.base_addr + LBA_ERROR_CONFIG); in lba_hw_init()
1370 stat = READ_REG32(d->hba.base_addr + LBA_STAT_CTL); in lba_hw_init()
1371 WRITE_REG32(stat | HF_ENABLE, d->hba.base_addr + LBA_STAT_CTL); in lba_hw_init()
1381 if (0 == READ_REG32(d->hba.base_addr + LBA_ARB_MASK)) { in lba_hw_init()
1392 WRITE_REG32(0x3, d->hba.base_addr + LBA_ARB_MASK); in lba_hw_init()
1502 lba_dev->hba.base_addr = addr; in lba_driver_probe()
1641 void __iomem * base_addr = ioremap_nocache(lba->hpa.start, 4096); in lba_set_iregs() local
1650 WRITE_REG32( imask, base_addr + LBA_IMASK); in lba_set_iregs()
1651 WRITE_REG32( ibase, base_addr + LBA_IBASE); in lba_set_iregs()
1652 iounmap(base_addr); in lba_set_iregs()