Lines Matching refs:pctl
38 sunxi_pinctrl_find_group_by_name(struct sunxi_pinctrl *pctl, const char *group) in sunxi_pinctrl_find_group_by_name() argument
42 for (i = 0; i < pctl->ngroups; i++) { in sunxi_pinctrl_find_group_by_name()
43 struct sunxi_pinctrl_group *grp = pctl->groups + i; in sunxi_pinctrl_find_group_by_name()
53 sunxi_pinctrl_find_function_by_name(struct sunxi_pinctrl *pctl, in sunxi_pinctrl_find_function_by_name() argument
56 struct sunxi_pinctrl_function *func = pctl->functions; in sunxi_pinctrl_find_function_by_name()
59 for (i = 0; i < pctl->nfunctions; i++) { in sunxi_pinctrl_find_function_by_name()
71 sunxi_pinctrl_desc_find_function_by_name(struct sunxi_pinctrl *pctl, in sunxi_pinctrl_desc_find_function_by_name() argument
77 for (i = 0; i < pctl->desc->npins; i++) { in sunxi_pinctrl_desc_find_function_by_name()
78 const struct sunxi_desc_pin *pin = pctl->desc->pins + i; in sunxi_pinctrl_desc_find_function_by_name()
96 sunxi_pinctrl_desc_find_function_by_pin(struct sunxi_pinctrl *pctl, in sunxi_pinctrl_desc_find_function_by_pin() argument
102 for (i = 0; i < pctl->desc->npins; i++) { in sunxi_pinctrl_desc_find_function_by_pin()
103 const struct sunxi_desc_pin *pin = pctl->desc->pins + i; in sunxi_pinctrl_desc_find_function_by_pin()
122 struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in sunxi_pctrl_get_groups_count() local
124 return pctl->ngroups; in sunxi_pctrl_get_groups_count()
130 struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in sunxi_pctrl_get_group_name() local
132 return pctl->groups[group].name; in sunxi_pctrl_get_group_name()
140 struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in sunxi_pctrl_get_group_pins() local
142 *pins = (unsigned *)&pctl->groups[group].pin; in sunxi_pctrl_get_group_pins()
153 struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in sunxi_pctrl_dt_node_to_map() local
166 dev_err(pctl->dev, in sunxi_pctrl_dt_node_to_map()
174 dev_err(pctl->dev, in sunxi_pctrl_dt_node_to_map()
186 sunxi_pinctrl_find_group_by_name(pctl, group); in sunxi_pctrl_dt_node_to_map()
190 dev_err(pctl->dev, "unknown pin %s", group); in sunxi_pctrl_dt_node_to_map()
194 if (!sunxi_pinctrl_desc_find_function_by_name(pctl, in sunxi_pctrl_dt_node_to_map()
197 dev_err(pctl->dev, "unsupported function %s on pin %s", in sunxi_pctrl_dt_node_to_map()
275 struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in sunxi_pconf_group_get() local
277 *config = pctl->groups[group].config; in sunxi_pconf_group_get()
287 struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in sunxi_pconf_group_set() local
288 struct sunxi_pinctrl_group *g = &pctl->groups[group]; in sunxi_pconf_group_set()
290 unsigned pin = g->pin - pctl->desc->pin_base; in sunxi_pconf_group_set()
296 spin_lock_irqsave(&pctl->lock, flags); in sunxi_pconf_group_set()
303 spin_unlock_irqrestore(&pctl->lock, flags); in sunxi_pconf_group_set()
314 val = readl(pctl->membase + sunxi_dlevel_reg(pin)); in sunxi_pconf_group_set()
318 pctl->membase + sunxi_dlevel_reg(pin)); in sunxi_pconf_group_set()
321 val = readl(pctl->membase + sunxi_pull_reg(pin)); in sunxi_pconf_group_set()
324 pctl->membase + sunxi_pull_reg(pin)); in sunxi_pconf_group_set()
327 val = readl(pctl->membase + sunxi_pull_reg(pin)); in sunxi_pconf_group_set()
330 pctl->membase + sunxi_pull_reg(pin)); in sunxi_pconf_group_set()
339 spin_unlock_irqrestore(&pctl->lock, flags); in sunxi_pconf_group_set()
351 struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in sunxi_pmx_get_funcs_cnt() local
353 return pctl->nfunctions; in sunxi_pmx_get_funcs_cnt()
359 struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in sunxi_pmx_get_func_name() local
361 return pctl->functions[function].name; in sunxi_pmx_get_func_name()
369 struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in sunxi_pmx_get_func_groups() local
371 *groups = pctl->functions[function].groups; in sunxi_pmx_get_func_groups()
372 *num_groups = pctl->functions[function].ngroups; in sunxi_pmx_get_func_groups()
381 struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in sunxi_pmx_set() local
385 spin_lock_irqsave(&pctl->lock, flags); in sunxi_pmx_set()
387 pin -= pctl->desc->pin_base; in sunxi_pmx_set()
388 val = readl(pctl->membase + sunxi_mux_reg(pin)); in sunxi_pmx_set()
391 pctl->membase + sunxi_mux_reg(pin)); in sunxi_pmx_set()
393 spin_unlock_irqrestore(&pctl->lock, flags); in sunxi_pmx_set()
400 struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in sunxi_pmx_set_mux() local
401 struct sunxi_pinctrl_group *g = pctl->groups + group; in sunxi_pmx_set_mux()
402 struct sunxi_pinctrl_function *func = pctl->functions + function; in sunxi_pmx_set_mux()
404 sunxi_pinctrl_desc_find_function_by_name(pctl, in sunxi_pmx_set_mux()
422 struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in sunxi_pmx_gpio_set_direction() local
431 desc = sunxi_pinctrl_desc_find_function_by_pin(pctl, offset, func); in sunxi_pmx_gpio_set_direction()
466 struct sunxi_pinctrl *pctl = dev_get_drvdata(chip->dev); in sunxi_pinctrl_gpio_get() local
470 u32 val = (readl(pctl->membase + reg) >> index) & DATA_PINS_MASK; in sunxi_pinctrl_gpio_get()
478 struct sunxi_pinctrl *pctl = dev_get_drvdata(chip->dev); in sunxi_pinctrl_gpio_set() local
484 spin_lock_irqsave(&pctl->lock, flags); in sunxi_pinctrl_gpio_set()
486 regval = readl(pctl->membase + reg); in sunxi_pinctrl_gpio_set()
493 writel(regval, pctl->membase + reg); in sunxi_pinctrl_gpio_set()
495 spin_unlock_irqrestore(&pctl->lock, flags); in sunxi_pinctrl_gpio_set()
525 struct sunxi_pinctrl *pctl = dev_get_drvdata(chip->dev); in sunxi_pinctrl_gpio_to_irq() local
527 unsigned pinnum = pctl->desc->pin_base + offset; in sunxi_pinctrl_gpio_to_irq()
533 desc = sunxi_pinctrl_desc_find_function_by_pin(pctl, pinnum, "irq"); in sunxi_pinctrl_gpio_to_irq()
542 return irq_find_mapping(pctl->domain, irqnum); in sunxi_pinctrl_gpio_to_irq()
547 struct sunxi_pinctrl *pctl = irq_data_get_irq_chip_data(d); in sunxi_pinctrl_irq_request_resources() local
551 func = sunxi_pinctrl_desc_find_function_by_pin(pctl, in sunxi_pinctrl_irq_request_resources()
552 pctl->irq_array[d->hwirq], "irq"); in sunxi_pinctrl_irq_request_resources()
556 ret = gpio_lock_as_irq(pctl->chip, in sunxi_pinctrl_irq_request_resources()
557 pctl->irq_array[d->hwirq] - pctl->desc->pin_base); in sunxi_pinctrl_irq_request_resources()
559 dev_err(pctl->dev, "unable to lock HW IRQ %lu for IRQ\n", in sunxi_pinctrl_irq_request_resources()
565 sunxi_pmx_set(pctl->pctl_dev, pctl->irq_array[d->hwirq], func->muxval); in sunxi_pinctrl_irq_request_resources()
572 struct sunxi_pinctrl *pctl = irq_data_get_irq_chip_data(d); in sunxi_pinctrl_irq_release_resources() local
574 gpio_unlock_as_irq(pctl->chip, in sunxi_pinctrl_irq_release_resources()
575 pctl->irq_array[d->hwirq] - pctl->desc->pin_base); in sunxi_pinctrl_irq_release_resources()
580 struct sunxi_pinctrl *pctl = irq_data_get_irq_chip_data(d); in sunxi_pinctrl_irq_set_type() local
616 spin_lock_irqsave(&pctl->lock, flags); in sunxi_pinctrl_irq_set_type()
618 regval = readl(pctl->membase + reg); in sunxi_pinctrl_irq_set_type()
620 writel(regval | (mode << index), pctl->membase + reg); in sunxi_pinctrl_irq_set_type()
622 spin_unlock_irqrestore(&pctl->lock, flags); in sunxi_pinctrl_irq_set_type()
629 struct sunxi_pinctrl *pctl = irq_data_get_irq_chip_data(d); in sunxi_pinctrl_irq_ack() local
634 writel(1 << status_idx, pctl->membase + status_reg); in sunxi_pinctrl_irq_ack()
639 struct sunxi_pinctrl *pctl = irq_data_get_irq_chip_data(d); in sunxi_pinctrl_irq_mask() local
645 spin_lock_irqsave(&pctl->lock, flags); in sunxi_pinctrl_irq_mask()
648 val = readl(pctl->membase + reg); in sunxi_pinctrl_irq_mask()
649 writel(val & ~(1 << idx), pctl->membase + reg); in sunxi_pinctrl_irq_mask()
651 spin_unlock_irqrestore(&pctl->lock, flags); in sunxi_pinctrl_irq_mask()
656 struct sunxi_pinctrl *pctl = irq_data_get_irq_chip_data(d); in sunxi_pinctrl_irq_unmask() local
662 spin_lock_irqsave(&pctl->lock, flags); in sunxi_pinctrl_irq_unmask()
665 val = readl(pctl->membase + reg); in sunxi_pinctrl_irq_unmask()
666 writel(val | (1 << idx), pctl->membase + reg); in sunxi_pinctrl_irq_unmask()
668 spin_unlock_irqrestore(&pctl->lock, flags); in sunxi_pinctrl_irq_unmask()
705 struct sunxi_pinctrl *pctl = irq_get_handler_data(irq); in sunxi_pinctrl_irq_handler() local
708 for (bank = 0; bank < pctl->desc->irq_banks; bank++) in sunxi_pinctrl_irq_handler()
709 if (irq == pctl->irq[bank]) in sunxi_pinctrl_irq_handler()
712 if (bank == pctl->desc->irq_banks) in sunxi_pinctrl_irq_handler()
716 val = readl(pctl->membase + reg); in sunxi_pinctrl_irq_handler()
723 int pin_irq = irq_find_mapping(pctl->domain, in sunxi_pinctrl_irq_handler()
731 static int sunxi_pinctrl_add_function(struct sunxi_pinctrl *pctl, in sunxi_pinctrl_add_function() argument
734 struct sunxi_pinctrl_function *func = pctl->functions; in sunxi_pinctrl_add_function()
748 pctl->nfunctions++; in sunxi_pinctrl_add_function()
755 struct sunxi_pinctrl *pctl = platform_get_drvdata(pdev); in sunxi_pinctrl_build_state() local
758 pctl->ngroups = pctl->desc->npins; in sunxi_pinctrl_build_state()
761 pctl->groups = devm_kzalloc(&pdev->dev, in sunxi_pinctrl_build_state()
762 pctl->ngroups * sizeof(*pctl->groups), in sunxi_pinctrl_build_state()
764 if (!pctl->groups) in sunxi_pinctrl_build_state()
767 for (i = 0; i < pctl->desc->npins; i++) { in sunxi_pinctrl_build_state()
768 const struct sunxi_desc_pin *pin = pctl->desc->pins + i; in sunxi_pinctrl_build_state()
769 struct sunxi_pinctrl_group *group = pctl->groups + i; in sunxi_pinctrl_build_state()
779 pctl->functions = devm_kzalloc(&pdev->dev, in sunxi_pinctrl_build_state()
780 pctl->desc->npins * sizeof(*pctl->functions), in sunxi_pinctrl_build_state()
782 if (!pctl->functions) in sunxi_pinctrl_build_state()
786 for (i = 0; i < pctl->desc->npins; i++) { in sunxi_pinctrl_build_state()
787 const struct sunxi_desc_pin *pin = pctl->desc->pins + i; in sunxi_pinctrl_build_state()
794 pctl->irq_array[irqnum] = pin->pin.number; in sunxi_pinctrl_build_state()
797 sunxi_pinctrl_add_function(pctl, func->name); in sunxi_pinctrl_build_state()
802 pctl->functions = krealloc(pctl->functions, in sunxi_pinctrl_build_state()
803 pctl->nfunctions * sizeof(*pctl->functions), in sunxi_pinctrl_build_state()
806 for (i = 0; i < pctl->desc->npins; i++) { in sunxi_pinctrl_build_state()
807 const struct sunxi_desc_pin *pin = pctl->desc->pins + i; in sunxi_pinctrl_build_state()
814 func_item = sunxi_pinctrl_find_function_by_name(pctl, in sunxi_pinctrl_build_state()
846 struct sunxi_pinctrl *pctl; in sunxi_pinctrl_init() local
851 pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); in sunxi_pinctrl_init()
852 if (!pctl) in sunxi_pinctrl_init()
854 platform_set_drvdata(pdev, pctl); in sunxi_pinctrl_init()
856 spin_lock_init(&pctl->lock); in sunxi_pinctrl_init()
859 pctl->membase = devm_ioremap_resource(&pdev->dev, res); in sunxi_pinctrl_init()
860 if (IS_ERR(pctl->membase)) in sunxi_pinctrl_init()
861 return PTR_ERR(pctl->membase); in sunxi_pinctrl_init()
863 pctl->dev = &pdev->dev; in sunxi_pinctrl_init()
864 pctl->desc = desc; in sunxi_pinctrl_init()
866 pctl->irq_array = devm_kcalloc(&pdev->dev, in sunxi_pinctrl_init()
867 IRQ_PER_BANK * pctl->desc->irq_banks, in sunxi_pinctrl_init()
868 sizeof(*pctl->irq_array), in sunxi_pinctrl_init()
870 if (!pctl->irq_array) in sunxi_pinctrl_init()
880 pctl->desc->npins * sizeof(*pins), in sunxi_pinctrl_init()
885 for (i = 0; i < pctl->desc->npins; i++) in sunxi_pinctrl_init()
886 pins[i] = pctl->desc->pins[i].pin; in sunxi_pinctrl_init()
897 pctrl_desc->npins = pctl->desc->npins; in sunxi_pinctrl_init()
902 pctl->pctl_dev = pinctrl_register(pctrl_desc, in sunxi_pinctrl_init()
903 &pdev->dev, pctl); in sunxi_pinctrl_init()
904 if (!pctl->pctl_dev) { in sunxi_pinctrl_init()
909 pctl->chip = devm_kzalloc(&pdev->dev, sizeof(*pctl->chip), GFP_KERNEL); in sunxi_pinctrl_init()
910 if (!pctl->chip) { in sunxi_pinctrl_init()
915 last_pin = pctl->desc->pins[pctl->desc->npins - 1].pin.number; in sunxi_pinctrl_init()
916 pctl->chip->owner = THIS_MODULE; in sunxi_pinctrl_init()
917 pctl->chip->request = sunxi_pinctrl_gpio_request, in sunxi_pinctrl_init()
918 pctl->chip->free = sunxi_pinctrl_gpio_free, in sunxi_pinctrl_init()
919 pctl->chip->direction_input = sunxi_pinctrl_gpio_direction_input, in sunxi_pinctrl_init()
920 pctl->chip->direction_output = sunxi_pinctrl_gpio_direction_output, in sunxi_pinctrl_init()
921 pctl->chip->get = sunxi_pinctrl_gpio_get, in sunxi_pinctrl_init()
922 pctl->chip->set = sunxi_pinctrl_gpio_set, in sunxi_pinctrl_init()
923 pctl->chip->of_xlate = sunxi_pinctrl_gpio_of_xlate, in sunxi_pinctrl_init()
924 pctl->chip->to_irq = sunxi_pinctrl_gpio_to_irq, in sunxi_pinctrl_init()
925 pctl->chip->of_gpio_n_cells = 3, in sunxi_pinctrl_init()
926 pctl->chip->can_sleep = false, in sunxi_pinctrl_init()
927 pctl->chip->ngpio = round_up(last_pin, PINS_PER_BANK) - in sunxi_pinctrl_init()
928 pctl->desc->pin_base; in sunxi_pinctrl_init()
929 pctl->chip->label = dev_name(&pdev->dev); in sunxi_pinctrl_init()
930 pctl->chip->dev = &pdev->dev; in sunxi_pinctrl_init()
931 pctl->chip->base = pctl->desc->pin_base; in sunxi_pinctrl_init()
933 ret = gpiochip_add(pctl->chip); in sunxi_pinctrl_init()
937 for (i = 0; i < pctl->desc->npins; i++) { in sunxi_pinctrl_init()
938 const struct sunxi_desc_pin *pin = pctl->desc->pins + i; in sunxi_pinctrl_init()
940 ret = gpiochip_add_pin_range(pctl->chip, dev_name(&pdev->dev), in sunxi_pinctrl_init()
941 pin->pin.number - pctl->desc->pin_base, in sunxi_pinctrl_init()
957 pctl->irq = devm_kcalloc(&pdev->dev, in sunxi_pinctrl_init()
958 pctl->desc->irq_banks, in sunxi_pinctrl_init()
959 sizeof(*pctl->irq), in sunxi_pinctrl_init()
961 if (!pctl->irq) { in sunxi_pinctrl_init()
966 for (i = 0; i < pctl->desc->irq_banks; i++) { in sunxi_pinctrl_init()
967 pctl->irq[i] = platform_get_irq(pdev, i); in sunxi_pinctrl_init()
968 if (pctl->irq[i] < 0) { in sunxi_pinctrl_init()
969 ret = pctl->irq[i]; in sunxi_pinctrl_init()
974 pctl->domain = irq_domain_add_linear(node, in sunxi_pinctrl_init()
975 pctl->desc->irq_banks * IRQ_PER_BANK, in sunxi_pinctrl_init()
978 if (!pctl->domain) { in sunxi_pinctrl_init()
984 for (i = 0; i < (pctl->desc->irq_banks * IRQ_PER_BANK); i++) { in sunxi_pinctrl_init()
985 int irqno = irq_create_mapping(pctl->domain, i); in sunxi_pinctrl_init()
989 irq_set_chip_data(irqno, pctl); in sunxi_pinctrl_init()
992 for (i = 0; i < pctl->desc->irq_banks; i++) { in sunxi_pinctrl_init()
994 writel(0, pctl->membase + sunxi_irq_ctrl_reg_from_bank(i)); in sunxi_pinctrl_init()
996 pctl->membase + sunxi_irq_status_reg_from_bank(i)); in sunxi_pinctrl_init()
998 irq_set_chained_handler(pctl->irq[i], in sunxi_pinctrl_init()
1000 irq_set_handler_data(pctl->irq[i], pctl); in sunxi_pinctrl_init()
1010 gpiochip_remove(pctl->chip); in sunxi_pinctrl_init()
1012 pinctrl_unregister(pctl->pctl_dev); in sunxi_pinctrl_init()