202 	writel(SMU_ISR_COMPLETION, &ihost->smu_registers->interrupt_status);  in sci_controller_isr()
232 	u32 interrupt_status;  in sci_controller_error_isr()  local
234 	interrupt_status =  in sci_controller_error_isr()
235 		readl(&ihost->smu_registers->interrupt_status);  in sci_controller_error_isr()
236 	interrupt_status &= (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND);  in sci_controller_error_isr()
238 	if (interrupt_status != 0) {  in sci_controller_error_isr()
583 	u32 interrupt_status;  in sci_controller_error_handler()  local
585 	interrupt_status =  in sci_controller_error_handler()
586 		readl(&ihost->smu_registers->interrupt_status);  in sci_controller_error_handler()
588 	if ((interrupt_status & SMU_ISR_QUEUE_SUSPEND) &&  in sci_controller_error_handler()
592 		writel(SMU_ISR_QUEUE_SUSPEND, &ihost->smu_registers->interrupt_status);  in sci_controller_error_handler()
595 			interrupt_status);  in sci_controller_error_handler()
614 		writel(SMU_ISR_COMPLETION, &ihost->smu_registers->interrupt_status);  in isci_intx_isr()
1074 	writel(SMU_ISR_COMPLETION, &ihost->smu_registers->interrupt_status);  in sci_controller_completion_handler()
1560 	writel(~SMU_INTERRUPT_STATUS_RESERVED_MASK, &ihost->smu_registers->interrupt_status);  in sci_controller_reset_hardware()