Lines Matching refs:CMD2
46 #define CMD2(x, x1, x2) ((2 << 30) | ((x) << 18) | 0x20000 |\ macro
60 CMD2(0xB8, 0xFF, 0xF9), /* Output Control */
68 CMD2(0xB8, 0x80, 0x02), /* Output Control */
94 CMD2(0xd0, 0x08, 0x04), /* Blanking period control (2) */
96 CMD2(0xd2, 0x14, 0x00), /* CKV 1,2 timing control */
97 CMD2(0xd3, 0x1a, 0x0f), /* OEV timing control */
98 CMD2(0xd4, 0x1f, 0xaf), /* ASW timing control (1) */
107 CMD2(0xd7, 0x08, 0x04), /* Blanking period control (2) */
109 CMD2(0xd9, 0x00, 0x08), /* CKV 1,2 timing control */
110 CMD2(0xde, 0x05, 0x0a), /* OEV timing control */
111 CMD2(0xdf, 0x0a, 0x19), /* ASW timing control (1) */
136 CMD2(0xd0, 0x08, 0x04), /* Blanking period control (2) */
138 CMD2(0xd2, 0x00, 0x1e), /* CKV 1,2 timing control */
139 CMD2(0xd3, 0x14, 0x28), /* OEV timing control */
140 CMD2(0xd4, 0x28, 0x64), /* ASW timing control (1) */
148 CMD2(0xb8, 0xff, 0xf9), /* Output control */
166 CMD2(0xc3, 0x20, 0x40), /* Sleep out FR count (D) */
167 CMD2(0xc4, 0x60, 0xc0), /* Sleep out FR count (E) */
168 CMD2(0xc5, 0x10, 0x20), /* Sleep out FR count (F) */
170 CMD2(0xc7, 0x33, 0x43), /* Gamma 1 fine tuning (1) */
174 CMD2(0xec, 0x01, 0xf0), /* Horizontal clock cycles */