Lines Matching refs:hw
137 struct clk_hw hw; member
252 #define to_clk_hw_omap(_hw) container_of(_hw, struct clk_hw_omap, hw)
255 int omap3_noncore_dpll_enable(struct clk_hw *hw);
256 void omap3_noncore_dpll_disable(struct clk_hw *hw);
257 int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
259 unsigned long omap4_dpll_regm4xen_recalc(struct clk_hw *hw,
261 long omap4_dpll_regm4xen_round_rate(struct clk_hw *hw,
264 u8 omap2_init_dpll_parent(struct clk_hw *hw);
265 unsigned long omap3_dpll_recalc(struct clk_hw *hw, unsigned long parent_rate);
266 long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate,
269 unsigned long omap3_clkoutx2_recalc(struct clk_hw *hw,
271 int omap3_clkoutx2_set_rate(struct clk_hw *hw, unsigned long rate,
273 long omap3_clkoutx2_round_rate(struct clk_hw *hw, unsigned long rate,
275 int omap2_clkops_enable_clkdm(struct clk_hw *hw);
276 void omap2_clkops_disable_clkdm(struct clk_hw *hw);
281 int omap2_dflt_clk_enable(struct clk_hw *hw);
282 void omap2_dflt_clk_disable(struct clk_hw *hw);
283 int omap2_dflt_clk_is_enabled(struct clk_hw *hw);
285 unsigned long omap2_dpllcore_recalc(struct clk_hw *hw,
289 void omap2xxx_clkt_dpllcore_init(struct clk_hw *hw);
297 int ti_clk_retry_init(struct device_node *node, struct clk_hw *hw,
300 int ti_clk_add_component(struct device_node *node, struct clk_hw *hw, int type);