348 		return region->base + (offset * 3);  in wm_adsp_region_to_reg()
350 		return region->base + (offset * 2);  in wm_adsp_region_to_reg()
352 		return region->base + (offset * 2);  in wm_adsp_region_to_reg()
354 		return region->base + (offset * 2);  in wm_adsp_region_to_reg()
356 		return region->base + (offset * 2);  in wm_adsp_region_to_reg()
391 	reg = ctl->region.base;  in wm_coeff_write_control()
447 	reg = ctl->region.base;  in wm_coeff_read_control()
936 		ret = regmap_raw_read(regmap, mem->base, &adsp1_id,  in wm_adsp_setup_algs()
961 		region->base = be32_to_cpu(adsp1_id.zm);  in wm_adsp_setup_algs()
969 		region->base = be32_to_cpu(adsp1_id.dm);  in wm_adsp_setup_algs()
977 		ret = regmap_raw_read(regmap, mem->base, &adsp2_id,  in wm_adsp_setup_algs()
1002 		region->base = be32_to_cpu(adsp2_id.xm);  in wm_adsp_setup_algs()
1010 		region->base = be32_to_cpu(adsp2_id.ym);  in wm_adsp_setup_algs()
1018 		region->base = be32_to_cpu(adsp2_id.zm);  in wm_adsp_setup_algs()
1043 	ret = regmap_raw_read(regmap, mem->base + term, &val, sizeof(val));  in wm_adsp_setup_algs()
1058 	ret = regmap_raw_read(regmap, mem->base + pos, alg, (term - pos) * 2);  in wm_adsp_setup_algs()
1084 			region->base = be32_to_cpu(adsp1_alg[i].dm);  in wm_adsp_setup_algs()
1102 			region->base = be32_to_cpu(adsp1_alg[i].zm);  in wm_adsp_setup_algs()
1132 			region->base = be32_to_cpu(adsp2_alg[i].xm);  in wm_adsp_setup_algs()
1150 			region->base = be32_to_cpu(adsp2_alg[i].ym);  in wm_adsp_setup_algs()
1168 			region->base = be32_to_cpu(adsp2_alg[i].zm);  in wm_adsp_setup_algs()
1311 					reg = alg_region->base;  in wm_adsp_load_coeff()
1413 		regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,  in wm_adsp1_event()
1432 						 dsp->base + ADSP1_CONTROL_31,  in wm_adsp1_event()
1464 		regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,  in wm_adsp1_event()
1471 		regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,  in wm_adsp1_event()
1474 		regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_19,  in wm_adsp1_event()
1477 		regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,  in wm_adsp1_event()
1499 	regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,  in wm_adsp1_event()
1510 	ret = regmap_update_bits_async(dsp->regmap, dsp->base + ADSP2_CONTROL,  in wm_adsp2_ena()
1517 		ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1,  in wm_adsp2_ena()
1559 				       dsp->base + ADSP2_CLOCKING,  in wm_adsp2_boot_work()
1568 				  dsp->base + ADSP2_CLOCKING, &val);  in wm_adsp2_boot_work()
1622 				       dsp->base + ADSP2_CONTROL,  in wm_adsp2_boot_work()
1633 	regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,  in wm_adsp2_boot_work()
1676 					 dsp->base + ADSP2_CONTROL,  in wm_adsp2_event()
1686 		regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,  in wm_adsp2_event()
1691 		regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0);  in wm_adsp2_event()
1692 		regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_2, 0);  in wm_adsp2_event()
1693 		regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0);  in wm_adsp2_event()
1730 	regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,  in wm_adsp2_event()
1744 	ret = regmap_update_bits(adsp->regmap, adsp->base + ADSP2_CONTROL,  in wm_adsp2_init()