1 /* 2 * arch/arm/mach-at91/include/mach/hardware.h 3 * 4 * Copyright (C) 2003 SAN People 5 * Copyright (C) 2003 ATMEL 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 */ 13 14 #ifndef __ASM_ARCH_HARDWARE_H 15 #define __ASM_ARCH_HARDWARE_H 16 17 #include <asm/sizes.h> 18 19 /* DBGU base */ 20 /* rm9200, 9260/9g20, 9261/9g10, 9rl */ 21 #define AT91_BASE_DBGU0 0xfffff200 22 /* 9263, 9g45, sama5d3 */ 23 #define AT91_BASE_DBGU1 0xffffee00 24 /* sama5d4 */ 25 #define AT91_BASE_DBGU2 0xfc069000 26 27 #if defined(CONFIG_ARCH_AT91X40) 28 #include <mach/at91x40.h> 29 #else 30 #include <mach/at91rm9200.h> 31 #include <mach/at91sam9260.h> 32 #include <mach/at91sam9261.h> 33 #include <mach/at91sam9263.h> 34 #include <mach/at91sam9rl.h> 35 #include <mach/at91sam9g45.h> 36 #include <mach/at91sam9x5.h> 37 #include <mach/at91sam9n12.h> 38 #include <mach/sama5d3.h> 39 #include <mach/sama5d4.h> 40 41 /* 42 * On all at91 except rm9200 and x40 have the System Controller starts 43 * at address 0xffffc000 and has a size of 16KiB. 44 * 45 * On rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting 46 * at 0xfffff000 47 * 48 * Removes the individual definitions of AT91_BASE_SYS and 49 * replaces them with a common version at base 0xfffffc000 and size 16KiB 50 * and map the same memory space 51 */ 52 #define AT91_BASE_SYS 0xffffc000 53 54 #endif 55 56 /* 57 * On sama5d4 there is no system controller, we map some needed peripherals 58 */ 59 #define AT91_ALT_BASE_SYS 0xfc069000 60 61 /* 62 * On all at91 have the Advanced Interrupt Controller starts at address 63 * 0xfffff000 and the Power Management Controller starts at 0xfffffc00 64 */ 65 #define AT91_AIC 0xfffff000 66 #define AT91_PMC 0xfffffc00 67 68 /* 69 * Peripheral identifiers/interrupts. 70 */ 71 #define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ 72 #define AT91_ID_SYS 1 /* System Peripherals */ 73 74 #ifdef CONFIG_MMU 75 /* 76 * Remap the peripherals from address 0xFFF78000 .. 0xFFFFFFFF 77 * to 0xFEF78000 .. 0xFF000000. (544Kb) 78 */ 79 #define AT91_IO_PHYS_BASE 0xFFF78000 80 #define AT91_IO_VIRT_BASE IOMEM(0xFF000000 - AT91_IO_SIZE) 81 82 /* 83 * On sama5d4, remap the peripherals from address 0xFC069000 .. 0xFC06F000 84 * to 0xFB069000 .. 0xFB06F000. (24Kb) 85 */ 86 #define AT91_ALT_IO_PHYS_BASE AT91_ALT_BASE_SYS 87 #define AT91_ALT_IO_VIRT_BASE IOMEM(0xFB069000) 88 #else 89 /* 90 * Identity mapping for the non MMU case. 91 */ 92 #define AT91_IO_PHYS_BASE AT91_BASE_SYS 93 #define AT91_IO_VIRT_BASE IOMEM(AT91_IO_PHYS_BASE) 94 95 #define AT91_ALT_IO_PHYS_BASE AT91_ALT_BASE_SYS 96 #define AT91_ALT_IO_VIRT_BASE IOMEM(AT91_ALT_BASE_SYS) 97 #endif 98 99 #define AT91_IO_SIZE (0xFFFFFFFF - AT91_IO_PHYS_BASE + 1) 100 101 /* Convert a physical IO address to virtual IO address */ 102 #define AT91_IO_P2V(x) ((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE) 103 #define AT91_ALT_IO_P2V(x) ((x) - AT91_ALT_IO_PHYS_BASE + AT91_ALT_IO_VIRT_BASE) 104 105 /* 106 * Virtual to Physical Address mapping for IO devices. 107 */ 108 #define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS) 109 #define AT91_ALT_VA_BASE_SYS AT91_ALT_IO_P2V(AT91_ALT_BASE_SYS) 110 111 /* Internal SRAM is mapped below the IO devices */ 112 #define AT91_SRAM_MAX SZ_1M 113 #define AT91_VIRT_BASE (AT91_IO_VIRT_BASE - AT91_SRAM_MAX) 114 115 /* External Memory Map */ 116 #define AT91_CHIPSELECT_0 0x10000000 117 #define AT91_CHIPSELECT_1 0x20000000 118 #define AT91_CHIPSELECT_2 0x30000000 119 #define AT91_CHIPSELECT_3 0x40000000 120 #define AT91_CHIPSELECT_4 0x50000000 121 #define AT91_CHIPSELECT_5 0x60000000 122 #define AT91_CHIPSELECT_6 0x70000000 123 #define AT91_CHIPSELECT_7 0x80000000 124 125 /* Clocks */ 126 #define AT91_SLOW_CLOCK 32768 /* slow clock */ 127 128 /* 129 * FIXME: this is needed to communicate between the pinctrl driver and 130 * the PM implementation in the machine. Possibly part of the PM 131 * implementation should be moved down into the pinctrl driver and get 132 * called as part of the generic suspend/resume path. 133 */ 134 #ifndef __ASSEMBLY__ 135 #ifdef CONFIG_PINCTRL_AT91 136 extern void at91_pinctrl_gpio_suspend(void); 137 extern void at91_pinctrl_gpio_resume(void); 138 #else at91_pinctrl_gpio_suspend(void)139static inline void at91_pinctrl_gpio_suspend(void) {} at91_pinctrl_gpio_resume(void)140static inline void at91_pinctrl_gpio_resume(void) {} 141 #endif 142 #endif 143 144 #endif 145