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1config ZONE_DMA
2	def_bool y
3
4config XTENSA
5	def_bool y
6	select ARCH_WANT_FRAME_POINTERS
7	select ARCH_WANT_IPC_PARSE_VERSION
8	select ARCH_WANT_OPTIONAL_GPIOLIB
9	select BUILDTIME_EXTABLE_SORT
10	select CLONE_BACKWARDS
11	select COMMON_CLK
12	select GENERIC_ATOMIC64
13	select GENERIC_CLOCKEVENTS
14	select GENERIC_IRQ_SHOW
15	select GENERIC_PCI_IOMAP
16	select GENERIC_SCHED_CLOCK
17	select HAVE_EXIT_THREAD
18	select HAVE_FUNCTION_TRACER
19	select HAVE_IRQ_TIME_ACCOUNTING
20	select HAVE_OPROFILE
21	select HAVE_PERF_EVENTS
22	select IRQ_DOMAIN
23	select MODULES_USE_ELF_RELA
24	select VIRT_TO_BUS
25	help
26	  Xtensa processors are 32-bit RISC machines designed by Tensilica
27	  primarily for embedded systems.  These processors are both
28	  configurable and extensible.  The Linux port to the Xtensa
29	  architecture supports all processor configurations and extensions,
30	  with reasonable minimum requirements.  The Xtensa Linux project has
31	  a home page at <http://www.linux-xtensa.org/>.
32
33config RWSEM_XCHGADD_ALGORITHM
34	def_bool y
35
36config GENERIC_HWEIGHT
37	def_bool y
38
39config ARCH_HAS_ILOG2_U32
40	def_bool n
41
42config ARCH_HAS_ILOG2_U64
43	def_bool n
44
45config NO_IOPORT_MAP
46	def_bool n
47
48config HZ
49	int
50	default 100
51
52source "init/Kconfig"
53source "kernel/Kconfig.freezer"
54
55config LOCKDEP_SUPPORT
56	def_bool y
57
58config STACKTRACE_SUPPORT
59	def_bool y
60
61config TRACE_IRQFLAGS_SUPPORT
62	def_bool y
63
64config MMU
65	bool
66	default n if !XTENSA_VARIANT_CUSTOM
67	default XTENSA_VARIANT_MMU if XTENSA_VARIANT_CUSTOM
68
69config VARIANT_IRQ_SWITCH
70	def_bool n
71
72config HAVE_XTENSA_GPIO32
73	def_bool n
74
75config MAY_HAVE_SMP
76	def_bool n
77
78menu "Processor type and features"
79
80choice
81	prompt "Xtensa Processor Configuration"
82	default XTENSA_VARIANT_FSF
83
84config XTENSA_VARIANT_FSF
85	bool "fsf - default (not generic) configuration"
86	select MMU
87
88config XTENSA_VARIANT_DC232B
89	bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
90	select MMU
91	select HAVE_XTENSA_GPIO32
92	help
93	  This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE).
94
95config XTENSA_VARIANT_DC233C
96	bool "dc233c - Diamond 233L Standard Core Rev.C (LE)"
97	select MMU
98	select HAVE_XTENSA_GPIO32
99	help
100	  This variant refers to Tensilica's Diamond 233L Standard core Rev.C (LE).
101
102config XTENSA_VARIANT_S6000
103	bool "s6000 - Stretch software configurable processor"
104	select VARIANT_IRQ_SWITCH
105	select ARCH_REQUIRE_GPIOLIB
106	select XTENSA_CALIBRATE_CCOUNT
107
108config XTENSA_VARIANT_CUSTOM
109	bool "Custom Xtensa processor configuration"
110	select MAY_HAVE_SMP
111	select HAVE_XTENSA_GPIO32
112	help
113	  Select this variant to use a custom Xtensa processor configuration.
114	  You will be prompted for a processor variant CORENAME.
115endchoice
116
117config XTENSA_VARIANT_CUSTOM_NAME
118	string "Xtensa Processor Custom Core Variant Name"
119	depends on XTENSA_VARIANT_CUSTOM
120	help
121	  Provide the name of a custom Xtensa processor variant.
122	  This CORENAME selects arch/xtensa/variant/CORENAME.
123	  Dont forget you have to select MMU if you have one.
124
125config XTENSA_VARIANT_NAME
126	string
127	default "dc232b"			if XTENSA_VARIANT_DC232B
128	default "dc233c"			if XTENSA_VARIANT_DC233C
129	default "fsf"				if XTENSA_VARIANT_FSF
130	default "s6000"				if XTENSA_VARIANT_S6000
131	default XTENSA_VARIANT_CUSTOM_NAME	if XTENSA_VARIANT_CUSTOM
132
133config XTENSA_VARIANT_MMU
134	bool "Core variant has a Full MMU (TLB, Pages, Protection, etc)"
135	depends on XTENSA_VARIANT_CUSTOM
136	default y
137	help
138	  Build a Conventional Kernel with full MMU support,
139	  ie: it supports a TLB with auto-loading, page protection.
140
141config XTENSA_UNALIGNED_USER
142	bool "Unaligned memory access in use space"
143	help
144	  The Xtensa architecture currently does not handle unaligned
145	  memory accesses in hardware but through an exception handler.
146	  Per default, unaligned memory accesses are disabled in user space.
147
148	  Say Y here to enable unaligned memory access in user space.
149
150source "kernel/Kconfig.preempt"
151
152config HAVE_SMP
153	bool "System Supports SMP (MX)"
154	depends on MAY_HAVE_SMP
155	select XTENSA_MX
156	help
157	  This option is use to indicate that the system-on-a-chip (SOC)
158	  supports Multiprocessing. Multiprocessor support implemented above
159	  the CPU core definition and currently needs to be selected manually.
160
161	  Multiprocessor support in implemented with external cache and
162	  interrupt controlers.
163
164	  The MX interrupt distributer adds Interprocessor Interrupts
165	  and causes the IRQ numbers to be increased by 4 for devices
166	  like the open cores ethernet driver and the serial interface.
167
168	  You still have to select "Enable SMP" to enable SMP on this SOC.
169
170config SMP
171	bool "Enable Symmetric multi-processing support"
172	depends on HAVE_SMP
173	select GENERIC_SMP_IDLE_THREAD
174	help
175	  Enabled SMP Software; allows more than one CPU/CORE
176	  to be activated during startup.
177
178config NR_CPUS
179	depends on SMP
180	int "Maximum number of CPUs (2-32)"
181	range 2 32
182	default "4"
183
184config HOTPLUG_CPU
185	bool "Enable CPU hotplug support"
186	depends on SMP
187	help
188	  Say Y here to allow turning CPUs off and on. CPUs can be
189	  controlled through /sys/devices/system/cpu.
190
191	  Say N if you want to disable CPU hotplug.
192
193config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
194	bool "Initialize Xtensa MMU inside the Linux kernel code"
195	depends on MMU
196	default y
197	help
198	  Earlier version initialized the MMU in the exception vector
199	  before jumping to _startup in head.S and had an advantage that
200	  it was possible to place a software breakpoint at 'reset' and
201	  then enter your normal kernel breakpoints once the MMU was mapped
202	  to the kernel mappings (0XC0000000).
203
204	  This unfortunately doesn't work for U-Boot and likley also wont
205	  work for using KEXEC to have a hot kernel ready for doing a
206	  KDUMP.
207
208	  So now the MMU is initialized in head.S but it's necessary to
209	  use hardware breakpoints (gdb 'hbreak' cmd) to break at _startup.
210	  xt-gdb can't place a Software Breakpoint in the  0XD region prior
211	  to mapping the MMU and after mapping even if the area of low memory
212	  was mapped gdb wouldn't remove the breakpoint on hitting it as the
213	  PC wouldn't match. Since Hardware Breakpoints are recommended for
214	  Linux configurations it seems reasonable to just assume they exist
215	  and leave this older mechanism for unfortunate souls that choose
216	  not to follow Tensilica's recommendation.
217
218	  Selecting this will cause U-Boot to set the KERNEL Load and Entry
219	  address at 0x00003000 instead of the mapped std of 0xD0003000.
220
221	  If in doubt, say Y.
222
223config HIGHMEM
224	bool "High Memory Support"
225	depends on MMU
226	help
227	  Linux can use the full amount of RAM in the system by
228	  default. However, the default MMUv2 setup only maps the
229	  lowermost 128 MB of memory linearly to the areas starting
230	  at 0xd0000000 (cached) and 0xd8000000 (uncached).
231	  When there are more than 128 MB memory in the system not
232	  all of it can be "permanently mapped" by the kernel.
233	  The physical memory that's not permanently mapped is called
234	  "high memory".
235
236	  If you are compiling a kernel which will never run on a
237	  machine with more than 128 MB total physical RAM, answer
238	  N here.
239
240	  If unsure, say Y.
241
242config FAST_SYSCALL_XTENSA
243	bool "Enable fast atomic syscalls"
244	default n
245	help
246	  fast_syscall_xtensa is a syscall that can make atomic operations
247	  on UP kernel when processor has no s32c1i support.
248
249	  This syscall is deprecated. It may have issues when called with
250	  invalid arguments. It is provided only for backwards compatibility.
251	  Only enable it if your userspace software requires it.
252
253	  If unsure, say N.
254
255config FAST_SYSCALL_SPILL_REGISTERS
256	bool "Enable spill registers syscall"
257	default n
258	help
259	  fast_syscall_spill_registers is a syscall that spills all active
260	  register windows of a calling userspace task onto its stack.
261
262	  This syscall is deprecated. It may have issues when called with
263	  invalid arguments. It is provided only for backwards compatibility.
264	  Only enable it if your userspace software requires it.
265
266	  If unsure, say N.
267
268endmenu
269
270config XTENSA_CALIBRATE_CCOUNT
271	def_bool n
272	help
273	  On some platforms (XT2000, for example), the CPU clock rate can
274	  vary.  The frequency can be determined, however, by measuring
275	  against a well known, fixed frequency, such as an UART oscillator.
276
277config SERIAL_CONSOLE
278	def_bool n
279
280menu "Bus options"
281
282config PCI
283	bool "PCI support"
284	default y
285	help
286	  Find out whether you have a PCI motherboard. PCI is the name of a
287	  bus system, i.e. the way the CPU talks to the other stuff inside
288	  your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
289	  VESA. If you have PCI, say Y, otherwise N.
290
291source "drivers/pci/Kconfig"
292
293endmenu
294
295menu "Platform options"
296
297choice
298	prompt "Xtensa System Type"
299	default XTENSA_PLATFORM_ISS
300
301config XTENSA_PLATFORM_ISS
302	bool "ISS"
303	select XTENSA_CALIBRATE_CCOUNT
304	select SERIAL_CONSOLE
305	help
306	  ISS is an acronym for Tensilica's Instruction Set Simulator.
307
308config XTENSA_PLATFORM_XT2000
309	bool "XT2000"
310	select HAVE_IDE
311	help
312	  XT2000 is the name of Tensilica's feature-rich emulation platform.
313	  This hardware is capable of running a full Linux distribution.
314
315config XTENSA_PLATFORM_S6105
316	bool "S6105"
317	select HAVE_IDE
318	select SERIAL_CONSOLE
319	select NO_IOPORT_MAP
320
321config XTENSA_PLATFORM_XTFPGA
322	bool "XTFPGA"
323	select ETHOC if ETHERNET
324	select SERIAL_CONSOLE
325	select XTENSA_CALIBRATE_CCOUNT
326	help
327	  XTFPGA is the name of Tensilica board family (LX60, LX110, LX200, ML605).
328	  This hardware is capable of running a full Linux distribution.
329
330endchoice
331
332
333config XTENSA_CPU_CLOCK
334	int "CPU clock rate [MHz]"
335	depends on !XTENSA_CALIBRATE_CCOUNT
336	default 16
337
338config GENERIC_CALIBRATE_DELAY
339	bool "Auto calibration of the BogoMIPS value"
340	help
341	  The BogoMIPS value can easily be derived from the CPU frequency.
342
343config CMDLINE_BOOL
344	bool "Default bootloader kernel arguments"
345
346config CMDLINE
347	string "Initial kernel command string"
348	depends on CMDLINE_BOOL
349	default "console=ttyS0,38400 root=/dev/ram"
350	help
351	  On some architectures (EBSA110 and CATS), there is currently no way
352	  for the boot loader to pass arguments to the kernel. For these
353	  architectures, you should supply some command-line options at build
354	  time by entering them here. As a minimum, you should specify the
355	  memory size and the root device (e.g., mem=64M root=/dev/nfs).
356
357config USE_OF
358	bool "Flattened Device Tree support"
359	select OF
360	select OF_EARLY_FLATTREE
361	help
362	  Include support for flattened device tree machine descriptions.
363
364config BUILTIN_DTB
365	string "DTB to build into the kernel image"
366	depends on OF
367
368config BLK_DEV_SIMDISK
369	tristate "Host file-based simulated block device support"
370	default n
371	depends on XTENSA_PLATFORM_ISS && BLOCK
372	help
373	  Create block devices that map to files in the host file system.
374	  Device binding to host file may be changed at runtime via proc
375	  interface provided the device is not in use.
376
377config BLK_DEV_SIMDISK_COUNT
378	int "Number of host file-based simulated block devices"
379	range 1 10
380	depends on BLK_DEV_SIMDISK
381	default 2
382	help
383	  This is the default minimal number of created block devices.
384	  Kernel/module parameter 'simdisk_count' may be used to change this
385	  value at runtime. More file names (but no more than 10) may be
386	  specified as parameters, simdisk_count grows accordingly.
387
388config SIMDISK0_FILENAME
389	string "Host filename for the first simulated device"
390	depends on BLK_DEV_SIMDISK = y
391	default ""
392	help
393	  Attach a first simdisk to a host file. Conventionally, this file
394	  contains a root file system.
395
396config SIMDISK1_FILENAME
397	string "Host filename for the second simulated device"
398	depends on BLK_DEV_SIMDISK = y && BLK_DEV_SIMDISK_COUNT != 1
399	default ""
400	help
401	  Another simulated disk in a host file for a buildroot-independent
402	  storage.
403
404source "mm/Kconfig"
405
406source "drivers/pcmcia/Kconfig"
407
408source "drivers/pci/hotplug/Kconfig"
409
410config XTFPGA_LCD
411	bool "Enable XTFPGA LCD driver"
412	depends on XTENSA_PLATFORM_XTFPGA
413	default n
414	help
415	  There's a 2x16 LCD on most of XTFPGA boards, kernel may output
416	  progress messages there during bootup/shutdown. It may be useful
417	  during board bringup.
418
419	  If unsure, say N.
420
421config XTFPGA_LCD_BASE_ADDR
422	hex "XTFPGA LCD base address"
423	depends on XTFPGA_LCD
424	default "0x0d0c0000"
425	help
426	  Base address of the LCD controller inside KIO region.
427	  Different boards from XTFPGA family have LCD controller at different
428	  addresses. Please consult prototyping user guide for your board for
429	  the correct address. Wrong address here may lead to hardware lockup.
430
431config XTFPGA_LCD_8BIT_ACCESS
432	bool "Use 8-bit access to XTFPGA LCD"
433	depends on XTFPGA_LCD
434	default n
435	help
436	  LCD may be connected with 4- or 8-bit interface, 8-bit access may
437	  only be used with 8-bit interface. Please consult prototyping user
438	  guide for your board for the correct interface width.
439
440config XTFPGA_LCD
441	bool "Enable XTFPGA LCD driver"
442	depends on XTENSA_PLATFORM_XTFPGA
443	default n
444	help
445	  There's a 2x16 LCD on most of XTFPGA boards, kernel may output
446	  progress messages there during bootup/shutdown. It may be useful
447	  during board bringup.
448
449	  If unsure, say N.
450
451config XTFPGA_LCD_BASE_ADDR
452	hex "XTFPGA LCD base address"
453	depends on XTFPGA_LCD
454	default "0x0d0c0000"
455	help
456	  Base address of the LCD controller inside KIO region.
457	  Different boards from XTFPGA family have LCD controller at different
458	  addresses. Please consult prototyping user guide for your board for
459	  the correct address. Wrong address here may lead to hardware lockup.
460
461config XTFPGA_LCD_8BIT_ACCESS
462	bool "Use 8-bit access to XTFPGA LCD"
463	depends on XTFPGA_LCD
464	default n
465	help
466	  LCD may be connected with 4- or 8-bit interface, 8-bit access may
467	  only be used with 8-bit interface. Please consult prototyping user
468	  guide for your board for the correct interface width.
469
470endmenu
471
472menu "Executable file formats"
473
474source "fs/Kconfig.binfmt"
475
476endmenu
477
478source "net/Kconfig"
479
480source "drivers/Kconfig"
481
482source "fs/Kconfig"
483
484source "arch/xtensa/Kconfig.debug"
485
486source "security/Kconfig"
487
488source "crypto/Kconfig"
489
490source "lib/Kconfig"
491
492
493