1 /* 2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc. 3 * All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; either version 2 of the License, or 8 * (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program; if not, write to the Free Software Foundation, Inc., 17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * File: desc.h 20 * 21 * Purpose:The header file of descriptor 22 * 23 * Revision History: 24 * 25 * Author: Tevin Chen 26 * 27 * Date: May 21, 1996 28 * 29 */ 30 31 #ifndef __DESC_H__ 32 #define __DESC_H__ 33 34 #include <linux/types.h> 35 #include <linux/mm.h> 36 #include "linux/ieee80211.h" 37 #include "ttype.h" 38 #include "tether.h" 39 40 #define B_OWNED_BY_CHIP 1 41 #define B_OWNED_BY_HOST 0 42 43 // 44 // Bits in the RSR register 45 // 46 #define RSR_ADDRBROAD 0x80 47 #define RSR_ADDRMULTI 0x40 48 #define RSR_ADDRUNI 0x00 49 #define RSR_IVLDTYP 0x20 50 #define RSR_IVLDLEN 0x10 // invalid len (> 2312 byte) 51 #define RSR_BSSIDOK 0x08 52 #define RSR_CRCOK 0x04 53 #define RSR_BCNSSIDOK 0x02 54 #define RSR_ADDROK 0x01 55 56 // 57 // Bits in the new RSR register 58 // 59 #define NEWRSR_DECRYPTOK 0x10 60 #define NEWRSR_CFPIND 0x08 61 #define NEWRSR_HWUTSF 0x04 62 #define NEWRSR_BCNHITAID 0x02 63 #define NEWRSR_BCNHITAID0 0x01 64 65 // 66 // Bits in the TSR0 register 67 // 68 #define TSR0_PWRSTS1_2 0xC0 69 #define TSR0_PWRSTS7 0x20 70 #define TSR0_NCR 0x1F 71 72 // 73 // Bits in the TSR1 register 74 // 75 #define TSR1_TERR 0x80 76 #define TSR1_PWRSTS4_6 0x70 77 #define TSR1_RETRYTMO 0x08 78 #define TSR1_TMO 0x04 79 #define TSR1_PWRSTS3 0x02 80 #define ACK_DATA 0x01 81 82 // 83 // Bits in the TCR register 84 // 85 #define EDMSDU 0x04 // end of sdu 86 #define TCR_EDP 0x02 // end of packet 87 #define TCR_STP 0x01 // start of packet 88 89 // max transmit or receive buffer size 90 #define CB_MAX_BUF_SIZE 2900U 91 // NOTE: must be multiple of 4 92 #define CB_MAX_TX_BUF_SIZE CB_MAX_BUF_SIZE 93 #define CB_MAX_RX_BUF_SIZE_NORMAL CB_MAX_BUF_SIZE 94 95 #define CB_BEACON_BUF_SIZE 512U 96 97 #define CB_MAX_RX_DESC 128 98 #define CB_MIN_RX_DESC 16 99 #define CB_MAX_TX_DESC 64 100 #define CB_MIN_TX_DESC 16 101 102 #define CB_MAX_RECEIVED_PACKETS 16 103 // limit our receive routine to indicating 104 // this many at a time for 2 reasons: 105 // 1. driver flow control to protocol layer 106 // 2. limit the time used in ISR routine 107 108 #define CB_EXTRA_RD_NUM 32 109 #define CB_RD_NUM 32 110 #define CB_TD_NUM 32 111 112 // max number of physical segments 113 // in a single NDIS packet. Above this threshold, the packet 114 // is copied into a single physically contiguous buffer 115 #define CB_MAX_SEGMENT 4 116 117 #define CB_MIN_MAP_REG_NUM 4 118 #define CB_MAX_MAP_REG_NUM CB_MAX_TX_DESC 119 120 #define CB_PROTOCOL_RESERVED_SECTION 16 121 122 // if retrys excess 15 times , tx will abort, and 123 // if tx fifo underflow, tx will fail 124 // we should try to resend it 125 #define CB_MAX_TX_ABORT_RETRY 3 126 127 #ifdef __BIG_ENDIAN 128 129 // WMAC definition FIFO Control 130 #define FIFOCTL_AUTO_FB_1 0x0010 131 #define FIFOCTL_AUTO_FB_0 0x0008 132 #define FIFOCTL_GRPACK 0x0004 133 #define FIFOCTL_11GA 0x0003 134 #define FIFOCTL_11GB 0x0002 135 #define FIFOCTL_11B 0x0001 136 #define FIFOCTL_11A 0x0000 137 #define FIFOCTL_RTS 0x8000 138 #define FIFOCTL_ISDMA0 0x4000 139 #define FIFOCTL_GENINT 0x2000 140 #define FIFOCTL_TMOEN 0x1000 141 #define FIFOCTL_LRETRY 0x0800 142 #define FIFOCTL_CRCDIS 0x0400 143 #define FIFOCTL_NEEDACK 0x0200 144 #define FIFOCTL_LHEAD 0x0100 145 146 //WMAC definition Frag Control 147 #define FRAGCTL_AES 0x0003 148 #define FRAGCTL_TKIP 0x0002 149 #define FRAGCTL_LEGACY 0x0001 150 #define FRAGCTL_NONENCRYPT 0x0000 151 #define FRAGCTL_ENDFRAG 0x0300 152 #define FRAGCTL_MIDFRAG 0x0200 153 #define FRAGCTL_STAFRAG 0x0100 154 #define FRAGCTL_NONFRAG 0x0000 155 156 #else 157 158 #define FIFOCTL_AUTO_FB_1 0x1000 159 #define FIFOCTL_AUTO_FB_0 0x0800 160 #define FIFOCTL_GRPACK 0x0400 161 #define FIFOCTL_11GA 0x0300 162 #define FIFOCTL_11GB 0x0200 163 #define FIFOCTL_11B 0x0100 164 #define FIFOCTL_11A 0x0000 165 #define FIFOCTL_RTS 0x0080 166 #define FIFOCTL_ISDMA0 0x0040 167 #define FIFOCTL_GENINT 0x0020 168 #define FIFOCTL_TMOEN 0x0010 169 #define FIFOCTL_LRETRY 0x0008 170 #define FIFOCTL_CRCDIS 0x0004 171 #define FIFOCTL_NEEDACK 0x0002 172 #define FIFOCTL_LHEAD 0x0001 173 174 //WMAC definition Frag Control 175 #define FRAGCTL_AES 0x0300 176 #define FRAGCTL_TKIP 0x0200 177 #define FRAGCTL_LEGACY 0x0100 178 #define FRAGCTL_NONENCRYPT 0x0000 179 #define FRAGCTL_ENDFRAG 0x0003 180 #define FRAGCTL_MIDFRAG 0x0002 181 #define FRAGCTL_STAFRAG 0x0001 182 #define FRAGCTL_NONFRAG 0x0000 183 184 #endif 185 186 #define TYPE_TXDMA0 0 187 #define TYPE_AC0DMA 1 188 #define TYPE_ATIMDMA 2 189 #define TYPE_SYNCDMA 3 190 #define TYPE_MAXTD 2 191 192 #define TYPE_BEACONDMA 4 193 194 #define TYPE_RXDMA0 0 195 #define TYPE_RXDMA1 1 196 #define TYPE_MAXRD 2 197 198 // TD_INFO flags control bit 199 #define TD_FLAGS_NETIF_SKB 0x01 // check if need release skb 200 #define TD_FLAGS_PRIV_SKB 0x02 // check if called from private skb(hostap) 201 #define TD_FLAGS_PS_RETRY 0x04 // check if PS STA frame re-transmit 202 203 // ref_sk_buff is used for mapping the skb structure between pre-built driver-obj & running kernel. 204 // Since different kernel version (2.4x) may change skb structure, i.e. pre-built driver-obj 205 // may link to older skb that leads error. 206 207 typedef struct tagDEVICE_RD_INFO { 208 struct sk_buff *skb; 209 dma_addr_t skb_dma; 210 dma_addr_t curr_desc; 211 } DEVICE_RD_INFO, *PDEVICE_RD_INFO; 212 213 #ifdef __BIG_ENDIAN 214 215 typedef struct tagRDES0 { 216 volatile unsigned short wResCount; 217 union { 218 volatile u16 f15Reserved; 219 struct { 220 volatile u8 f8Reserved1; 221 volatile u8 f1Owner:1; 222 volatile u8 f7Reserved:7; 223 } __attribute__ ((__packed__)); 224 } __attribute__ ((__packed__)); 225 } __attribute__ ((__packed__)) 226 SRDES0, *PSRDES0; 227 228 #else 229 230 typedef struct tagRDES0 { 231 unsigned short wResCount; 232 unsigned short f15Reserved:15; 233 unsigned short f1Owner:1; 234 } __attribute__ ((__packed__)) 235 SRDES0; 236 237 #endif 238 239 typedef struct tagRDES1 { 240 unsigned short wReqCount; 241 unsigned short wReserved; 242 } __attribute__ ((__packed__)) 243 SRDES1; 244 245 // 246 // Rx descriptor 247 // 248 typedef struct tagSRxDesc { 249 volatile SRDES0 m_rd0RD0; 250 volatile SRDES1 m_rd1RD1; 251 volatile u32 buff_addr; 252 volatile u32 next_desc; 253 struct tagSRxDesc *next __aligned(8); 254 volatile PDEVICE_RD_INFO pRDInfo __aligned(8); 255 } __attribute__ ((__packed__)) 256 SRxDesc, *PSRxDesc; 257 typedef const SRxDesc *PCSRxDesc; 258 259 #ifdef __BIG_ENDIAN 260 261 typedef struct tagTDES0 { 262 volatile unsigned char byTSR0; 263 volatile unsigned char byTSR1; 264 union { 265 volatile u16 f15Txtime; 266 struct { 267 volatile u8 f8Reserved1; 268 volatile u8 f1Owner:1; 269 volatile u8 f7Reserved:7; 270 } __attribute__ ((__packed__)); 271 } __attribute__ ((__packed__)); 272 } __attribute__ ((__packed__)) 273 STDES0, PSTDES0; 274 275 #else 276 277 typedef struct tagTDES0 { 278 volatile unsigned char byTSR0; 279 volatile unsigned char byTSR1; 280 volatile unsigned short f15Txtime:15; 281 volatile unsigned short f1Owner:1; 282 } __attribute__ ((__packed__)) 283 STDES0; 284 285 #endif 286 287 typedef struct tagTDES1 { 288 volatile unsigned short wReqCount; 289 volatile unsigned char byTCR; 290 volatile unsigned char byReserved; 291 } __attribute__ ((__packed__)) 292 STDES1; 293 294 typedef struct tagDEVICE_TD_INFO { 295 struct sk_buff *skb; 296 unsigned char *buf; 297 dma_addr_t skb_dma; 298 dma_addr_t buf_dma; 299 dma_addr_t curr_desc; 300 unsigned long dwReqCount; 301 unsigned long dwHeaderLength; 302 unsigned char byFlags; 303 } DEVICE_TD_INFO, *PDEVICE_TD_INFO; 304 305 // 306 // transmit descriptor 307 // 308 typedef struct tagSTxDesc { 309 volatile STDES0 m_td0TD0; 310 volatile STDES1 m_td1TD1; 311 volatile u32 buff_addr; 312 volatile u32 next_desc; 313 struct tagSTxDesc *next __aligned(8); 314 volatile PDEVICE_TD_INFO pTDInfo __aligned(8); 315 } __attribute__ ((__packed__)) 316 STxDesc, *PSTxDesc; 317 typedef const STxDesc *PCSTxDesc; 318 319 typedef struct tagSTxSyncDesc { 320 volatile STDES0 m_td0TD0; 321 volatile STDES1 m_td1TD1; 322 volatile u32 buff_addr; // pointer to logical buffer 323 volatile u32 next_desc; // pointer to next logical descriptor 324 volatile unsigned short m_wFIFOCtl; 325 volatile unsigned short m_wTimeStamp; 326 struct tagSTxSyncDesc *next __aligned(8); 327 volatile PDEVICE_TD_INFO pTDInfo __aligned(8); 328 } __attribute__ ((__packed__)) 329 STxSyncDesc, *PSTxSyncDesc; 330 typedef const STxSyncDesc *PCSTxSyncDesc; 331 332 // 333 // RsvTime buffer header 334 // 335 typedef struct tagSRrvTime_atim { 336 unsigned short wCTSTxRrvTime_ba; 337 unsigned short wTxRrvTime_a; 338 } __attribute__ ((__packed__)) 339 SRrvTime_atim, *PSRrvTime_atim; 340 typedef const SRrvTime_atim *PCSRrvTime_atim; 341 342 /* Length, Service, and Signal fields of Phy for Tx */ 343 struct vnt_phy_field { 344 u8 signal; 345 u8 service; 346 __le16 len; 347 } __packed; 348 349 union vnt_phy_field_swap { 350 struct vnt_phy_field field_read; 351 u16 swap[2]; 352 u32 field_write; 353 }; 354 355 // 356 // Tx FIFO header 357 // 358 typedef struct tagSTxBufHead { 359 u32 adwTxKey[4]; 360 unsigned short wFIFOCtl; 361 unsigned short wTimeStamp; 362 unsigned short wFragCtl; 363 unsigned char byTxPower; 364 unsigned char wReserved; 365 } __attribute__ ((__packed__)) 366 STxBufHead, *PSTxBufHead; 367 typedef const STxBufHead *PCSTxBufHead; 368 369 typedef struct tagSBEACONCtl { 370 u32 BufReady:1; 371 u32 TSF:15; 372 u32 BufLen:11; 373 u32 Reserved:5; 374 } __attribute__ ((__packed__)) 375 SBEACONCtl; 376 377 typedef struct tagSSecretKey { 378 u32 dwLowDword; 379 unsigned char byHighByte; 380 } __attribute__ ((__packed__)) 381 SSecretKey; 382 383 typedef struct tagSKeyEntry { 384 unsigned char abyAddrHi[2]; 385 unsigned short wKCTL; 386 unsigned char abyAddrLo[4]; 387 u32 dwKey0[4]; 388 u32 dwKey1[4]; 389 u32 dwKey2[4]; 390 u32 dwKey3[4]; 391 u32 dwKey4[4]; 392 } __attribute__ ((__packed__)) 393 SKeyEntry; 394 395 #endif // __DESC_H__ 396