1 /*
2 * This file is part of wlcore
3 *
4 * Copyright (C) 2011 Texas Instruments Inc.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22 #ifndef __WLCORE_H__
23 #define __WLCORE_H__
24
25 #include <linux/platform_device.h>
26
27 #include "wlcore_i.h"
28 #include "event.h"
29 #include "boot.h"
30
31 /* The maximum number of Tx descriptors in all chip families */
32 #define WLCORE_MAX_TX_DESCRIPTORS 32
33
34 /*
35 * We always allocate this number of mac addresses. If we don't
36 * have enough allocated addresses, the LAA bit is used
37 */
38 #define WLCORE_NUM_MAC_ADDRESSES 3
39
40 /* wl12xx/wl18xx maximum transmission power (in dBm) */
41 #define WLCORE_MAX_TXPWR 25
42
43 /* forward declaration */
44 struct wl1271_tx_hw_descr;
45 enum wl_rx_buf_align;
46 struct wl1271_rx_descriptor;
47
48 struct wlcore_ops {
49 int (*setup)(struct wl1271 *wl);
50 int (*identify_chip)(struct wl1271 *wl);
51 int (*identify_fw)(struct wl1271 *wl);
52 int (*boot)(struct wl1271 *wl);
53 int (*plt_init)(struct wl1271 *wl);
54 int (*trigger_cmd)(struct wl1271 *wl, int cmd_box_addr,
55 void *buf, size_t len);
56 int (*ack_event)(struct wl1271 *wl);
57 int (*wait_for_event)(struct wl1271 *wl, enum wlcore_wait_event event,
58 bool *timeout);
59 int (*process_mailbox_events)(struct wl1271 *wl);
60 u32 (*calc_tx_blocks)(struct wl1271 *wl, u32 len, u32 spare_blks);
61 void (*set_tx_desc_blocks)(struct wl1271 *wl,
62 struct wl1271_tx_hw_descr *desc,
63 u32 blks, u32 spare_blks);
64 void (*set_tx_desc_data_len)(struct wl1271 *wl,
65 struct wl1271_tx_hw_descr *desc,
66 struct sk_buff *skb);
67 enum wl_rx_buf_align (*get_rx_buf_align)(struct wl1271 *wl,
68 u32 rx_desc);
69 int (*prepare_read)(struct wl1271 *wl, u32 rx_desc, u32 len);
70 u32 (*get_rx_packet_len)(struct wl1271 *wl, void *rx_data,
71 u32 data_len);
72 int (*tx_delayed_compl)(struct wl1271 *wl);
73 void (*tx_immediate_compl)(struct wl1271 *wl);
74 int (*hw_init)(struct wl1271 *wl);
75 int (*init_vif)(struct wl1271 *wl, struct wl12xx_vif *wlvif);
76 void (*convert_fw_status)(struct wl1271 *wl, void *raw_fw_status,
77 struct wl_fw_status *fw_status);
78 u32 (*sta_get_ap_rate_mask)(struct wl1271 *wl,
79 struct wl12xx_vif *wlvif);
80 int (*get_pg_ver)(struct wl1271 *wl, s8 *ver);
81 int (*get_mac)(struct wl1271 *wl);
82 void (*set_tx_desc_csum)(struct wl1271 *wl,
83 struct wl1271_tx_hw_descr *desc,
84 struct sk_buff *skb);
85 void (*set_rx_csum)(struct wl1271 *wl,
86 struct wl1271_rx_descriptor *desc,
87 struct sk_buff *skb);
88 u32 (*ap_get_mimo_wide_rate_mask)(struct wl1271 *wl,
89 struct wl12xx_vif *wlvif);
90 int (*debugfs_init)(struct wl1271 *wl, struct dentry *rootdir);
91 int (*handle_static_data)(struct wl1271 *wl,
92 struct wl1271_static_data *static_data);
93 int (*scan_start)(struct wl1271 *wl, struct wl12xx_vif *wlvif,
94 struct cfg80211_scan_request *req);
95 int (*scan_stop)(struct wl1271 *wl, struct wl12xx_vif *wlvif);
96 int (*sched_scan_start)(struct wl1271 *wl, struct wl12xx_vif *wlvif,
97 struct cfg80211_sched_scan_request *req,
98 struct ieee80211_scan_ies *ies);
99 void (*sched_scan_stop)(struct wl1271 *wl, struct wl12xx_vif *wlvif);
100 int (*get_spare_blocks)(struct wl1271 *wl, bool is_gem);
101 int (*set_key)(struct wl1271 *wl, enum set_key_cmd cmd,
102 struct ieee80211_vif *vif,
103 struct ieee80211_sta *sta,
104 struct ieee80211_key_conf *key_conf);
105 int (*channel_switch)(struct wl1271 *wl,
106 struct wl12xx_vif *wlvif,
107 struct ieee80211_channel_switch *ch_switch);
108 u32 (*pre_pkt_send)(struct wl1271 *wl, u32 buf_offset, u32 last_len);
109 void (*sta_rc_update)(struct wl1271 *wl, struct wl12xx_vif *wlvif,
110 struct ieee80211_sta *sta, u32 changed);
111 int (*set_peer_cap)(struct wl1271 *wl,
112 struct ieee80211_sta_ht_cap *ht_cap,
113 bool allow_ht_operation,
114 u32 rate_set, u8 hlid);
115 u32 (*convert_hwaddr)(struct wl1271 *wl, u32 hwaddr);
116 bool (*lnk_high_prio)(struct wl1271 *wl, u8 hlid,
117 struct wl1271_link *lnk);
118 bool (*lnk_low_prio)(struct wl1271 *wl, u8 hlid,
119 struct wl1271_link *lnk);
120 int (*smart_config_start)(struct wl1271 *wl, u32 group_bitmap);
121 int (*smart_config_stop)(struct wl1271 *wl);
122 int (*smart_config_set_group_key)(struct wl1271 *wl, u16 group_id,
123 u8 key_len, u8 *key);
124 int (*set_cac)(struct wl1271 *wl, struct wl12xx_vif *wlvif,
125 bool start);
126 };
127
128 enum wlcore_partitions {
129 PART_DOWN,
130 PART_WORK,
131 PART_BOOT,
132 PART_DRPW,
133 PART_TOP_PRCM_ELP_SOC,
134 PART_PHY_INIT,
135
136 PART_TABLE_LEN,
137 };
138
139 struct wlcore_partition {
140 u32 size;
141 u32 start;
142 };
143
144 struct wlcore_partition_set {
145 struct wlcore_partition mem;
146 struct wlcore_partition reg;
147 struct wlcore_partition mem2;
148 struct wlcore_partition mem3;
149 };
150
151 enum wlcore_registers {
152 /* register addresses, used with partition translation */
153 REG_ECPU_CONTROL,
154 REG_INTERRUPT_NO_CLEAR,
155 REG_INTERRUPT_ACK,
156 REG_COMMAND_MAILBOX_PTR,
157 REG_EVENT_MAILBOX_PTR,
158 REG_INTERRUPT_TRIG,
159 REG_INTERRUPT_MASK,
160 REG_PC_ON_RECOVERY,
161 REG_CHIP_ID_B,
162 REG_CMD_MBOX_ADDRESS,
163
164 /* data access memory addresses, used with partition translation */
165 REG_SLV_MEM_DATA,
166 REG_SLV_REG_DATA,
167
168 /* raw data access memory addresses */
169 REG_RAW_FW_STATUS_ADDR,
170
171 REG_TABLE_LEN,
172 };
173
174 struct wl1271_stats {
175 void *fw_stats;
176 unsigned long fw_stats_update;
177 size_t fw_stats_len;
178
179 unsigned int retry_count;
180 unsigned int excessive_retries;
181 };
182
183 struct wl1271 {
184 bool initialized;
185 struct ieee80211_hw *hw;
186 bool mac80211_registered;
187
188 struct device *dev;
189 struct platform_device *pdev;
190
191 void *if_priv;
192
193 struct wl1271_if_operations *if_ops;
194
195 int irq;
196
197 int irq_flags;
198
199 spinlock_t wl_lock;
200
201 enum wlcore_state state;
202 enum wl12xx_fw_type fw_type;
203 bool plt;
204 enum plt_mode plt_mode;
205 u8 fem_manuf;
206 u8 last_vif_count;
207 struct mutex mutex;
208
209 unsigned long flags;
210
211 struct wlcore_partition_set curr_part;
212
213 struct wl1271_chip chip;
214
215 int cmd_box_addr;
216
217 u8 *fw;
218 size_t fw_len;
219 void *nvs;
220 size_t nvs_len;
221
222 s8 hw_pg_ver;
223
224 /* address read from the fuse ROM */
225 u32 fuse_oui_addr;
226 u32 fuse_nic_addr;
227
228 /* we have up to 2 MAC addresses */
229 struct mac_address addresses[WLCORE_NUM_MAC_ADDRESSES];
230 int channel;
231 u8 system_hlid;
232
233 unsigned long links_map[BITS_TO_LONGS(WLCORE_MAX_LINKS)];
234 unsigned long roles_map[BITS_TO_LONGS(WL12XX_MAX_ROLES)];
235 unsigned long roc_map[BITS_TO_LONGS(WL12XX_MAX_ROLES)];
236 unsigned long rate_policies_map[
237 BITS_TO_LONGS(WL12XX_MAX_RATE_POLICIES)];
238 unsigned long klv_templates_map[
239 BITS_TO_LONGS(WLCORE_MAX_KLV_TEMPLATES)];
240
241 u8 session_ids[WLCORE_MAX_LINKS];
242
243 struct list_head wlvif_list;
244
245 u8 sta_count;
246 u8 ap_count;
247
248 struct wl1271_acx_mem_map *target_mem_map;
249
250 /* Accounting for allocated / available TX blocks on HW */
251 u32 tx_blocks_freed;
252 u32 tx_blocks_available;
253 u32 tx_allocated_blocks;
254 u32 tx_results_count;
255
256 /* Accounting for allocated / available Tx packets in HW */
257 u32 tx_pkts_freed[NUM_TX_QUEUES];
258 u32 tx_allocated_pkts[NUM_TX_QUEUES];
259
260 /* Transmitted TX packets counter for chipset interface */
261 u32 tx_packets_count;
262
263 /* Time-offset between host and chipset clocks */
264 s64 time_offset;
265
266 /* Frames scheduled for transmission, not handled yet */
267 int tx_queue_count[NUM_TX_QUEUES];
268 unsigned long queue_stop_reasons[
269 NUM_TX_QUEUES * WLCORE_NUM_MAC_ADDRESSES];
270
271 /* Frames received, not handled yet by mac80211 */
272 struct sk_buff_head deferred_rx_queue;
273
274 /* Frames sent, not returned yet to mac80211 */
275 struct sk_buff_head deferred_tx_queue;
276
277 struct work_struct tx_work;
278 struct workqueue_struct *freezable_wq;
279
280 /* Pending TX frames */
281 unsigned long tx_frames_map[BITS_TO_LONGS(WLCORE_MAX_TX_DESCRIPTORS)];
282 struct sk_buff *tx_frames[WLCORE_MAX_TX_DESCRIPTORS];
283 int tx_frames_cnt;
284
285 /* FW Rx counter */
286 u32 rx_counter;
287
288 /* Intermediate buffer, used for packet aggregation */
289 u8 *aggr_buf;
290 u32 aggr_buf_size;
291
292 /* Reusable dummy packet template */
293 struct sk_buff *dummy_packet;
294
295 /* Network stack work */
296 struct work_struct netstack_work;
297
298 /* FW log buffer */
299 u8 *fwlog;
300
301 /* Number of valid bytes in the FW log buffer */
302 ssize_t fwlog_size;
303
304 /* FW log end marker */
305 u32 fwlog_end;
306
307 /* FW memory block size */
308 u32 fw_mem_block_size;
309
310 /* Sysfs FW log entry readers wait queue */
311 wait_queue_head_t fwlog_waitq;
312
313 /* Hardware recovery work */
314 struct work_struct recovery_work;
315 bool watchdog_recovery;
316
317 /* Reg domain last configuration */
318 u32 reg_ch_conf_last[2];
319 /* Reg domain pending configuration */
320 u32 reg_ch_conf_pending[2];
321
322 /* Pointer that holds DMA-friendly block for the mailbox */
323 void *mbox;
324
325 /* The mbox event mask */
326 u32 event_mask;
327 /* events to unmask only when ap interface is up */
328 u32 ap_event_mask;
329
330 /* Mailbox pointers */
331 u32 mbox_size;
332 u32 mbox_ptr[2];
333
334 /* Are we currently scanning */
335 struct wl12xx_vif *scan_wlvif;
336 struct wl1271_scan scan;
337 struct delayed_work scan_complete_work;
338
339 struct ieee80211_vif *roc_vif;
340 struct delayed_work roc_complete_work;
341
342 struct wl12xx_vif *sched_vif;
343
344 /* The current band */
345 enum ieee80211_band band;
346
347 struct completion *elp_compl;
348 struct delayed_work elp_work;
349
350 /* in dBm */
351 int power_level;
352
353 struct wl1271_stats stats;
354
355 __le32 *buffer_32;
356 u32 buffer_cmd;
357 u32 buffer_busyword[WL1271_BUSY_WORD_CNT];
358
359 void *raw_fw_status;
360 struct wl_fw_status *fw_status;
361 struct wl1271_tx_hw_res_if *tx_res_if;
362
363 /* Current chipset configuration */
364 struct wlcore_conf conf;
365
366 bool sg_enabled;
367
368 bool enable_11a;
369
370 int recovery_count;
371
372 /* Most recently reported noise in dBm */
373 s8 noise;
374
375 /* bands supported by this instance of wl12xx */
376 struct ieee80211_supported_band bands[WLCORE_NUM_BANDS];
377
378 /*
379 * wowlan trigger was configured during suspend.
380 * (currently, only "ANY" trigger is supported)
381 */
382 bool wow_enabled;
383 bool irq_wake_enabled;
384
385 /*
386 * AP-mode - links indexed by HLID. The global and broadcast links
387 * are always active.
388 */
389 struct wl1271_link links[WLCORE_MAX_LINKS];
390
391 /* number of currently active links */
392 int active_link_count;
393
394 /* Fast/slow links bitmap according to FW */
395 unsigned long fw_fast_lnk_map;
396
397 /* AP-mode - a bitmap of links currently in PS mode according to FW */
398 unsigned long ap_fw_ps_map;
399
400 /* AP-mode - a bitmap of links currently in PS mode in mac80211 */
401 unsigned long ap_ps_map;
402
403 /* Quirks of specific hardware revisions */
404 unsigned int quirks;
405
406 /* number of currently active RX BA sessions */
407 int ba_rx_session_count;
408
409 /* Maximum number of supported RX BA sessions */
410 int ba_rx_session_count_max;
411
412 /* AP-mode - number of currently connected stations */
413 int active_sta_count;
414
415 /* Flag determining whether AP should broadcast OFDM-only rates */
416 bool ofdm_only_ap;
417
418 /* last wlvif we transmitted from */
419 struct wl12xx_vif *last_wlvif;
420
421 /* work to fire when Tx is stuck */
422 struct delayed_work tx_watchdog_work;
423
424 struct wlcore_ops *ops;
425 /* pointer to the lower driver partition table */
426 const struct wlcore_partition_set *ptable;
427 /* pointer to the lower driver register table */
428 const int *rtable;
429 /* name of the firmwares to load - for PLT, single role, multi-role */
430 const char *plt_fw_name;
431 const char *sr_fw_name;
432 const char *mr_fw_name;
433
434 u8 scan_templ_id_2_4;
435 u8 scan_templ_id_5;
436 u8 sched_scan_templ_id_2_4;
437 u8 sched_scan_templ_id_5;
438 u8 max_channels_5;
439
440 /* per-chip-family private structure */
441 void *priv;
442
443 /* number of TX descriptors the HW supports. */
444 u32 num_tx_desc;
445 /* number of RX descriptors the HW supports. */
446 u32 num_rx_desc;
447 /* number of links the HW supports */
448 u8 num_links;
449 /* max stations a single AP can support */
450 u8 max_ap_stations;
451
452 /* translate HW Tx rates to standard rate-indices */
453 const u8 **band_rate_to_idx;
454
455 /* size of table for HW rates that can be received from chip */
456 u8 hw_tx_rate_tbl_size;
457
458 /* this HW rate and below are considered HT rates for this chip */
459 u8 hw_min_ht_rate;
460
461 /* HW HT (11n) capabilities */
462 struct ieee80211_sta_ht_cap ht_cap[WLCORE_NUM_BANDS];
463
464 /* size of the private FW status data */
465 size_t fw_status_len;
466 size_t fw_status_priv_len;
467
468 /* RX Data filter rule state - enabled/disabled */
469 unsigned long rx_filter_enabled[BITS_TO_LONGS(WL1271_MAX_RX_FILTERS)];
470
471 /* size of the private static data */
472 size_t static_data_priv_len;
473
474 /* the current channel type */
475 enum nl80211_channel_type channel_type;
476
477 /* mutex for protecting the tx_flush function */
478 struct mutex flush_mutex;
479
480 /* sleep auth value currently configured to FW */
481 int sleep_auth;
482
483 /* the number of allocated MAC addresses in this chip */
484 int num_mac_addr;
485
486 /* minimum FW version required for the driver to work in single-role */
487 unsigned int min_sr_fw_ver[NUM_FW_VER];
488
489 /* minimum FW version required for the driver to work in multi-role */
490 unsigned int min_mr_fw_ver[NUM_FW_VER];
491
492 struct completion nvs_loading_complete;
493
494 /* interface combinations supported by the hw */
495 const struct ieee80211_iface_combination *iface_combinations;
496 u8 n_iface_combinations;
497 };
498
499 int wlcore_probe(struct wl1271 *wl, struct platform_device *pdev);
500 int wlcore_remove(struct platform_device *pdev);
501 struct ieee80211_hw *wlcore_alloc_hw(size_t priv_size, u32 aggr_buf_size,
502 u32 mbox_size);
503 int wlcore_free_hw(struct wl1271 *wl);
504 int wlcore_set_key(struct wl1271 *wl, enum set_key_cmd cmd,
505 struct ieee80211_vif *vif,
506 struct ieee80211_sta *sta,
507 struct ieee80211_key_conf *key_conf);
508 void wlcore_regdomain_config(struct wl1271 *wl);
509 void wlcore_update_inconn_sta(struct wl1271 *wl, struct wl12xx_vif *wlvif,
510 struct wl1271_station *wl_sta, bool in_conn);
511
512 static inline void
wlcore_set_ht_cap(struct wl1271 * wl,enum ieee80211_band band,struct ieee80211_sta_ht_cap * ht_cap)513 wlcore_set_ht_cap(struct wl1271 *wl, enum ieee80211_band band,
514 struct ieee80211_sta_ht_cap *ht_cap)
515 {
516 memcpy(&wl->ht_cap[band], ht_cap, sizeof(*ht_cap));
517 }
518
519 /* Tell wlcore not to care about this element when checking the version */
520 #define WLCORE_FW_VER_IGNORE -1
521
522 static inline void
wlcore_set_min_fw_ver(struct wl1271 * wl,unsigned int chip,unsigned int iftype_sr,unsigned int major_sr,unsigned int subtype_sr,unsigned int minor_sr,unsigned int iftype_mr,unsigned int major_mr,unsigned int subtype_mr,unsigned int minor_mr)523 wlcore_set_min_fw_ver(struct wl1271 *wl, unsigned int chip,
524 unsigned int iftype_sr, unsigned int major_sr,
525 unsigned int subtype_sr, unsigned int minor_sr,
526 unsigned int iftype_mr, unsigned int major_mr,
527 unsigned int subtype_mr, unsigned int minor_mr)
528 {
529 wl->min_sr_fw_ver[FW_VER_CHIP] = chip;
530 wl->min_sr_fw_ver[FW_VER_IF_TYPE] = iftype_sr;
531 wl->min_sr_fw_ver[FW_VER_MAJOR] = major_sr;
532 wl->min_sr_fw_ver[FW_VER_SUBTYPE] = subtype_sr;
533 wl->min_sr_fw_ver[FW_VER_MINOR] = minor_sr;
534
535 wl->min_mr_fw_ver[FW_VER_CHIP] = chip;
536 wl->min_mr_fw_ver[FW_VER_IF_TYPE] = iftype_mr;
537 wl->min_mr_fw_ver[FW_VER_MAJOR] = major_mr;
538 wl->min_mr_fw_ver[FW_VER_SUBTYPE] = subtype_mr;
539 wl->min_mr_fw_ver[FW_VER_MINOR] = minor_mr;
540 }
541
542 /* Firmware image load chunk size */
543 #define CHUNK_SIZE 16384
544
545 /* Quirks */
546
547 /* Each RX/TX transaction requires an end-of-transaction transfer */
548 #define WLCORE_QUIRK_END_OF_TRANSACTION BIT(0)
549
550 /* the first start_role(sta) sometimes doesn't work on wl12xx */
551 #define WLCORE_QUIRK_START_STA_FAILS BIT(1)
552
553 /* wl127x and SPI don't support SDIO block size alignment */
554 #define WLCORE_QUIRK_TX_BLOCKSIZE_ALIGN BIT(2)
555
556 /* means aggregated Rx packets are aligned to a SDIO block */
557 #define WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN BIT(3)
558
559 /* Older firmwares did not implement the FW logger over bus feature */
560 #define WLCORE_QUIRK_FWLOG_NOT_IMPLEMENTED BIT(4)
561
562 /* Older firmwares use an old NVS format */
563 #define WLCORE_QUIRK_LEGACY_NVS BIT(5)
564
565 /* pad only the last frame in the aggregate buffer */
566 #define WLCORE_QUIRK_TX_PAD_LAST_FRAME BIT(7)
567
568 /* extra header space is required for TKIP */
569 #define WLCORE_QUIRK_TKIP_HEADER_SPACE BIT(8)
570
571 /* Some firmwares not support sched scans while connected */
572 #define WLCORE_QUIRK_NO_SCHED_SCAN_WHILE_CONN BIT(9)
573
574 /* separate probe response templates for one-shot and sched scans */
575 #define WLCORE_QUIRK_DUAL_PROBE_TMPL BIT(10)
576
577 /* Firmware requires reg domain configuration for active calibration */
578 #define WLCORE_QUIRK_REGDOMAIN_CONF BIT(11)
579
580 /* The FW only support a zero session id for AP */
581 #define WLCORE_QUIRK_AP_ZERO_SESSION_ID BIT(12)
582
583 /* TODO: move all these common registers and values elsewhere */
584 #define HW_ACCESS_ELP_CTRL_REG 0x1FFFC
585
586 /* ELP register commands */
587 #define ELPCTRL_WAKE_UP 0x1
588 #define ELPCTRL_WAKE_UP_WLAN_READY 0x5
589 #define ELPCTRL_SLEEP 0x0
590 /* ELP WLAN_READY bit */
591 #define ELPCTRL_WLAN_READY 0x2
592
593 /*************************************************************************
594
595 Interrupt Trigger Register (Host -> WiLink)
596
597 **************************************************************************/
598
599 /* Hardware to Embedded CPU Interrupts - first 32-bit register set */
600
601 /*
602 * The host sets this bit to inform the Wlan
603 * FW that a TX packet is in the XFER
604 * Buffer #0.
605 */
606 #define INTR_TRIG_TX_PROC0 BIT(2)
607
608 /*
609 * The host sets this bit to inform the FW
610 * that it read a packet from RX XFER
611 * Buffer #0.
612 */
613 #define INTR_TRIG_RX_PROC0 BIT(3)
614
615 #define INTR_TRIG_DEBUG_ACK BIT(4)
616
617 #define INTR_TRIG_STATE_CHANGED BIT(5)
618
619 /* Hardware to Embedded CPU Interrupts - second 32-bit register set */
620
621 /*
622 * The host sets this bit to inform the FW
623 * that it read a packet from RX XFER
624 * Buffer #1.
625 */
626 #define INTR_TRIG_RX_PROC1 BIT(17)
627
628 /*
629 * The host sets this bit to inform the Wlan
630 * hardware that a TX packet is in the XFER
631 * Buffer #1.
632 */
633 #define INTR_TRIG_TX_PROC1 BIT(18)
634
635 #define ACX_SLV_SOFT_RESET_BIT BIT(1)
636 #define SOFT_RESET_MAX_TIME 1000000
637 #define SOFT_RESET_STALL_TIME 1000
638
639 #define ECPU_CONTROL_HALT 0x00000101
640
641 #define WELP_ARM_COMMAND_VAL 0x4
642
643 #endif /* __WLCORE_H__ */
644