1 /*
2 * include/asm-xtensa/processor.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2008 Tensilica Inc.
9 */
10
11 #ifndef _XTENSA_PROCESSOR_H
12 #define _XTENSA_PROCESSOR_H
13
14 #include <variant/core.h>
15 #include <platform/hardware.h>
16
17 #include <linux/compiler.h>
18 #include <asm/ptrace.h>
19 #include <asm/types.h>
20 #include <asm/regs.h>
21
22 /* Assertions. */
23
24 #if (XCHAL_HAVE_WINDOWED != 1)
25 # error Linux requires the Xtensa Windowed Registers Option.
26 #endif
27
28 #define ARCH_SLAB_MINALIGN XCHAL_DATA_WIDTH
29
30 /*
31 * User space process size: 1 GB.
32 * Windowed call ABI requires caller and callee to be located within the same
33 * 1 GB region. The C compiler places trampoline code on the stack for sources
34 * that take the address of a nested C function (a feature used by glibc), so
35 * the 1 GB requirement applies to the stack as well.
36 */
37
38 #ifdef CONFIG_MMU
39 #define TASK_SIZE __XTENSA_UL_CONST(0x40000000)
40 #else
41 #define TASK_SIZE (PLATFORM_DEFAULT_MEM_START + PLATFORM_DEFAULT_MEM_SIZE)
42 #endif
43
44 #define STACK_TOP TASK_SIZE
45 #define STACK_TOP_MAX STACK_TOP
46
47 /*
48 * General exception cause assigned to debug exceptions. Debug exceptions go
49 * to their own vector, rather than the general exception vectors (user,
50 * kernel, double); and their specific causes are reported via DEBUGCAUSE
51 * rather than EXCCAUSE. However it is sometimes convenient to redirect debug
52 * exceptions to the general exception mechanism. To do this, an otherwise
53 * unused EXCCAUSE value was assigned to debug exceptions for this purpose.
54 */
55
56 #define EXCCAUSE_MAPPED_DEBUG 63
57
58 /*
59 * We use DEPC also as a flag to distinguish between double and regular
60 * exceptions. For performance reasons, DEPC might contain the value of
61 * EXCCAUSE for regular exceptions, so we use this definition to mark a
62 * valid double exception address.
63 * (Note: We use it in bgeui, so it should be 64, 128, or 256)
64 */
65
66 #define VALID_DOUBLE_EXCEPTION_ADDRESS 64
67
68 /* LOCKLEVEL defines the interrupt level that masks all
69 * general-purpose interrupts.
70 */
71 #define LOCKLEVEL XCHAL_EXCM_LEVEL
72
73 /* WSBITS and WBBITS are the width of the WINDOWSTART and WINDOWBASE
74 * registers
75 */
76 #define WSBITS (XCHAL_NUM_AREGS / 4) /* width of WINDOWSTART in bits */
77 #define WBBITS (XCHAL_NUM_AREGS_LOG2 - 2) /* width of WINDOWBASE in bits */
78
79 #ifndef __ASSEMBLY__
80
81 /* Build a valid return address for the specified call winsize.
82 * winsize must be 1 (call4), 2 (call8), or 3 (call12)
83 */
84 #define MAKE_RA_FOR_CALL(ra,ws) (((ra) & 0x3fffffff) | (ws) << 30)
85
86 /* Convert return address to a valid pc
87 * Note: We assume that the stack pointer is in the same 1GB ranges as the ra
88 */
89 #define MAKE_PC_FROM_RA(ra,sp) (((ra) & 0x3fffffff) | ((sp) & 0xc0000000))
90
91 typedef struct {
92 unsigned long seg;
93 } mm_segment_t;
94
95 struct thread_struct {
96
97 /* kernel's return address and stack pointer for context switching */
98 unsigned long ra; /* kernel's a0: return address and window call size */
99 unsigned long sp; /* kernel's a1: stack pointer */
100
101 mm_segment_t current_ds; /* see uaccess.h for example uses */
102
103 /* struct xtensa_cpuinfo info; */
104
105 unsigned long bad_vaddr; /* last user fault */
106 unsigned long bad_uaddr; /* last kernel fault accessing user space */
107 unsigned long error_code;
108
109 unsigned long ibreak[XCHAL_NUM_IBREAK];
110 unsigned long dbreaka[XCHAL_NUM_DBREAK];
111 unsigned long dbreakc[XCHAL_NUM_DBREAK];
112
113 /* Make structure 16 bytes aligned. */
114 int align[0] __attribute__ ((aligned(16)));
115 };
116
117
118 /*
119 * Default implementation of macro that returns current
120 * instruction pointer ("program counter").
121 */
122 #define current_text_addr() ({ __label__ _l; _l: &&_l;})
123
124
125 /* This decides where the kernel will search for a free chunk of vm
126 * space during mmap's.
127 */
128 #define TASK_UNMAPPED_BASE (TASK_SIZE / 2)
129
130 #define INIT_THREAD \
131 { \
132 ra: 0, \
133 sp: sizeof(init_stack) + (long) &init_stack, \
134 current_ds: {0}, \
135 /*info: {0}, */ \
136 bad_vaddr: 0, \
137 bad_uaddr: 0, \
138 error_code: 0, \
139 }
140
141
142 /*
143 * Do necessary setup to start up a newly executed thread.
144 * Note: We set-up ps as if we did a call4 to the new pc.
145 * set_thread_state in signal.c depends on it.
146 */
147 #define USER_PS_VALUE ((1 << PS_WOE_BIT) | \
148 (1 << PS_CALLINC_SHIFT) | \
149 (USER_RING << PS_RING_SHIFT) | \
150 (1 << PS_UM_BIT) | \
151 (1 << PS_EXCM_BIT))
152
153 /* Clearing a0 terminates the backtrace. */
154 #define start_thread(regs, new_pc, new_sp) \
155 memset(regs, 0, sizeof(*regs)); \
156 regs->pc = new_pc; \
157 regs->ps = USER_PS_VALUE; \
158 regs->areg[1] = new_sp; \
159 regs->areg[0] = 0; \
160 regs->wmask = 1; \
161 regs->depc = 0; \
162 regs->windowbase = 0; \
163 regs->windowstart = 1;
164
165 /* Forward declaration */
166 struct task_struct;
167 struct mm_struct;
168
169 /* Free all resources held by a thread. */
170 #define release_thread(thread) do { } while(0)
171
172 /* Copy and release all segment info associated with a VM */
173 #define copy_segments(p, mm) do { } while(0)
174 #define release_segments(mm) do { } while(0)
175 #define forget_segments() do { } while (0)
176
177 #define thread_saved_pc(tsk) (task_pt_regs(tsk)->pc)
178
179 extern unsigned long get_wchan(struct task_struct *p);
180
181 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
182 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->areg[1])
183
184 #define cpu_relax() barrier()
185 #define cpu_relax_lowlatency() cpu_relax()
186
187 /* Special register access. */
188
189 #define WSR(v,sr) __asm__ __volatile__ ("wsr %0,"__stringify(sr) :: "a"(v));
190 #define RSR(v,sr) __asm__ __volatile__ ("rsr %0,"__stringify(sr) : "=a"(v));
191
192 #define set_sr(x,sr) ({unsigned int v=(unsigned int)x; WSR(v,sr);})
193 #define get_sr(sr) ({unsigned int v; RSR(v,sr); v; })
194
195 #ifndef XCHAL_HAVE_EXTERN_REGS
196 #define XCHAL_HAVE_EXTERN_REGS 0
197 #endif
198
199 #if XCHAL_HAVE_EXTERN_REGS
200
set_er(unsigned long value,unsigned long addr)201 static inline void set_er(unsigned long value, unsigned long addr)
202 {
203 asm volatile ("wer %0, %1" : : "a" (value), "a" (addr) : "memory");
204 }
205
get_er(unsigned long addr)206 static inline unsigned long get_er(unsigned long addr)
207 {
208 register unsigned long value;
209 asm volatile ("rer %0, %1" : "=a" (value) : "a" (addr) : "memory");
210 return value;
211 }
212
213 #endif /* XCHAL_HAVE_EXTERN_REGS */
214
215 #endif /* __ASSEMBLY__ */
216 #endif /* _XTENSA_PROCESSOR_H */
217