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1menu "RAM/ROM/Flash chip drivers"
2	depends on MTD!=n
3
4config MTD_CFI
5	tristate "Detect flash chips by Common Flash Interface (CFI) probe"
6	select MTD_GEN_PROBE
7	select MTD_CFI_UTIL
8	help
9	  The Common Flash Interface specification was developed by Intel,
10	  AMD and other flash manufactures that provides a universal method
11	  for probing the capabilities of flash devices. If you wish to
12	  support any device that is CFI-compliant, you need to enable this
13	  option. Visit <http://www.amd.com/products/nvd/overview/cfi.html>
14	  for more information on CFI.
15
16config MTD_JEDECPROBE
17	tristate "Detect non-CFI AMD/JEDEC-compatible flash chips"
18	select MTD_GEN_PROBE
19	help
20	  This option enables JEDEC-style probing of flash chips which are not
21	  compatible with the Common Flash Interface, but will use the common
22	  CFI-targeted flash drivers for any chips which are identified which
23	  are in fact compatible in all but the probe method. This actually
24	  covers most AMD/Fujitsu-compatible chips and also non-CFI
25	  Intel chips.
26
27config MTD_GEN_PROBE
28	tristate
29
30config MTD_CFI_ADV_OPTIONS
31	bool "Flash chip driver advanced configuration options"
32	depends on MTD_GEN_PROBE
33	help
34	  If you need to specify a specific endianness for access to flash
35	  chips, or if you wish to reduce the size of the kernel by including
36	  support for only specific arrangements of flash chips, say 'Y'. This
37	  option does not directly affect the code, but will enable other
38	  configuration options which allow you to do so.
39
40	  If unsure, say 'N'.
41
42choice
43	prompt "Flash cmd/query data swapping"
44	depends on MTD_CFI_ADV_OPTIONS
45	default MTD_CFI_NOSWAP
46	---help---
47	  This option defines the way in which the CPU attempts to arrange
48	  data bits when writing the 'magic' commands to the chips. Saying
49	  'NO', which is the default when CONFIG_MTD_CFI_ADV_OPTIONS isn't
50	  enabled, means that the CPU will not do any swapping; the chips
51	  are expected to be wired to the CPU in 'host-endian' form.
52	  Specific arrangements are possible with the BIG_ENDIAN_BYTE and
53	  LITTLE_ENDIAN_BYTE, if the bytes are reversed.
54
55config MTD_CFI_NOSWAP
56	bool "NO"
57
58config MTD_CFI_BE_BYTE_SWAP
59	bool "BIG_ENDIAN_BYTE"
60
61config MTD_CFI_LE_BYTE_SWAP
62	bool "LITTLE_ENDIAN_BYTE"
63
64endchoice
65
66config MTD_CFI_GEOMETRY
67	bool "Specific CFI Flash geometry selection"
68	depends on MTD_CFI_ADV_OPTIONS
69	help
70	  This option does not affect the code directly, but will enable
71	  some other configuration options which would allow you to reduce
72	  the size of the kernel by including support for only certain
73	  arrangements of CFI chips. If unsure, say 'N' and all options
74	  which are supported by the current code will be enabled.
75
76config MTD_MAP_BANK_WIDTH_1
77	bool "Support  8-bit buswidth" if MTD_CFI_GEOMETRY
78	default y
79	help
80	  If you wish to support CFI devices on a physical bus which is
81	  8 bits wide, say 'Y'.
82
83config MTD_MAP_BANK_WIDTH_2
84	bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY
85	default y
86	help
87	  If you wish to support CFI devices on a physical bus which is
88	  16 bits wide, say 'Y'.
89
90config MTD_MAP_BANK_WIDTH_4
91	bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY
92	default y
93	help
94	  If you wish to support CFI devices on a physical bus which is
95	  32 bits wide, say 'Y'.
96
97config MTD_MAP_BANK_WIDTH_8
98	bool "Support 64-bit buswidth" if MTD_CFI_GEOMETRY
99	default n
100	help
101	  If you wish to support CFI devices on a physical bus which is
102	  64 bits wide, say 'Y'.
103
104config MTD_MAP_BANK_WIDTH_16
105	bool "Support 128-bit buswidth" if MTD_CFI_GEOMETRY
106	default n
107	help
108	  If you wish to support CFI devices on a physical bus which is
109	  128 bits wide, say 'Y'.
110
111config MTD_MAP_BANK_WIDTH_32
112	bool "Support 256-bit buswidth" if MTD_CFI_GEOMETRY
113	select MTD_COMPLEX_MAPPINGS if HAS_IOMEM
114	default n
115	help
116	  If you wish to support CFI devices on a physical bus which is
117	  256 bits wide, say 'Y'.
118
119config MTD_CFI_I1
120	bool "Support 1-chip flash interleave" if MTD_CFI_GEOMETRY
121	default y
122	help
123	  If your flash chips are not interleaved - i.e. you only have one
124	  flash chip addressed by each bus cycle, then say 'Y'.
125
126config MTD_CFI_I2
127	bool "Support 2-chip flash interleave" if MTD_CFI_GEOMETRY
128	default y
129	help
130	  If your flash chips are interleaved in pairs - i.e. you have two
131	  flash chips addressed by each bus cycle, then say 'Y'.
132
133config MTD_CFI_I4
134	bool "Support 4-chip flash interleave" if MTD_CFI_GEOMETRY
135	default n
136	help
137	  If your flash chips are interleaved in fours - i.e. you have four
138	  flash chips addressed by each bus cycle, then say 'Y'.
139
140config MTD_CFI_I8
141	bool "Support 8-chip flash interleave" if MTD_CFI_GEOMETRY
142	default n
143	help
144	  If your flash chips are interleaved in eights - i.e. you have eight
145	  flash chips addressed by each bus cycle, then say 'Y'.
146
147config MTD_OTP
148	bool "Protection Registers aka one-time programmable (OTP) bits"
149	depends on MTD_CFI_ADV_OPTIONS
150	default n
151	help
152	  This enables support for reading, writing and locking so called
153	  "Protection Registers" present on some flash chips.
154	  A subset of them are pre-programmed at the factory with a
155	  unique set of values. The rest is user-programmable.
156
157	  The user-programmable Protection Registers contain one-time
158	  programmable (OTP) bits; when programmed, register bits cannot be
159	  erased. Each Protection Register can be accessed multiple times to
160	  program individual bits, as long as the register remains unlocked.
161
162	  Each Protection Register has an associated Lock Register bit. When a
163	  Lock Register bit is programmed, the associated Protection Register
164	  can only be read; it can no longer be programmed. Additionally,
165	  because the Lock Register bits themselves are OTP, when programmed,
166	  Lock Register bits cannot be erased. Therefore, when a Protection
167	  Register is locked, it cannot be unlocked.
168
169	  This feature should therefore be used with extreme care. Any mistake
170	  in the programming of OTP bits will waste them.
171
172config MTD_CFI_INTELEXT
173	tristate "Support for CFI command set 0001 (Intel/Sharp chips)"
174	depends on MTD_GEN_PROBE
175	select MTD_CFI_UTIL
176	help
177	  The Common Flash Interface defines a number of different command
178	  sets which a CFI-compliant chip may claim to implement. This code
179	  provides support for command set 0001, used on Intel StrataFlash
180	  and other parts.
181
182config MTD_CFI_AMDSTD
183	tristate "Support for CFI command set 0002 (AMD/Fujitsu/Spansion chips)"
184	depends on MTD_GEN_PROBE
185	select MTD_CFI_UTIL
186	help
187	  The Common Flash Interface defines a number of different command
188	  sets which a CFI-compliant chip may claim to implement. This code
189	  provides support for command set 0002, used on chips including
190	  the AMD Am29LV320.
191
192config MTD_CFI_STAA
193	tristate "Support for CFI command set 0020 (ST (Advanced Architecture) chips)"
194	depends on MTD_GEN_PROBE
195	select MTD_CFI_UTIL
196	help
197	  The Common Flash Interface defines a number of different command
198	  sets which a CFI-compliant chip may claim to implement. This code
199	  provides support for command set 0020.
200
201config MTD_CFI_UTIL
202	tristate
203
204config MTD_RAM
205	tristate "Support for RAM chips in bus mapping"
206	help
207	  This option enables basic support for RAM chips accessed through
208	  a bus mapping driver.
209
210config MTD_ROM
211	tristate "Support for ROM chips in bus mapping"
212	help
213	  This option enables basic support for ROM chips accessed through
214	  a bus mapping driver.
215
216config MTD_ABSENT
217	tristate "Support for absent chips in bus mapping"
218	help
219	  This option enables support for a dummy probing driver used to
220	  allocated placeholder MTD devices on systems that have socketed
221	  or removable media.  Use of this driver as a fallback chip probe
222	  preserves the expected registration order of MTD device nodes on
223	  the system regardless of media presence.  Device nodes created
224	  with this driver will return -ENODEV upon access.
225
226config MTD_XIP
227	bool "XIP aware MTD support"
228	depends on !SMP && (MTD_CFI_INTELEXT || MTD_CFI_AMDSTD) && ARCH_MTD_XIP
229	default y if XIP_KERNEL
230	help
231	  This allows MTD support to work with flash memory which is also
232	  used for XIP purposes.  If you're not sure what this is all about
233	  then say N.
234
235endmenu
236