1 /* 2 * Linux network driver for Brocade Converged Network Adapter. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License (GPL) Version 2 as 6 * published by the Free Software Foundation 7 * 8 * This program is distributed in the hope that it will be useful, but 9 * WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 11 * General Public License for more details. 12 */ 13 /* 14 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc. 15 * All rights reserved 16 * www.brocade.com 17 */ 18 #ifndef __BNA_TYPES_H__ 19 #define __BNA_TYPES_H__ 20 21 #include "cna.h" 22 #include "bna_hw_defs.h" 23 #include "bfa_cee.h" 24 #include "bfa_msgq.h" 25 26 /* Forward declarations */ 27 28 struct bna_mcam_handle; 29 struct bna_txq; 30 struct bna_tx; 31 struct bna_rxq; 32 struct bna_cq; 33 struct bna_rx; 34 struct bna_rxf; 35 struct bna_enet; 36 struct bna; 37 struct bnad; 38 39 /* Enums, primitive data types */ 40 41 enum bna_status { 42 BNA_STATUS_T_DISABLED = 0, 43 BNA_STATUS_T_ENABLED = 1 44 }; 45 46 enum bna_cleanup_type { 47 BNA_HARD_CLEANUP = 0, 48 BNA_SOFT_CLEANUP = 1 49 }; 50 51 enum bna_cb_status { 52 BNA_CB_SUCCESS = 0, 53 BNA_CB_FAIL = 1, 54 BNA_CB_INTERRUPT = 2, 55 BNA_CB_BUSY = 3, 56 BNA_CB_INVALID_MAC = 4, 57 BNA_CB_MCAST_LIST_FULL = 5, 58 BNA_CB_UCAST_CAM_FULL = 6, 59 BNA_CB_WAITING = 7, 60 BNA_CB_NOT_EXEC = 8 61 }; 62 63 enum bna_res_type { 64 BNA_RES_T_MEM = 1, 65 BNA_RES_T_INTR = 2 66 }; 67 68 enum bna_mem_type { 69 BNA_MEM_T_KVA = 1, 70 BNA_MEM_T_DMA = 2 71 }; 72 73 enum bna_intr_type { 74 BNA_INTR_T_INTX = 1, 75 BNA_INTR_T_MSIX = 2 76 }; 77 78 enum bna_res_req_type { 79 BNA_RES_MEM_T_COM = 0, 80 BNA_RES_MEM_T_ATTR = 1, 81 BNA_RES_MEM_T_FWTRC = 2, 82 BNA_RES_MEM_T_STATS = 3, 83 BNA_RES_T_MAX 84 }; 85 86 enum bna_mod_res_req_type { 87 BNA_MOD_RES_MEM_T_TX_ARRAY = 0, 88 BNA_MOD_RES_MEM_T_TXQ_ARRAY = 1, 89 BNA_MOD_RES_MEM_T_RX_ARRAY = 2, 90 BNA_MOD_RES_MEM_T_RXP_ARRAY = 3, 91 BNA_MOD_RES_MEM_T_RXQ_ARRAY = 4, 92 BNA_MOD_RES_MEM_T_UCMAC_ARRAY = 5, 93 BNA_MOD_RES_MEM_T_MCMAC_ARRAY = 6, 94 BNA_MOD_RES_MEM_T_MCHANDLE_ARRAY = 7, 95 BNA_MOD_RES_T_MAX 96 }; 97 98 enum bna_tx_res_req_type { 99 BNA_TX_RES_MEM_T_TCB = 0, 100 BNA_TX_RES_MEM_T_UNMAPQ = 1, 101 BNA_TX_RES_MEM_T_QPT = 2, 102 BNA_TX_RES_MEM_T_SWQPT = 3, 103 BNA_TX_RES_MEM_T_PAGE = 4, 104 BNA_TX_RES_MEM_T_IBIDX = 5, 105 BNA_TX_RES_INTR_T_TXCMPL = 6, 106 BNA_TX_RES_T_MAX, 107 }; 108 109 enum bna_rx_mem_type { 110 BNA_RX_RES_MEM_T_CCB = 0, /* CQ context */ 111 BNA_RX_RES_MEM_T_RCB = 1, /* CQ context */ 112 BNA_RX_RES_MEM_T_UNMAPHQ = 2, 113 BNA_RX_RES_MEM_T_UNMAPDQ = 3, 114 BNA_RX_RES_MEM_T_CQPT = 4, 115 BNA_RX_RES_MEM_T_CSWQPT = 5, 116 BNA_RX_RES_MEM_T_CQPT_PAGE = 6, 117 BNA_RX_RES_MEM_T_HQPT = 7, 118 BNA_RX_RES_MEM_T_DQPT = 8, 119 BNA_RX_RES_MEM_T_HSWQPT = 9, 120 BNA_RX_RES_MEM_T_DSWQPT = 10, 121 BNA_RX_RES_MEM_T_DPAGE = 11, 122 BNA_RX_RES_MEM_T_HPAGE = 12, 123 BNA_RX_RES_MEM_T_IBIDX = 13, 124 BNA_RX_RES_MEM_T_RIT = 14, 125 BNA_RX_RES_T_INTR = 15, 126 BNA_RX_RES_T_MAX = 16 127 }; 128 129 enum bna_tx_type { 130 BNA_TX_T_REGULAR = 0, 131 BNA_TX_T_LOOPBACK = 1, 132 }; 133 134 enum bna_tx_flags { 135 BNA_TX_F_ENET_STARTED = 1, 136 BNA_TX_F_ENABLED = 2, 137 BNA_TX_F_PRIO_CHANGED = 4, 138 BNA_TX_F_BW_UPDATED = 8, 139 }; 140 141 enum bna_tx_mod_flags { 142 BNA_TX_MOD_F_ENET_STARTED = 1, 143 BNA_TX_MOD_F_ENET_LOOPBACK = 2, 144 }; 145 146 enum bna_rx_type { 147 BNA_RX_T_REGULAR = 0, 148 BNA_RX_T_LOOPBACK = 1, 149 }; 150 151 enum bna_rxp_type { 152 BNA_RXP_SINGLE = 1, 153 BNA_RXP_SLR = 2, 154 BNA_RXP_HDS = 3 155 }; 156 157 enum bna_rxmode { 158 BNA_RXMODE_PROMISC = 1, 159 BNA_RXMODE_DEFAULT = 2, 160 BNA_RXMODE_ALLMULTI = 4 161 }; 162 163 enum bna_rx_event { 164 RX_E_START = 1, 165 RX_E_STOP = 2, 166 RX_E_FAIL = 3, 167 RX_E_STARTED = 4, 168 RX_E_STOPPED = 5, 169 RX_E_RXF_STARTED = 6, 170 RX_E_RXF_STOPPED = 7, 171 RX_E_CLEANUP_DONE = 8, 172 }; 173 174 enum bna_rx_flags { 175 BNA_RX_F_ENET_STARTED = 1, 176 BNA_RX_F_ENABLED = 2, 177 }; 178 179 enum bna_rx_mod_flags { 180 BNA_RX_MOD_F_ENET_STARTED = 1, 181 BNA_RX_MOD_F_ENET_LOOPBACK = 2, 182 }; 183 184 enum bna_rxf_flags { 185 BNA_RXF_F_PAUSED = 1, 186 }; 187 188 enum bna_rxf_event { 189 RXF_E_START = 1, 190 RXF_E_STOP = 2, 191 RXF_E_FAIL = 3, 192 RXF_E_CONFIG = 4, 193 RXF_E_PAUSE = 5, 194 RXF_E_RESUME = 6, 195 RXF_E_FW_RESP = 7, 196 }; 197 198 enum bna_enet_type { 199 BNA_ENET_T_REGULAR = 0, 200 BNA_ENET_T_LOOPBACK_INTERNAL = 1, 201 BNA_ENET_T_LOOPBACK_EXTERNAL = 2, 202 }; 203 204 enum bna_link_status { 205 BNA_LINK_DOWN = 0, 206 BNA_LINK_UP = 1, 207 BNA_CEE_UP = 2 208 }; 209 210 enum bna_ethport_flags { 211 BNA_ETHPORT_F_ADMIN_UP = 1, 212 BNA_ETHPORT_F_PORT_ENABLED = 2, 213 BNA_ETHPORT_F_RX_STARTED = 4, 214 }; 215 216 enum bna_enet_flags { 217 BNA_ENET_F_IOCETH_READY = 1, 218 BNA_ENET_F_ENABLED = 2, 219 BNA_ENET_F_PAUSE_CHANGED = 4, 220 BNA_ENET_F_MTU_CHANGED = 8 221 }; 222 223 enum bna_rss_flags { 224 BNA_RSS_F_RIT_PENDING = 1, 225 BNA_RSS_F_CFG_PENDING = 2, 226 BNA_RSS_F_STATUS_PENDING = 4, 227 }; 228 229 enum bna_mod_flags { 230 BNA_MOD_F_INIT_DONE = 1, 231 }; 232 233 enum bna_pkt_rates { 234 BNA_PKT_RATE_10K = 10000, 235 BNA_PKT_RATE_20K = 20000, 236 BNA_PKT_RATE_30K = 30000, 237 BNA_PKT_RATE_40K = 40000, 238 BNA_PKT_RATE_50K = 50000, 239 BNA_PKT_RATE_60K = 60000, 240 BNA_PKT_RATE_70K = 70000, 241 BNA_PKT_RATE_80K = 80000, 242 }; 243 244 enum bna_dim_load_types { 245 BNA_LOAD_T_HIGH_4 = 0, /* 80K <= r */ 246 BNA_LOAD_T_HIGH_3 = 1, /* 60K <= r < 80K */ 247 BNA_LOAD_T_HIGH_2 = 2, /* 50K <= r < 60K */ 248 BNA_LOAD_T_HIGH_1 = 3, /* 40K <= r < 50K */ 249 BNA_LOAD_T_LOW_1 = 4, /* 30K <= r < 40K */ 250 BNA_LOAD_T_LOW_2 = 5, /* 20K <= r < 30K */ 251 BNA_LOAD_T_LOW_3 = 6, /* 10K <= r < 20K */ 252 BNA_LOAD_T_LOW_4 = 7, /* r < 10K */ 253 BNA_LOAD_T_MAX = 8 254 }; 255 256 enum bna_dim_bias_types { 257 BNA_BIAS_T_SMALL = 0, /* small pkts > (large pkts * 2) */ 258 BNA_BIAS_T_LARGE = 1, /* Not BNA_BIAS_T_SMALL */ 259 BNA_BIAS_T_MAX = 2 260 }; 261 262 #define BNA_MAX_NAME_SIZE 64 263 struct bna_ident { 264 int id; 265 char name[BNA_MAX_NAME_SIZE]; 266 }; 267 268 struct bna_mac { 269 /* This should be the first one */ 270 struct list_head qe; 271 u8 addr[ETH_ALEN]; 272 struct bna_mcam_handle *handle; 273 }; 274 275 struct bna_mem_descr { 276 u32 len; 277 void *kva; 278 struct bna_dma_addr dma; 279 }; 280 281 struct bna_mem_info { 282 enum bna_mem_type mem_type; 283 u32 len; 284 u32 num; 285 u32 align_sz; /* 0/1 = no alignment */ 286 struct bna_mem_descr *mdl; 287 void *cookie; /* For bnad to unmap dma later */ 288 }; 289 290 struct bna_intr_descr { 291 int vector; 292 }; 293 294 struct bna_intr_info { 295 enum bna_intr_type intr_type; 296 int num; 297 struct bna_intr_descr *idl; 298 }; 299 300 union bna_res_u { 301 struct bna_mem_info mem_info; 302 struct bna_intr_info intr_info; 303 }; 304 305 struct bna_res_info { 306 enum bna_res_type res_type; 307 union bna_res_u res_u; 308 }; 309 310 /* HW QPT */ 311 struct bna_qpt { 312 struct bna_dma_addr hw_qpt_ptr; 313 void *kv_qpt_ptr; 314 u32 page_count; 315 u32 page_size; 316 }; 317 318 struct bna_attr { 319 bool fw_query_complete; 320 int num_txq; 321 int num_rxp; 322 int num_ucmac; 323 int num_mcmac; 324 int max_rit_size; 325 }; 326 327 /* IOCEth */ 328 329 struct bna_ioceth { 330 bfa_fsm_t fsm; 331 struct bfa_ioc ioc; 332 333 struct bna_attr attr; 334 struct bfa_msgq_cmd_entry msgq_cmd; 335 struct bfi_enet_attr_req attr_req; 336 337 void (*stop_cbfn)(struct bnad *bnad); 338 struct bnad *stop_cbarg; 339 340 struct bna *bna; 341 }; 342 343 /* Enet */ 344 345 /* Pause configuration */ 346 struct bna_pause_config { 347 enum bna_status tx_pause; 348 enum bna_status rx_pause; 349 }; 350 351 struct bna_enet { 352 bfa_fsm_t fsm; 353 enum bna_enet_flags flags; 354 355 enum bna_enet_type type; 356 357 struct bna_pause_config pause_config; 358 int mtu; 359 360 /* Callback for bna_enet_disable(), enet_stop() */ 361 void (*stop_cbfn)(void *); 362 void *stop_cbarg; 363 364 /* Callback for bna_enet_pause_config() */ 365 void (*pause_cbfn)(struct bnad *); 366 367 /* Callback for bna_enet_mtu_set() */ 368 void (*mtu_cbfn)(struct bnad *); 369 370 struct bfa_wc chld_stop_wc; 371 372 struct bfa_msgq_cmd_entry msgq_cmd; 373 struct bfi_enet_set_pause_req pause_req; 374 375 struct bna *bna; 376 }; 377 378 /* Ethport */ 379 380 struct bna_ethport { 381 bfa_fsm_t fsm; 382 enum bna_ethport_flags flags; 383 384 enum bna_link_status link_status; 385 386 int rx_started_count; 387 388 void (*stop_cbfn)(struct bna_enet *); 389 390 void (*adminup_cbfn)(struct bnad *, enum bna_cb_status); 391 392 void (*link_cbfn)(struct bnad *, enum bna_link_status); 393 394 struct bfa_msgq_cmd_entry msgq_cmd; 395 union { 396 struct bfi_enet_enable_req admin_req; 397 struct bfi_enet_diag_lb_req lpbk_req; 398 } bfi_enet_cmd; 399 400 struct bna *bna; 401 }; 402 403 /* Interrupt Block */ 404 405 /* Doorbell structure */ 406 struct bna_ib_dbell { 407 void __iomem *doorbell_addr; 408 u32 doorbell_ack; 409 }; 410 411 /* IB structure */ 412 struct bna_ib { 413 struct bna_dma_addr ib_seg_host_addr; 414 void *ib_seg_host_addr_kva; 415 416 struct bna_ib_dbell door_bell; 417 418 enum bna_intr_type intr_type; 419 int intr_vector; 420 421 u8 coalescing_timeo; /* Unit is 5usec. */ 422 423 int interpkt_count; 424 int interpkt_timeo; 425 }; 426 427 /* Tx object */ 428 429 /* Tx datapath control structure */ 430 #define BNA_Q_NAME_SIZE 16 431 struct bna_tcb { 432 /* Fast path */ 433 void **sw_qpt; 434 void *sw_q; 435 void *unmap_q; 436 u32 producer_index; 437 u32 consumer_index; 438 volatile u32 *hw_consumer_index; 439 u32 q_depth; 440 void __iomem *q_dbell; 441 struct bna_ib_dbell *i_dbell; 442 /* Control path */ 443 struct bna_txq *txq; 444 struct bnad *bnad; 445 void *priv; /* BNAD's cookie */ 446 enum bna_intr_type intr_type; 447 int intr_vector; 448 u8 priority; /* Current priority */ 449 unsigned long flags; /* Used by bnad as required */ 450 int id; 451 char name[BNA_Q_NAME_SIZE]; 452 }; 453 454 /* TxQ QPT and configuration */ 455 struct bna_txq { 456 /* This should be the first one */ 457 struct list_head qe; 458 459 u8 priority; 460 461 struct bna_qpt qpt; 462 struct bna_tcb *tcb; 463 struct bna_ib ib; 464 465 struct bna_tx *tx; 466 467 int hw_id; 468 469 u64 tx_packets; 470 u64 tx_bytes; 471 }; 472 473 /* Tx object */ 474 struct bna_tx { 475 /* This should be the first one */ 476 struct list_head qe; 477 int rid; 478 int hw_id; 479 480 bfa_fsm_t fsm; 481 enum bna_tx_flags flags; 482 483 enum bna_tx_type type; 484 int num_txq; 485 486 struct list_head txq_q; 487 u16 txf_vlan_id; 488 489 /* Tx event handlers */ 490 void (*tcb_setup_cbfn)(struct bnad *, struct bna_tcb *); 491 void (*tcb_destroy_cbfn)(struct bnad *, struct bna_tcb *); 492 void (*tx_stall_cbfn)(struct bnad *, struct bna_tx *); 493 void (*tx_resume_cbfn)(struct bnad *, struct bna_tx *); 494 void (*tx_cleanup_cbfn)(struct bnad *, struct bna_tx *); 495 496 /* callback for bna_tx_disable(), bna_tx_stop() */ 497 void (*stop_cbfn)(void *arg, struct bna_tx *tx); 498 void *stop_cbarg; 499 500 /* callback for bna_tx_prio_set() */ 501 void (*prio_change_cbfn)(struct bnad *bnad, struct bna_tx *tx); 502 503 struct bfa_msgq_cmd_entry msgq_cmd; 504 union { 505 struct bfi_enet_tx_cfg_req cfg_req; 506 struct bfi_enet_req req; 507 struct bfi_enet_tx_cfg_rsp cfg_rsp; 508 } bfi_enet_cmd; 509 510 struct bna *bna; 511 void *priv; /* bnad's cookie */ 512 }; 513 514 /* Tx object configuration used during creation */ 515 struct bna_tx_config { 516 int num_txq; 517 int txq_depth; 518 int coalescing_timeo; 519 enum bna_tx_type tx_type; 520 }; 521 522 struct bna_tx_event_cbfn { 523 /* Optional */ 524 void (*tcb_setup_cbfn)(struct bnad *, struct bna_tcb *); 525 void (*tcb_destroy_cbfn)(struct bnad *, struct bna_tcb *); 526 /* Mandatory */ 527 void (*tx_stall_cbfn)(struct bnad *, struct bna_tx *); 528 void (*tx_resume_cbfn)(struct bnad *, struct bna_tx *); 529 void (*tx_cleanup_cbfn)(struct bnad *, struct bna_tx *); 530 }; 531 532 /* Tx module - keeps track of free, active tx objects */ 533 struct bna_tx_mod { 534 struct bna_tx *tx; /* BFI_MAX_TXQ entries */ 535 struct bna_txq *txq; /* BFI_MAX_TXQ entries */ 536 537 struct list_head tx_free_q; 538 struct list_head tx_active_q; 539 540 struct list_head txq_free_q; 541 542 /* callback for bna_tx_mod_stop() */ 543 void (*stop_cbfn)(struct bna_enet *enet); 544 545 struct bfa_wc tx_stop_wc; 546 547 enum bna_tx_mod_flags flags; 548 549 u8 prio_map; 550 int default_prio; 551 int iscsi_over_cee; 552 int iscsi_prio; 553 int prio_reconfigured; 554 555 u32 rid_mask; 556 557 struct bna *bna; 558 }; 559 560 /* Rx object */ 561 562 /* Rx datapath control structure */ 563 struct bna_rcb { 564 /* Fast path */ 565 void **sw_qpt; 566 void *sw_q; 567 void *unmap_q; 568 u32 producer_index; 569 u32 consumer_index; 570 u32 q_depth; 571 void __iomem *q_dbell; 572 /* Control path */ 573 struct bna_rxq *rxq; 574 struct bna_ccb *ccb; 575 struct bnad *bnad; 576 void *priv; /* BNAD's cookie */ 577 unsigned long flags; 578 int id; 579 }; 580 581 /* RxQ structure - QPT, configuration */ 582 struct bna_rxq { 583 struct list_head qe; 584 585 int buffer_size; 586 int q_depth; 587 u32 num_vecs; 588 enum bna_status multi_buffer; 589 590 struct bna_qpt qpt; 591 struct bna_rcb *rcb; 592 593 struct bna_rxp *rxp; 594 struct bna_rx *rx; 595 596 int hw_id; 597 598 u64 rx_packets; 599 u64 rx_bytes; 600 u64 rx_packets_with_error; 601 u64 rxbuf_alloc_failed; 602 }; 603 604 /* RxQ pair */ 605 union bna_rxq_u { 606 struct { 607 struct bna_rxq *hdr; 608 struct bna_rxq *data; 609 } hds; 610 struct { 611 struct bna_rxq *small; 612 struct bna_rxq *large; 613 } slr; 614 struct { 615 struct bna_rxq *only; 616 struct bna_rxq *reserved; 617 } single; 618 }; 619 620 /* Packet rate for Dynamic Interrupt Moderation */ 621 struct bna_pkt_rate { 622 u32 small_pkt_cnt; 623 u32 large_pkt_cnt; 624 }; 625 626 /* Completion control structure */ 627 struct bna_ccb { 628 /* Fast path */ 629 void **sw_qpt; 630 void *sw_q; 631 u32 producer_index; 632 volatile u32 *hw_producer_index; 633 u32 q_depth; 634 struct bna_ib_dbell *i_dbell; 635 struct bna_rcb *rcb[2]; 636 void *ctrl; /* For bnad */ 637 struct bna_pkt_rate pkt_rate; 638 u32 pkts_una; 639 u32 bytes_per_intr; 640 641 /* Control path */ 642 struct bna_cq *cq; 643 struct bnad *bnad; 644 void *priv; /* BNAD's cookie */ 645 enum bna_intr_type intr_type; 646 int intr_vector; 647 u8 rx_coalescing_timeo; /* For NAPI */ 648 int id; 649 char name[BNA_Q_NAME_SIZE]; 650 }; 651 652 /* CQ QPT, configuration */ 653 struct bna_cq { 654 struct bna_qpt qpt; 655 struct bna_ccb *ccb; 656 657 struct bna_ib ib; 658 659 struct bna_rx *rx; 660 }; 661 662 struct bna_rss_config { 663 enum bfi_enet_rss_type hash_type; 664 u8 hash_mask; 665 u32 toeplitz_hash_key[BFI_ENET_RSS_KEY_LEN]; 666 }; 667 668 struct bna_hds_config { 669 enum bfi_enet_hds_type hdr_type; 670 int forced_offset; 671 }; 672 673 /* Rx object configuration used during creation */ 674 struct bna_rx_config { 675 enum bna_rx_type rx_type; 676 int num_paths; 677 enum bna_rxp_type rxp_type; 678 int paused; 679 int coalescing_timeo; 680 /* 681 * Small/Large (or Header/Data) buffer size to be configured 682 * for SLR and HDS queue type. 683 */ 684 u32 frame_size; 685 686 /* header or small queue */ 687 u32 q1_depth; 688 u32 q1_buf_size; 689 690 /* data or large queue */ 691 u32 q0_depth; 692 u32 q0_buf_size; 693 u32 q0_num_vecs; 694 enum bna_status q0_multi_buf; 695 696 enum bna_status rss_status; 697 struct bna_rss_config rss_config; 698 699 struct bna_hds_config hds_config; 700 701 enum bna_status vlan_strip_status; 702 }; 703 704 /* Rx Path structure - one per MSIX vector/CPU */ 705 struct bna_rxp { 706 /* This should be the first one */ 707 struct list_head qe; 708 709 enum bna_rxp_type type; 710 union bna_rxq_u rxq; 711 struct bna_cq cq; 712 713 struct bna_rx *rx; 714 715 /* MSI-x vector number for configuring RSS */ 716 int vector; 717 int hw_id; 718 }; 719 720 /* RxF structure (hardware Rx Function) */ 721 struct bna_rxf { 722 bfa_fsm_t fsm; 723 enum bna_rxf_flags flags; 724 725 struct bfa_msgq_cmd_entry msgq_cmd; 726 union { 727 struct bfi_enet_enable_req req; 728 struct bfi_enet_rss_cfg_req rss_req; 729 struct bfi_enet_rit_req rit_req; 730 struct bfi_enet_rx_vlan_req vlan_req; 731 struct bfi_enet_mcast_add_req mcast_add_req; 732 struct bfi_enet_mcast_del_req mcast_del_req; 733 struct bfi_enet_ucast_req ucast_req; 734 } bfi_enet_cmd; 735 736 /* callback for bna_rxf_start() */ 737 void (*start_cbfn) (struct bna_rx *rx); 738 struct bna_rx *start_cbarg; 739 740 /* callback for bna_rxf_stop() */ 741 void (*stop_cbfn) (struct bna_rx *rx); 742 struct bna_rx *stop_cbarg; 743 744 /* callback for bna_rx_receive_pause() / bna_rx_receive_resume() */ 745 void (*oper_state_cbfn) (struct bnad *bnad, struct bna_rx *rx); 746 struct bnad *oper_state_cbarg; 747 748 /** 749 * callback for: 750 * bna_rxf_ucast_set() 751 * bna_rxf_{ucast/mcast}_add(), 752 * bna_rxf_{ucast/mcast}_del(), 753 * bna_rxf_mode_set() 754 */ 755 void (*cam_fltr_cbfn)(struct bnad *bnad, struct bna_rx *rx); 756 struct bnad *cam_fltr_cbarg; 757 758 /* List of unicast addresses yet to be applied to h/w */ 759 struct list_head ucast_pending_add_q; 760 struct list_head ucast_pending_del_q; 761 struct bna_mac *ucast_pending_mac; 762 int ucast_pending_set; 763 /* ucast addresses applied to the h/w */ 764 struct list_head ucast_active_q; 765 struct bna_mac ucast_active_mac; 766 int ucast_active_set; 767 768 /* List of multicast addresses yet to be applied to h/w */ 769 struct list_head mcast_pending_add_q; 770 struct list_head mcast_pending_del_q; 771 /* multicast addresses applied to the h/w */ 772 struct list_head mcast_active_q; 773 struct list_head mcast_handle_q; 774 775 /* Rx modes yet to be applied to h/w */ 776 enum bna_rxmode rxmode_pending; 777 enum bna_rxmode rxmode_pending_bitmask; 778 /* Rx modes applied to h/w */ 779 enum bna_rxmode rxmode_active; 780 781 u8 vlan_pending_bitmask; 782 enum bna_status vlan_filter_status; 783 u32 vlan_filter_table[(BFI_ENET_VLAN_ID_MAX) / 32]; 784 bool vlan_strip_pending; 785 enum bna_status vlan_strip_status; 786 787 enum bna_rss_flags rss_pending; 788 enum bna_status rss_status; 789 struct bna_rss_config rss_cfg; 790 u8 *rit; 791 int rit_size; 792 793 struct bna_rx *rx; 794 }; 795 796 /* Rx object */ 797 struct bna_rx { 798 /* This should be the first one */ 799 struct list_head qe; 800 int rid; 801 int hw_id; 802 803 bfa_fsm_t fsm; 804 805 enum bna_rx_type type; 806 807 int num_paths; 808 struct list_head rxp_q; 809 810 struct bna_hds_config hds_cfg; 811 812 struct bna_rxf rxf; 813 814 enum bna_rx_flags rx_flags; 815 816 struct bfa_msgq_cmd_entry msgq_cmd; 817 union { 818 struct bfi_enet_rx_cfg_req cfg_req; 819 struct bfi_enet_req req; 820 struct bfi_enet_rx_cfg_rsp cfg_rsp; 821 } bfi_enet_cmd; 822 823 /* Rx event handlers */ 824 void (*rcb_setup_cbfn)(struct bnad *, struct bna_rcb *); 825 void (*rcb_destroy_cbfn)(struct bnad *, struct bna_rcb *); 826 void (*ccb_setup_cbfn)(struct bnad *, struct bna_ccb *); 827 void (*ccb_destroy_cbfn)(struct bnad *, struct bna_ccb *); 828 void (*rx_stall_cbfn)(struct bnad *, struct bna_rx *); 829 void (*rx_cleanup_cbfn)(struct bnad *, struct bna_rx *); 830 void (*rx_post_cbfn)(struct bnad *, struct bna_rx *); 831 832 /* callback for bna_rx_disable(), bna_rx_stop() */ 833 void (*stop_cbfn)(void *arg, struct bna_rx *rx); 834 void *stop_cbarg; 835 836 struct bna *bna; 837 void *priv; /* bnad's cookie */ 838 }; 839 840 struct bna_rx_event_cbfn { 841 /* Optional */ 842 void (*rcb_setup_cbfn)(struct bnad *, struct bna_rcb *); 843 void (*rcb_destroy_cbfn)(struct bnad *, struct bna_rcb *); 844 void (*ccb_setup_cbfn)(struct bnad *, struct bna_ccb *); 845 void (*ccb_destroy_cbfn)(struct bnad *, struct bna_ccb *); 846 void (*rx_stall_cbfn)(struct bnad *, struct bna_rx *); 847 /* Mandatory */ 848 void (*rx_cleanup_cbfn)(struct bnad *, struct bna_rx *); 849 void (*rx_post_cbfn)(struct bnad *, struct bna_rx *); 850 }; 851 852 /* Rx module - keeps track of free, active rx objects */ 853 struct bna_rx_mod { 854 struct bna *bna; /* back pointer to parent */ 855 struct bna_rx *rx; /* BFI_MAX_RXQ entries */ 856 struct bna_rxp *rxp; /* BFI_MAX_RXQ entries */ 857 struct bna_rxq *rxq; /* BFI_MAX_RXQ entries */ 858 859 struct list_head rx_free_q; 860 struct list_head rx_active_q; 861 int rx_free_count; 862 863 struct list_head rxp_free_q; 864 int rxp_free_count; 865 866 struct list_head rxq_free_q; 867 int rxq_free_count; 868 869 enum bna_rx_mod_flags flags; 870 871 /* callback for bna_rx_mod_stop() */ 872 void (*stop_cbfn)(struct bna_enet *enet); 873 874 struct bfa_wc rx_stop_wc; 875 u32 dim_vector[BNA_LOAD_T_MAX][BNA_BIAS_T_MAX]; 876 u32 rid_mask; 877 }; 878 879 /* CAM */ 880 881 struct bna_ucam_mod { 882 struct bna_mac *ucmac; /* num_ucmac * 2 entries */ 883 struct list_head free_q; 884 struct list_head del_q; 885 886 struct bna *bna; 887 }; 888 889 struct bna_mcam_handle { 890 /* This should be the first one */ 891 struct list_head qe; 892 int handle; 893 int refcnt; 894 }; 895 896 struct bna_mcam_mod { 897 struct bna_mac *mcmac; /* num_mcmac * 2 entries */ 898 struct bna_mcam_handle *mchandle; /* num_mcmac entries */ 899 struct list_head free_q; 900 struct list_head del_q; 901 struct list_head free_handle_q; 902 903 struct bna *bna; 904 }; 905 906 /* Statistics */ 907 908 struct bna_stats { 909 struct bna_dma_addr hw_stats_dma; 910 struct bfi_enet_stats *hw_stats_kva; 911 struct bfi_enet_stats hw_stats; 912 }; 913 914 struct bna_stats_mod { 915 bool ioc_ready; 916 bool stats_get_busy; 917 bool stats_clr_busy; 918 struct bfa_msgq_cmd_entry stats_get_cmd; 919 struct bfa_msgq_cmd_entry stats_clr_cmd; 920 struct bfi_enet_stats_req stats_get; 921 struct bfi_enet_stats_req stats_clr; 922 }; 923 924 /* BNA */ 925 926 struct bna { 927 struct bna_ident ident; 928 struct bfa_pcidev pcidev; 929 930 struct bna_reg regs; 931 struct bna_bit_defn bits; 932 933 struct bna_stats stats; 934 935 struct bna_ioceth ioceth; 936 struct bfa_cee cee; 937 struct bfa_flash flash; 938 struct bfa_msgq msgq; 939 940 struct bna_ethport ethport; 941 struct bna_enet enet; 942 struct bna_stats_mod stats_mod; 943 944 struct bna_tx_mod tx_mod; 945 struct bna_rx_mod rx_mod; 946 struct bna_ucam_mod ucam_mod; 947 struct bna_mcam_mod mcam_mod; 948 949 enum bna_mod_flags mod_flags; 950 951 int default_mode_rid; 952 int promisc_rid; 953 954 struct bnad *bnad; 955 }; 956 #endif /* __BNA_TYPES_H__ */ 957