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1 /*
2  * Copyright (c) 2010-2011 Atheros Communications Inc.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #ifndef ATH9K_HW_OPS_H
18 #define ATH9K_HW_OPS_H
19 
20 #include "hw.h"
21 
22 /* Hardware core and driver accessible callbacks */
23 
ath9k_hw_configpcipowersave(struct ath_hw * ah,bool power_off)24 static inline void ath9k_hw_configpcipowersave(struct ath_hw *ah,
25 					       bool power_off)
26 {
27 	if (!ah->aspm_enabled)
28 		return;
29 
30 	ath9k_hw_ops(ah)->config_pci_powersave(ah, power_off);
31 }
32 
ath9k_hw_rxena(struct ath_hw * ah)33 static inline void ath9k_hw_rxena(struct ath_hw *ah)
34 {
35 	ath9k_hw_ops(ah)->rx_enable(ah);
36 }
37 
ath9k_hw_set_desc_link(struct ath_hw * ah,void * ds,u32 link)38 static inline void ath9k_hw_set_desc_link(struct ath_hw *ah, void *ds,
39 					  u32 link)
40 {
41 	ath9k_hw_ops(ah)->set_desc_link(ds, link);
42 }
43 
ath9k_hw_calibrate(struct ath_hw * ah,struct ath9k_channel * chan,u8 rxchainmask,bool longcal)44 static inline bool ath9k_hw_calibrate(struct ath_hw *ah,
45 				      struct ath9k_channel *chan,
46 				      u8 rxchainmask,
47 				      bool longcal)
48 {
49 	return ath9k_hw_ops(ah)->calibrate(ah, chan, rxchainmask, longcal);
50 }
51 
ath9k_hw_getisr(struct ath_hw * ah,enum ath9k_int * masked,u32 * sync_cause_p)52 static inline bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked,
53 				   u32 *sync_cause_p)
54 {
55 	return ath9k_hw_ops(ah)->get_isr(ah, masked, sync_cause_p);
56 }
57 
ath9k_hw_set_txdesc(struct ath_hw * ah,void * ds,struct ath_tx_info * i)58 static inline void ath9k_hw_set_txdesc(struct ath_hw *ah, void *ds,
59 				       struct ath_tx_info *i)
60 {
61 	return ath9k_hw_ops(ah)->set_txdesc(ah, ds, i);
62 }
63 
ath9k_hw_txprocdesc(struct ath_hw * ah,void * ds,struct ath_tx_status * ts)64 static inline int ath9k_hw_txprocdesc(struct ath_hw *ah, void *ds,
65 				      struct ath_tx_status *ts)
66 {
67 	return ath9k_hw_ops(ah)->proc_txdesc(ah, ds, ts);
68 }
69 
ath9k_hw_get_duration(struct ath_hw * ah,const void * ds,int index)70 static inline int ath9k_hw_get_duration(struct ath_hw *ah, const void *ds,
71 					int index)
72 {
73 	return ath9k_hw_ops(ah)->get_duration(ah, ds, index);
74 }
75 
ath9k_hw_antdiv_comb_conf_get(struct ath_hw * ah,struct ath_hw_antcomb_conf * antconf)76 static inline void ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah,
77 		struct ath_hw_antcomb_conf *antconf)
78 {
79 	ath9k_hw_ops(ah)->antdiv_comb_conf_get(ah, antconf);
80 }
81 
ath9k_hw_antdiv_comb_conf_set(struct ath_hw * ah,struct ath_hw_antcomb_conf * antconf)82 static inline void ath9k_hw_antdiv_comb_conf_set(struct ath_hw *ah,
83 		struct ath_hw_antcomb_conf *antconf)
84 {
85 	ath9k_hw_ops(ah)->antdiv_comb_conf_set(ah, antconf);
86 }
87 
ath9k_hw_tx99_start(struct ath_hw * ah,u32 qnum)88 static inline void ath9k_hw_tx99_start(struct ath_hw *ah, u32 qnum)
89 {
90 	ath9k_hw_ops(ah)->tx99_start(ah, qnum);
91 }
92 
ath9k_hw_tx99_stop(struct ath_hw * ah)93 static inline void ath9k_hw_tx99_stop(struct ath_hw *ah)
94 {
95 	ath9k_hw_ops(ah)->tx99_stop(ah);
96 }
97 
ath9k_hw_tx99_set_txpower(struct ath_hw * ah,u8 power)98 static inline void ath9k_hw_tx99_set_txpower(struct ath_hw *ah, u8 power)
99 {
100 	if (ath9k_hw_ops(ah)->tx99_set_txpower)
101 		ath9k_hw_ops(ah)->tx99_set_txpower(ah, power);
102 }
103 
104 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
105 
ath9k_hw_set_bt_ant_diversity(struct ath_hw * ah,bool enable)106 static inline void ath9k_hw_set_bt_ant_diversity(struct ath_hw *ah, bool enable)
107 {
108 	if (ath9k_hw_ops(ah)->set_bt_ant_diversity)
109 		ath9k_hw_ops(ah)->set_bt_ant_diversity(ah, enable);
110 }
111 
112 #endif
113 
114 /* Private hardware call ops */
115 
ath9k_hw_init_hang_checks(struct ath_hw * ah)116 static inline void ath9k_hw_init_hang_checks(struct ath_hw *ah)
117 {
118 	ath9k_hw_private_ops(ah)->init_hang_checks(ah);
119 }
120 
ath9k_hw_detect_mac_hang(struct ath_hw * ah)121 static inline bool ath9k_hw_detect_mac_hang(struct ath_hw *ah)
122 {
123 	return ath9k_hw_private_ops(ah)->detect_mac_hang(ah);
124 }
125 
ath9k_hw_detect_bb_hang(struct ath_hw * ah)126 static inline bool ath9k_hw_detect_bb_hang(struct ath_hw *ah)
127 {
128 	return ath9k_hw_private_ops(ah)->detect_bb_hang(ah);
129 }
130 
131 /* PHY ops */
132 
ath9k_hw_rf_set_freq(struct ath_hw * ah,struct ath9k_channel * chan)133 static inline int ath9k_hw_rf_set_freq(struct ath_hw *ah,
134 				       struct ath9k_channel *chan)
135 {
136 	return ath9k_hw_private_ops(ah)->rf_set_freq(ah, chan);
137 }
138 
ath9k_hw_spur_mitigate_freq(struct ath_hw * ah,struct ath9k_channel * chan)139 static inline void ath9k_hw_spur_mitigate_freq(struct ath_hw *ah,
140 					       struct ath9k_channel *chan)
141 {
142 	ath9k_hw_private_ops(ah)->spur_mitigate_freq(ah, chan);
143 }
144 
ath9k_hw_set_rf_regs(struct ath_hw * ah,struct ath9k_channel * chan,u16 modesIndex)145 static inline bool ath9k_hw_set_rf_regs(struct ath_hw *ah,
146 					struct ath9k_channel *chan,
147 					u16 modesIndex)
148 {
149 	if (!ath9k_hw_private_ops(ah)->set_rf_regs)
150 		return true;
151 
152 	return ath9k_hw_private_ops(ah)->set_rf_regs(ah, chan, modesIndex);
153 }
154 
ath9k_hw_init_bb(struct ath_hw * ah,struct ath9k_channel * chan)155 static inline void ath9k_hw_init_bb(struct ath_hw *ah,
156 				    struct ath9k_channel *chan)
157 {
158 	return ath9k_hw_private_ops(ah)->init_bb(ah, chan);
159 }
160 
ath9k_hw_set_channel_regs(struct ath_hw * ah,struct ath9k_channel * chan)161 static inline void ath9k_hw_set_channel_regs(struct ath_hw *ah,
162 					     struct ath9k_channel *chan)
163 {
164 	return ath9k_hw_private_ops(ah)->set_channel_regs(ah, chan);
165 }
166 
ath9k_hw_process_ini(struct ath_hw * ah,struct ath9k_channel * chan)167 static inline int ath9k_hw_process_ini(struct ath_hw *ah,
168 					struct ath9k_channel *chan)
169 {
170 	return ath9k_hw_private_ops(ah)->process_ini(ah, chan);
171 }
172 
ath9k_olc_init(struct ath_hw * ah)173 static inline void ath9k_olc_init(struct ath_hw *ah)
174 {
175 	if (!ath9k_hw_private_ops(ah)->olc_init)
176 		return;
177 
178 	return ath9k_hw_private_ops(ah)->olc_init(ah);
179 }
180 
ath9k_hw_set_rfmode(struct ath_hw * ah,struct ath9k_channel * chan)181 static inline void ath9k_hw_set_rfmode(struct ath_hw *ah,
182 				       struct ath9k_channel *chan)
183 {
184 	return ath9k_hw_private_ops(ah)->set_rfmode(ah, chan);
185 }
186 
ath9k_hw_mark_phy_inactive(struct ath_hw * ah)187 static inline void ath9k_hw_mark_phy_inactive(struct ath_hw *ah)
188 {
189 	return ath9k_hw_private_ops(ah)->mark_phy_inactive(ah);
190 }
191 
ath9k_hw_set_delta_slope(struct ath_hw * ah,struct ath9k_channel * chan)192 static inline void ath9k_hw_set_delta_slope(struct ath_hw *ah,
193 					    struct ath9k_channel *chan)
194 {
195 	return ath9k_hw_private_ops(ah)->set_delta_slope(ah, chan);
196 }
197 
ath9k_hw_rfbus_req(struct ath_hw * ah)198 static inline bool ath9k_hw_rfbus_req(struct ath_hw *ah)
199 {
200 	return ath9k_hw_private_ops(ah)->rfbus_req(ah);
201 }
202 
ath9k_hw_rfbus_done(struct ath_hw * ah)203 static inline void ath9k_hw_rfbus_done(struct ath_hw *ah)
204 {
205 	return ath9k_hw_private_ops(ah)->rfbus_done(ah);
206 }
207 
ath9k_hw_restore_chainmask(struct ath_hw * ah)208 static inline void ath9k_hw_restore_chainmask(struct ath_hw *ah)
209 {
210 	if (!ath9k_hw_private_ops(ah)->restore_chainmask)
211 		return;
212 
213 	return ath9k_hw_private_ops(ah)->restore_chainmask(ah);
214 }
215 
ath9k_hw_ani_control(struct ath_hw * ah,enum ath9k_ani_cmd cmd,int param)216 static inline bool ath9k_hw_ani_control(struct ath_hw *ah,
217 					enum ath9k_ani_cmd cmd, int param)
218 {
219 	return ath9k_hw_private_ops(ah)->ani_control(ah, cmd, param);
220 }
221 
ath9k_hw_do_getnf(struct ath_hw * ah,int16_t nfarray[NUM_NF_READINGS])222 static inline void ath9k_hw_do_getnf(struct ath_hw *ah,
223 				     int16_t nfarray[NUM_NF_READINGS])
224 {
225 	ath9k_hw_private_ops(ah)->do_getnf(ah, nfarray);
226 }
227 
ath9k_hw_init_cal(struct ath_hw * ah,struct ath9k_channel * chan)228 static inline bool ath9k_hw_init_cal(struct ath_hw *ah,
229 				     struct ath9k_channel *chan)
230 {
231 	return ath9k_hw_private_ops(ah)->init_cal(ah, chan);
232 }
233 
ath9k_hw_setup_calibration(struct ath_hw * ah,struct ath9k_cal_list * currCal)234 static inline void ath9k_hw_setup_calibration(struct ath_hw *ah,
235 					      struct ath9k_cal_list *currCal)
236 {
237 	ath9k_hw_private_ops(ah)->setup_calibration(ah, currCal);
238 }
239 
ath9k_hw_fast_chan_change(struct ath_hw * ah,struct ath9k_channel * chan,u8 * ini_reloaded)240 static inline int ath9k_hw_fast_chan_change(struct ath_hw *ah,
241 					    struct ath9k_channel *chan,
242 					    u8 *ini_reloaded)
243 {
244 	return ath9k_hw_private_ops(ah)->fast_chan_change(ah, chan,
245 							  ini_reloaded);
246 }
247 
ath9k_hw_set_radar_params(struct ath_hw * ah)248 static inline void ath9k_hw_set_radar_params(struct ath_hw *ah)
249 {
250 	if (!ath9k_hw_private_ops(ah)->set_radar_params)
251 		return;
252 
253 	ath9k_hw_private_ops(ah)->set_radar_params(ah, &ah->radar_conf);
254 }
255 
ath9k_hw_init_cal_settings(struct ath_hw * ah)256 static inline void ath9k_hw_init_cal_settings(struct ath_hw *ah)
257 {
258 	ath9k_hw_private_ops(ah)->init_cal_settings(ah);
259 }
260 
ath9k_hw_compute_pll_control(struct ath_hw * ah,struct ath9k_channel * chan)261 static inline u32 ath9k_hw_compute_pll_control(struct ath_hw *ah,
262 					       struct ath9k_channel *chan)
263 {
264 	return ath9k_hw_private_ops(ah)->compute_pll_control(ah, chan);
265 }
266 
ath9k_hw_init_mode_gain_regs(struct ath_hw * ah)267 static inline void ath9k_hw_init_mode_gain_regs(struct ath_hw *ah)
268 {
269 	if (!ath9k_hw_private_ops(ah)->init_mode_gain_regs)
270 		return;
271 
272 	ath9k_hw_private_ops(ah)->init_mode_gain_regs(ah);
273 }
274 
ath9k_hw_ani_cache_ini_regs(struct ath_hw * ah)275 static inline void ath9k_hw_ani_cache_ini_regs(struct ath_hw *ah)
276 {
277 	if (!ath9k_hw_private_ops(ah)->ani_cache_ini_regs)
278 		return;
279 
280 	ath9k_hw_private_ops(ah)->ani_cache_ini_regs(ah);
281 }
282 
283 #endif /* ATH9K_HW_OPS_H */
284