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Searched defs:cccr (Results 1 – 7 of 7) sorted by relevance

/arch/x86/oprofile/
Dop_model_p4.c357 #define CCCR_CLEAR(cccr) ((cccr) &= CCCR_RESERVED_BITS) argument
358 #define CCCR_SET_REQUIRED_BITS(cccr) ((cccr) |= 0x00030000) argument
359 #define CCCR_SET_ESCR_SELECT(cccr, sel) ((cccr) |= (((sel) & 0x07) << 13)) argument
360 #define CCCR_SET_PMI_OVF_0(cccr) ((cccr) |= (1<<26)) argument
361 #define CCCR_SET_PMI_OVF_1(cccr) ((cccr) |= (1<<27)) argument
362 #define CCCR_SET_ENABLE(cccr) ((cccr) |= (1<<12)) argument
363 #define CCCR_SET_DISABLE(cccr) ((cccr) &= ~(1<<12)) argument
364 #define CCCR_OVF_P(cccr) ((cccr) & (1U<<31)) argument
365 #define CCCR_CLEAR_OVF(cccr) ((cccr) &= (~(1U<<31))) argument
508 unsigned int cccr = 0; in pmc_setup_one_p4_counter() local
/arch/arm/include/asm/mach/
Dmmc.h13 struct sdio_cccr cccr; member
/arch/x86/kernel/cpu/
Dperf_event_p4.c805 u32 escr, cccr; in p4_hw_config() local
956 u64 escr_addr, cccr; in p4_pmu_enable_event() local
1068 u32 escr, cccr; in p4_pmu_swap_config_ts() local
/arch/arm/mach-pxa/
Dpxa25x.c67 unsigned long cccr, turbo; in pxa25x_get_clk_frequency_khz() local
/arch/powerpc/include/asm/
Dmpc5121.h37 u32 cccr; /* CFM Clock Control Register */ member
/arch/frv/include/uapi/asm/
Dregisters.h80 unsigned long cccr; /* Condition Code for Conditional Insns Register */ member
171 unsigned long cccr; /* Condition Code for Conditional Insns Register */ member
/arch/x86/include/asm/
Dperf_event_p4.h161 u32 cccr = p4_config_unpack_cccr(config); in p4_is_event_cascaded() local
209 u32 cccr = P4_CCCR_THREAD_ANY; in p4_default_cccr_conf() local