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1 /*
2  * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
3  * Copyright (C) 2011 Richard Zhao, Linaro <richard.zhao@linaro.org>
4  * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * Adjustable divider clock implementation
11  */
12 
13 #include <linux/clk-provider.h>
14 #include <linux/module.h>
15 #include <linux/slab.h>
16 #include <linux/io.h>
17 #include <linux/err.h>
18 #include <linux/string.h>
19 #include <linux/log2.h>
20 
21 /*
22  * DOC: basic adjustable divider clock that cannot gate
23  *
24  * Traits of this clock:
25  * prepare - clk_prepare only ensures that parents are prepared
26  * enable - clk_enable only ensures that parents are enabled
27  * rate - rate is adjustable.  clk->rate = DIV_ROUND_UP(parent->rate / divisor)
28  * parent - fixed parent.  No clk_set_parent support
29  */
30 
31 #define to_clk_divider(_hw) container_of(_hw, struct clk_divider, hw)
32 
33 #define div_mask(d)	((1 << ((d)->width)) - 1)
34 
_get_table_maxdiv(const struct clk_div_table * table)35 static unsigned int _get_table_maxdiv(const struct clk_div_table *table)
36 {
37 	unsigned int maxdiv = 0;
38 	const struct clk_div_table *clkt;
39 
40 	for (clkt = table; clkt->div; clkt++)
41 		if (clkt->div > maxdiv)
42 			maxdiv = clkt->div;
43 	return maxdiv;
44 }
45 
_get_table_mindiv(const struct clk_div_table * table)46 static unsigned int _get_table_mindiv(const struct clk_div_table *table)
47 {
48 	unsigned int mindiv = UINT_MAX;
49 	const struct clk_div_table *clkt;
50 
51 	for (clkt = table; clkt->div; clkt++)
52 		if (clkt->div < mindiv)
53 			mindiv = clkt->div;
54 	return mindiv;
55 }
56 
_get_maxdiv(struct clk_divider * divider)57 static unsigned int _get_maxdiv(struct clk_divider *divider)
58 {
59 	if (divider->flags & CLK_DIVIDER_ONE_BASED)
60 		return div_mask(divider);
61 	if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
62 		return 1 << div_mask(divider);
63 	if (divider->table)
64 		return _get_table_maxdiv(divider->table);
65 	return div_mask(divider) + 1;
66 }
67 
_get_table_div(const struct clk_div_table * table,unsigned int val)68 static unsigned int _get_table_div(const struct clk_div_table *table,
69 							unsigned int val)
70 {
71 	const struct clk_div_table *clkt;
72 
73 	for (clkt = table; clkt->div; clkt++)
74 		if (clkt->val == val)
75 			return clkt->div;
76 	return 0;
77 }
78 
_get_div(struct clk_divider * divider,unsigned int val)79 static unsigned int _get_div(struct clk_divider *divider, unsigned int val)
80 {
81 	if (divider->flags & CLK_DIVIDER_ONE_BASED)
82 		return val;
83 	if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
84 		return 1 << val;
85 	if (divider->table)
86 		return _get_table_div(divider->table, val);
87 	return val + 1;
88 }
89 
_get_table_val(const struct clk_div_table * table,unsigned int div)90 static unsigned int _get_table_val(const struct clk_div_table *table,
91 							unsigned int div)
92 {
93 	const struct clk_div_table *clkt;
94 
95 	for (clkt = table; clkt->div; clkt++)
96 		if (clkt->div == div)
97 			return clkt->val;
98 	return 0;
99 }
100 
_get_val(struct clk_divider * divider,unsigned int div)101 static unsigned int _get_val(struct clk_divider *divider, unsigned int div)
102 {
103 	if (divider->flags & CLK_DIVIDER_ONE_BASED)
104 		return div;
105 	if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
106 		return __ffs(div);
107 	if (divider->table)
108 		return  _get_table_val(divider->table, div);
109 	return div - 1;
110 }
111 
clk_divider_recalc_rate(struct clk_hw * hw,unsigned long parent_rate)112 static unsigned long clk_divider_recalc_rate(struct clk_hw *hw,
113 		unsigned long parent_rate)
114 {
115 	struct clk_divider *divider = to_clk_divider(hw);
116 	unsigned int div, val;
117 
118 	val = clk_readl(divider->reg) >> divider->shift;
119 	val &= div_mask(divider);
120 
121 	div = _get_div(divider, val);
122 	if (!div) {
123 		WARN(!(divider->flags & CLK_DIVIDER_ALLOW_ZERO),
124 			"%s: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not set\n",
125 			__clk_get_name(hw->clk));
126 		return parent_rate;
127 	}
128 
129 	return DIV_ROUND_UP(parent_rate, div);
130 }
131 
_is_valid_table_div(const struct clk_div_table * table,unsigned int div)132 static bool _is_valid_table_div(const struct clk_div_table *table,
133 							 unsigned int div)
134 {
135 	const struct clk_div_table *clkt;
136 
137 	for (clkt = table; clkt->div; clkt++)
138 		if (clkt->div == div)
139 			return true;
140 	return false;
141 }
142 
_is_valid_div(struct clk_divider * divider,unsigned int div)143 static bool _is_valid_div(struct clk_divider *divider, unsigned int div)
144 {
145 	if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
146 		return is_power_of_2(div);
147 	if (divider->table)
148 		return _is_valid_table_div(divider->table, div);
149 	return true;
150 }
151 
_round_up_table(const struct clk_div_table * table,int div)152 static int _round_up_table(const struct clk_div_table *table, int div)
153 {
154 	const struct clk_div_table *clkt;
155 	int up = INT_MAX;
156 
157 	for (clkt = table; clkt->div; clkt++) {
158 		if (clkt->div == div)
159 			return clkt->div;
160 		else if (clkt->div < div)
161 			continue;
162 
163 		if ((clkt->div - div) < (up - div))
164 			up = clkt->div;
165 	}
166 
167 	return up;
168 }
169 
_round_down_table(const struct clk_div_table * table,int div)170 static int _round_down_table(const struct clk_div_table *table, int div)
171 {
172 	const struct clk_div_table *clkt;
173 	int down = _get_table_mindiv(table);
174 
175 	for (clkt = table; clkt->div; clkt++) {
176 		if (clkt->div == div)
177 			return clkt->div;
178 		else if (clkt->div > div)
179 			continue;
180 
181 		if ((div - clkt->div) < (div - down))
182 			down = clkt->div;
183 	}
184 
185 	return down;
186 }
187 
_div_round_up(struct clk_divider * divider,unsigned long parent_rate,unsigned long rate)188 static int _div_round_up(struct clk_divider *divider,
189 		unsigned long parent_rate, unsigned long rate)
190 {
191 	int div = DIV_ROUND_UP(parent_rate, rate);
192 
193 	if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
194 		div = __roundup_pow_of_two(div);
195 	if (divider->table)
196 		div = _round_up_table(divider->table, div);
197 
198 	return div;
199 }
200 
_div_round_closest(struct clk_divider * divider,unsigned long parent_rate,unsigned long rate)201 static int _div_round_closest(struct clk_divider *divider,
202 		unsigned long parent_rate, unsigned long rate)
203 {
204 	int up, down, div;
205 	unsigned long up_rate, down_rate;
206 
207 	up = down = div = DIV_ROUND_CLOSEST(parent_rate, rate);
208 
209 	if (divider->flags & CLK_DIVIDER_POWER_OF_TWO) {
210 		up = __roundup_pow_of_two(div);
211 		down = __rounddown_pow_of_two(div);
212 	} else if (divider->table) {
213 		up = _round_up_table(divider->table, div);
214 		down = _round_down_table(divider->table, div);
215 	}
216 
217 	up_rate = DIV_ROUND_UP(parent_rate, up);
218 	down_rate = DIV_ROUND_UP(parent_rate, down);
219 
220 	return (rate - up_rate) <= (down_rate - rate) ? up : down;
221 }
222 
_div_round(struct clk_divider * divider,unsigned long parent_rate,unsigned long rate)223 static int _div_round(struct clk_divider *divider, unsigned long parent_rate,
224 		unsigned long rate)
225 {
226 	if (divider->flags & CLK_DIVIDER_ROUND_CLOSEST)
227 		return _div_round_closest(divider, parent_rate, rate);
228 
229 	return _div_round_up(divider, parent_rate, rate);
230 }
231 
_is_best_div(struct clk_divider * divider,unsigned long rate,unsigned long now,unsigned long best)232 static bool _is_best_div(struct clk_divider *divider,
233 		unsigned long rate, unsigned long now, unsigned long best)
234 {
235 	if (divider->flags & CLK_DIVIDER_ROUND_CLOSEST)
236 		return abs(rate - now) < abs(rate - best);
237 
238 	return now <= rate && now > best;
239 }
240 
_next_div(struct clk_divider * divider,int div)241 static int _next_div(struct clk_divider *divider, int div)
242 {
243 	div++;
244 
245 	if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
246 		return __roundup_pow_of_two(div);
247 	if (divider->table)
248 		return _round_up_table(divider->table, div);
249 
250 	return div;
251 }
252 
clk_divider_bestdiv(struct clk_hw * hw,unsigned long rate,unsigned long * best_parent_rate)253 static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
254 		unsigned long *best_parent_rate)
255 {
256 	struct clk_divider *divider = to_clk_divider(hw);
257 	int i, bestdiv = 0;
258 	unsigned long parent_rate, best = 0, now, maxdiv;
259 	unsigned long parent_rate_saved = *best_parent_rate;
260 
261 	if (!rate)
262 		rate = 1;
263 
264 	/* if read only, just return current value */
265 	if (divider->flags & CLK_DIVIDER_READ_ONLY) {
266 		bestdiv = readl(divider->reg) >> divider->shift;
267 		bestdiv &= div_mask(divider);
268 		bestdiv = _get_div(divider, bestdiv);
269 		return bestdiv;
270 	}
271 
272 	maxdiv = _get_maxdiv(divider);
273 
274 	if (!(__clk_get_flags(hw->clk) & CLK_SET_RATE_PARENT)) {
275 		parent_rate = *best_parent_rate;
276 		bestdiv = _div_round(divider, parent_rate, rate);
277 		bestdiv = bestdiv == 0 ? 1 : bestdiv;
278 		bestdiv = bestdiv > maxdiv ? maxdiv : bestdiv;
279 		return bestdiv;
280 	}
281 
282 	/*
283 	 * The maximum divider we can use without overflowing
284 	 * unsigned long in rate * i below
285 	 */
286 	maxdiv = min(ULONG_MAX / rate, maxdiv);
287 
288 	for (i = 1; i <= maxdiv; i = _next_div(divider, i)) {
289 		if (!_is_valid_div(divider, i))
290 			continue;
291 		if (rate * i == parent_rate_saved) {
292 			/*
293 			 * It's the most ideal case if the requested rate can be
294 			 * divided from parent clock without needing to change
295 			 * parent rate, so return the divider immediately.
296 			 */
297 			*best_parent_rate = parent_rate_saved;
298 			return i;
299 		}
300 		parent_rate = __clk_round_rate(__clk_get_parent(hw->clk),
301 					       rate * i);
302 		now = DIV_ROUND_UP(parent_rate, i);
303 		if (_is_best_div(divider, rate, now, best)) {
304 			bestdiv = i;
305 			best = now;
306 			*best_parent_rate = parent_rate;
307 		}
308 	}
309 
310 	if (!bestdiv) {
311 		bestdiv = _get_maxdiv(divider);
312 		*best_parent_rate = __clk_round_rate(__clk_get_parent(hw->clk), 1);
313 	}
314 
315 	return bestdiv;
316 }
317 
clk_divider_round_rate(struct clk_hw * hw,unsigned long rate,unsigned long * prate)318 static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
319 				unsigned long *prate)
320 {
321 	int div;
322 	div = clk_divider_bestdiv(hw, rate, prate);
323 
324 	return DIV_ROUND_UP(*prate, div);
325 }
326 
clk_divider_set_rate(struct clk_hw * hw,unsigned long rate,unsigned long parent_rate)327 static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
328 				unsigned long parent_rate)
329 {
330 	struct clk_divider *divider = to_clk_divider(hw);
331 	unsigned int div, value;
332 	unsigned long flags = 0;
333 	u32 val;
334 
335 	div = DIV_ROUND_UP(parent_rate, rate);
336 
337 	if (!_is_valid_div(divider, div))
338 		return -EINVAL;
339 
340 	value = _get_val(divider, div);
341 
342 	if (value > div_mask(divider))
343 		value = div_mask(divider);
344 
345 	if (divider->lock)
346 		spin_lock_irqsave(divider->lock, flags);
347 
348 	if (divider->flags & CLK_DIVIDER_HIWORD_MASK) {
349 		val = div_mask(divider) << (divider->shift + 16);
350 	} else {
351 		val = clk_readl(divider->reg);
352 		val &= ~(div_mask(divider) << divider->shift);
353 	}
354 	val |= value << divider->shift;
355 	clk_writel(val, divider->reg);
356 
357 	if (divider->lock)
358 		spin_unlock_irqrestore(divider->lock, flags);
359 
360 	return 0;
361 }
362 
363 const struct clk_ops clk_divider_ops = {
364 	.recalc_rate = clk_divider_recalc_rate,
365 	.round_rate = clk_divider_round_rate,
366 	.set_rate = clk_divider_set_rate,
367 };
368 EXPORT_SYMBOL_GPL(clk_divider_ops);
369 
_register_divider(struct device * dev,const char * name,const char * parent_name,unsigned long flags,void __iomem * reg,u8 shift,u8 width,u8 clk_divider_flags,const struct clk_div_table * table,spinlock_t * lock)370 static struct clk *_register_divider(struct device *dev, const char *name,
371 		const char *parent_name, unsigned long flags,
372 		void __iomem *reg, u8 shift, u8 width,
373 		u8 clk_divider_flags, const struct clk_div_table *table,
374 		spinlock_t *lock)
375 {
376 	struct clk_divider *div;
377 	struct clk *clk;
378 	struct clk_init_data init;
379 
380 	if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) {
381 		if (width + shift > 16) {
382 			pr_warn("divider value exceeds LOWORD field\n");
383 			return ERR_PTR(-EINVAL);
384 		}
385 	}
386 
387 	/* allocate the divider */
388 	div = kzalloc(sizeof(struct clk_divider), GFP_KERNEL);
389 	if (!div) {
390 		pr_err("%s: could not allocate divider clk\n", __func__);
391 		return ERR_PTR(-ENOMEM);
392 	}
393 
394 	init.name = name;
395 	init.ops = &clk_divider_ops;
396 	init.flags = flags | CLK_IS_BASIC;
397 	init.parent_names = (parent_name ? &parent_name: NULL);
398 	init.num_parents = (parent_name ? 1 : 0);
399 
400 	/* struct clk_divider assignments */
401 	div->reg = reg;
402 	div->shift = shift;
403 	div->width = width;
404 	div->flags = clk_divider_flags;
405 	div->lock = lock;
406 	div->hw.init = &init;
407 	div->table = table;
408 
409 	/* register the clock */
410 	clk = clk_register(dev, &div->hw);
411 
412 	if (IS_ERR(clk))
413 		kfree(div);
414 
415 	return clk;
416 }
417 
418 /**
419  * clk_register_divider - register a divider clock with the clock framework
420  * @dev: device registering this clock
421  * @name: name of this clock
422  * @parent_name: name of clock's parent
423  * @flags: framework-specific flags
424  * @reg: register address to adjust divider
425  * @shift: number of bits to shift the bitfield
426  * @width: width of the bitfield
427  * @clk_divider_flags: divider-specific flags for this clock
428  * @lock: shared register lock for this clock
429  */
clk_register_divider(struct device * dev,const char * name,const char * parent_name,unsigned long flags,void __iomem * reg,u8 shift,u8 width,u8 clk_divider_flags,spinlock_t * lock)430 struct clk *clk_register_divider(struct device *dev, const char *name,
431 		const char *parent_name, unsigned long flags,
432 		void __iomem *reg, u8 shift, u8 width,
433 		u8 clk_divider_flags, spinlock_t *lock)
434 {
435 	return _register_divider(dev, name, parent_name, flags, reg, shift,
436 			width, clk_divider_flags, NULL, lock);
437 }
438 EXPORT_SYMBOL_GPL(clk_register_divider);
439 
440 /**
441  * clk_register_divider_table - register a table based divider clock with
442  * the clock framework
443  * @dev: device registering this clock
444  * @name: name of this clock
445  * @parent_name: name of clock's parent
446  * @flags: framework-specific flags
447  * @reg: register address to adjust divider
448  * @shift: number of bits to shift the bitfield
449  * @width: width of the bitfield
450  * @clk_divider_flags: divider-specific flags for this clock
451  * @table: array of divider/value pairs ending with a div set to 0
452  * @lock: shared register lock for this clock
453  */
clk_register_divider_table(struct device * dev,const char * name,const char * parent_name,unsigned long flags,void __iomem * reg,u8 shift,u8 width,u8 clk_divider_flags,const struct clk_div_table * table,spinlock_t * lock)454 struct clk *clk_register_divider_table(struct device *dev, const char *name,
455 		const char *parent_name, unsigned long flags,
456 		void __iomem *reg, u8 shift, u8 width,
457 		u8 clk_divider_flags, const struct clk_div_table *table,
458 		spinlock_t *lock)
459 {
460 	return _register_divider(dev, name, parent_name, flags, reg, shift,
461 			width, clk_divider_flags, table, lock);
462 }
463 EXPORT_SYMBOL_GPL(clk_register_divider_table);
464